2017-12-15 15:27:53 +08:00
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# RUN: llc -start-after ppc-mi-peepholes -ppc-late-peephole %s -o - | FileCheck %s
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--- |
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; ModuleID = 'a.ll'
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source_filename = "a.c"
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target datalayout = "e-m:e-i64:64-n32:64"
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target triple = "powerpc64le-unknown-linux-gnu"
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; Function Attrs: norecurse nounwind readnone
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define signext i32 @unsafeAddR0R3(i32 signext %a, i32 signext %b) local_unnamed_addr #0 {
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entry:
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%add = add nsw i32 %b, %a
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ret i32 %add
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}
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; Function Attrs: norecurse nounwind readnone
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define signext i32 @unsafeAddR3R0(i32 signext %a, i32 signext %b) local_unnamed_addr #0 {
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entry:
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%add = add nsw i32 %b, %a
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ret i32 %add
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}
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; Function Attrs: norecurse nounwind readnone
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define signext i32 @safeAddR0R3(i32 signext %a, i32 signext %b) local_unnamed_addr #0 {
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entry:
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%add = add nsw i32 %b, %a
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ret i32 %add
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}
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; Function Attrs: norecurse nounwind readnone
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define signext i32 @safeAddR3R0(i32 signext %a, i32 signext %b) local_unnamed_addr #0 {
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entry:
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%add = add nsw i32 %b, %a
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ret i32 %add
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}
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; Function Attrs: norecurse nounwind readonly
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define i64 @unsafeLDXR3R0(i64* nocapture readonly %ptr, i64 %off) local_unnamed_addr #1 {
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entry:
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%0 = bitcast i64* %ptr to i8*
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%add.ptr = getelementptr inbounds i8, i8* %0, i64 %off
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%1 = bitcast i8* %add.ptr to i64*
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%2 = load i64, i64* %1, align 8, !tbaa !3
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ret i64 %2
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}
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; Function Attrs: norecurse nounwind readonly
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define i64 @safeLDXZeroR3(i64* nocapture readonly %ptr, i64 %off) local_unnamed_addr #1 {
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entry:
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%0 = bitcast i64* %ptr to i8*
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%add.ptr = getelementptr inbounds i8, i8* %0, i64 %off
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%1 = bitcast i8* %add.ptr to i64*
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%2 = load i64, i64* %1, align 8, !tbaa !3
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ret i64 %2
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}
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; Function Attrs: norecurse nounwind readonly
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define i64 @safeLDXR3R0(i64* nocapture readonly %ptr, i64 %off) local_unnamed_addr #1 {
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entry:
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%0 = bitcast i64* %ptr to i8*
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%add.ptr = getelementptr inbounds i8, i8* %0, i64 %off
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%1 = bitcast i8* %add.ptr to i64*
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%2 = load i64, i64* %1, align 8, !tbaa !3
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ret i64 %2
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}
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attributes #0 = { norecurse nounwind readnone "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="ppc64le" "target-features"="+altivec,+bpermd,+crypto,+direct-move,+extdiv,+htm,+power8-vector,+vsx,-power9-vector,-qpx" "unsafe-fp-math"="false" "use-soft-float"="false" }
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attributes #1 = { norecurse nounwind readonly "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="ppc64le" "target-features"="+altivec,+bpermd,+crypto,+direct-move,+extdiv,+htm,+power8-vector,+vsx,-power9-vector,-qpx" "unsafe-fp-math"="false" "use-soft-float"="false" }
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!llvm.module.flags = !{!0, !1}
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!llvm.ident = !{!2}
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!0 = !{i32 1, !"wchar_size", i32 4}
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!1 = !{i32 7, !"PIC Level", i32 2}
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!2 = !{!"clang version 6.0.0 (trunk 318832)"}
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!3 = !{!4, !4, i64 0}
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!4 = !{!"long long", !5, i64 0}
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!5 = !{!"omnipotent char", !6, i64 0}
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!6 = !{!"Simple C/C++ TBAA"}
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...
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---
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name: unsafeAddR0R3
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alignment: 4
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exposesReturnsTwice: false
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legalized: false
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regBankSelected: false
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selected: false
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tracksRegLiveness: true
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registers:
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- { id: 0, class: g8rc, preferred-register: '' }
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- { id: 1, class: g8rc, preferred-register: '' }
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- { id: 2, class: gprc, preferred-register: '' }
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- { id: 3, class: gprc, preferred-register: '' }
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- { id: 4, class: gprc, preferred-register: '' }
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- { id: 5, class: g8rc, preferred-register: '' }
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liveins:
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2018-02-01 06:04:26 +08:00
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- { reg: '$x3', virtual-reg: '%0' }
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- { reg: '$x4', virtual-reg: '%1' }
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2017-12-15 15:27:53 +08:00
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frameInfo:
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isFrameAddressTaken: false
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isReturnAddressTaken: false
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hasStackMap: false
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hasPatchPoint: false
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stackSize: 0
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offsetAdjustment: 0
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maxAlignment: 0
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adjustsStack: false
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hasCalls: false
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stackProtector: ''
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maxCallFrameSize: 4294967295
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hasOpaqueSPAdjustment: false
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hasVAStart: false
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hasMustTailInVarArgFunc: false
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savePoint: ''
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restorePoint: ''
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fixedStack:
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stack:
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constants:
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body: |
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bb.0.entry:
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2018-02-01 06:04:26 +08:00
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liveins: $x0, $x4
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2017-12-15 15:27:53 +08:00
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2018-02-01 06:04:26 +08:00
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%1:g8rc = COPY $x4
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%0:g8rc = COPY $x0
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2017-12-15 15:27:53 +08:00
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%2:gprc = LI 44
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%3:gprc = COPY %1.sub_32
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2018-02-01 06:04:26 +08:00
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%4:gprc = ADD4 killed $r0, killed %2
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2017-12-15 15:27:53 +08:00
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; CHECK: li 3, 44
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; CHECK: add 3, 0, 3
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%5:g8rc = EXTSW_32_64 killed %4
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2018-02-01 06:04:26 +08:00
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$x3 = COPY %5
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BLR8 implicit $lr8, implicit $rm, implicit $x3
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2017-12-15 15:27:53 +08:00
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...
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---
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name: unsafeAddR3R0
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alignment: 4
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exposesReturnsTwice: false
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legalized: false
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regBankSelected: false
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selected: false
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tracksRegLiveness: true
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registers:
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- { id: 0, class: g8rc, preferred-register: '' }
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- { id: 1, class: g8rc, preferred-register: '' }
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- { id: 2, class: gprc, preferred-register: '' }
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- { id: 3, class: gprc, preferred-register: '' }
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- { id: 4, class: gprc, preferred-register: '' }
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- { id: 5, class: g8rc, preferred-register: '' }
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liveins:
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2018-02-01 06:04:26 +08:00
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- { reg: '$x3', virtual-reg: '%0' }
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- { reg: '$x4', virtual-reg: '%1' }
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2017-12-15 15:27:53 +08:00
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frameInfo:
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isFrameAddressTaken: false
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isReturnAddressTaken: false
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hasStackMap: false
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hasPatchPoint: false
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stackSize: 0
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offsetAdjustment: 0
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maxAlignment: 0
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adjustsStack: false
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hasCalls: false
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stackProtector: ''
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maxCallFrameSize: 4294967295
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hasOpaqueSPAdjustment: false
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hasVAStart: false
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hasMustTailInVarArgFunc: false
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savePoint: ''
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restorePoint: ''
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fixedStack:
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stack:
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constants:
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body: |
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bb.0.entry:
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2018-02-01 06:04:26 +08:00
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liveins: $x0, $x4
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2017-12-15 15:27:53 +08:00
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2018-02-01 06:04:26 +08:00
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%1:g8rc = COPY $x4
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%0:g8rc = COPY $x0
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2017-12-15 15:27:53 +08:00
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%2:gprc = COPY %0.sub_32
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%3:gprc = LI 44
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2018-02-01 06:04:26 +08:00
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%4:gprc = ADD4 killed %3, killed $r0
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2017-12-15 15:27:53 +08:00
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; CHECK: li 3, 44
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; CHECK: add 3, 3, 0
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%5:g8rc = EXTSW_32_64 killed %4
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2018-02-01 06:04:26 +08:00
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$x3 = COPY %5
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BLR8 implicit $lr8, implicit $rm, implicit $x3
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2017-12-15 15:27:53 +08:00
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...
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---
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name: safeAddR0R3
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alignment: 4
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exposesReturnsTwice: false
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legalized: false
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regBankSelected: false
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selected: false
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tracksRegLiveness: true
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registers:
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- { id: 0, class: g8rc, preferred-register: '' }
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- { id: 1, class: g8rc, preferred-register: '' }
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- { id: 2, class: gprc, preferred-register: '' }
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- { id: 3, class: gprc, preferred-register: '' }
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- { id: 4, class: gprc, preferred-register: '' }
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- { id: 5, class: g8rc, preferred-register: '' }
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liveins:
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2018-02-01 06:04:26 +08:00
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- { reg: '$x3', virtual-reg: '%0' }
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- { reg: '$x4', virtual-reg: '%1' }
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2017-12-15 15:27:53 +08:00
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frameInfo:
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isFrameAddressTaken: false
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isReturnAddressTaken: false
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hasStackMap: false
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hasPatchPoint: false
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stackSize: 0
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offsetAdjustment: 0
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maxAlignment: 0
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|
adjustsStack: false
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hasCalls: false
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stackProtector: ''
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|
maxCallFrameSize: 4294967295
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hasOpaqueSPAdjustment: false
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hasVAStart: false
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hasMustTailInVarArgFunc: false
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savePoint: ''
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restorePoint: ''
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fixedStack:
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stack:
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constants:
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body: |
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|
bb.0.entry:
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2018-02-01 06:04:26 +08:00
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liveins: $x3, $x4
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2017-12-15 15:27:53 +08:00
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2018-02-01 06:04:26 +08:00
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%1:g8rc = COPY $x4
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%0:g8rc = COPY $x3
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2017-12-15 15:27:53 +08:00
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%2:gprc = COPY %0.sub_32
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2018-02-01 06:04:26 +08:00
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$r0 = LI 44
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%4:gprc = ADD4 killed $r0, killed %2
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2017-12-15 15:27:53 +08:00
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; CHECK: addi 3, 3, 44
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%5:g8rc = EXTSW_32_64 killed %4
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2018-02-01 06:04:26 +08:00
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$x3 = COPY %5
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BLR8 implicit $lr8, implicit $rm, implicit $x3
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2017-12-15 15:27:53 +08:00
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...
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---
|
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|
name: safeAddR3R0
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alignment: 4
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|
exposesReturnsTwice: false
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legalized: false
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regBankSelected: false
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|
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selected: false
|
|
|
|
tracksRegLiveness: true
|
|
|
|
registers:
|
|
|
|
- { id: 0, class: g8rc, preferred-register: '' }
|
|
|
|
- { id: 1, class: g8rc, preferred-register: '' }
|
|
|
|
- { id: 2, class: gprc, preferred-register: '' }
|
|
|
|
- { id: 3, class: gprc, preferred-register: '' }
|
|
|
|
- { id: 4, class: gprc, preferred-register: '' }
|
|
|
|
- { id: 5, class: g8rc, preferred-register: '' }
|
|
|
|
liveins:
|
2018-02-01 06:04:26 +08:00
|
|
|
- { reg: '$x3', virtual-reg: '%0' }
|
|
|
|
- { reg: '$x4', virtual-reg: '%1' }
|
2017-12-15 15:27:53 +08:00
|
|
|
frameInfo:
|
|
|
|
isFrameAddressTaken: false
|
|
|
|
isReturnAddressTaken: false
|
|
|
|
hasStackMap: false
|
|
|
|
hasPatchPoint: false
|
|
|
|
stackSize: 0
|
|
|
|
offsetAdjustment: 0
|
|
|
|
maxAlignment: 0
|
|
|
|
adjustsStack: false
|
|
|
|
hasCalls: false
|
|
|
|
stackProtector: ''
|
|
|
|
maxCallFrameSize: 4294967295
|
|
|
|
hasOpaqueSPAdjustment: false
|
|
|
|
hasVAStart: false
|
|
|
|
hasMustTailInVarArgFunc: false
|
|
|
|
savePoint: ''
|
|
|
|
restorePoint: ''
|
|
|
|
fixedStack:
|
|
|
|
stack:
|
|
|
|
constants:
|
|
|
|
body: |
|
|
|
|
bb.0.entry:
|
2018-02-01 06:04:26 +08:00
|
|
|
liveins: $x3, $x4
|
2017-12-15 15:27:53 +08:00
|
|
|
|
2018-02-01 06:04:26 +08:00
|
|
|
%1:g8rc = COPY $x4
|
|
|
|
%0:g8rc = COPY $x3
|
2017-12-15 15:27:53 +08:00
|
|
|
%2:gprc = COPY %0.sub_32
|
2018-02-01 06:04:26 +08:00
|
|
|
$r0 = LI 44
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|
%4:gprc = ADD4 killed %2, killed $r0
|
2017-12-15 15:27:53 +08:00
|
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|
; CHECK: addi 3, 3, 44
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|
|
|
%5:g8rc = EXTSW_32_64 killed %4
|
2018-02-01 06:04:26 +08:00
|
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|
$x3 = COPY %5
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|
|
|
BLR8 implicit $lr8, implicit $rm, implicit $x3
|
2017-12-15 15:27:53 +08:00
|
|
|
|
|
|
|
...
|
|
|
|
---
|
|
|
|
name: unsafeLDXR3R0
|
|
|
|
alignment: 4
|
|
|
|
exposesReturnsTwice: false
|
|
|
|
legalized: false
|
|
|
|
regBankSelected: false
|
|
|
|
selected: false
|
|
|
|
tracksRegLiveness: true
|
|
|
|
registers:
|
|
|
|
- { id: 0, class: g8rc_and_g8rc_nox0, preferred-register: '' }
|
|
|
|
- { id: 1, class: g8rc, preferred-register: '' }
|
|
|
|
- { id: 2, class: g8rc, preferred-register: '' }
|
|
|
|
liveins:
|
2018-02-01 06:04:26 +08:00
|
|
|
- { reg: '$x0', virtual-reg: '%0' }
|
|
|
|
- { reg: '$x4', virtual-reg: '%1' }
|
2017-12-15 15:27:53 +08:00
|
|
|
frameInfo:
|
|
|
|
isFrameAddressTaken: false
|
|
|
|
isReturnAddressTaken: false
|
|
|
|
hasStackMap: false
|
|
|
|
hasPatchPoint: false
|
|
|
|
stackSize: 0
|
|
|
|
offsetAdjustment: 0
|
|
|
|
maxAlignment: 0
|
|
|
|
adjustsStack: false
|
|
|
|
hasCalls: false
|
|
|
|
stackProtector: ''
|
|
|
|
maxCallFrameSize: 4294967295
|
|
|
|
hasOpaqueSPAdjustment: false
|
|
|
|
hasVAStart: false
|
|
|
|
hasMustTailInVarArgFunc: false
|
|
|
|
savePoint: ''
|
|
|
|
restorePoint: ''
|
|
|
|
fixedStack:
|
|
|
|
stack:
|
|
|
|
constants:
|
|
|
|
body: |
|
|
|
|
bb.0.entry:
|
2018-02-01 06:04:26 +08:00
|
|
|
liveins: $x0, $x4
|
2017-12-15 15:27:53 +08:00
|
|
|
|
2018-02-01 06:04:26 +08:00
|
|
|
%1:g8rc = COPY $x4
|
2017-12-15 15:27:53 +08:00
|
|
|
%0:g8rc_and_g8rc_nox0 = LI8 44
|
2018-02-01 06:04:26 +08:00
|
|
|
%2:g8rc = LDX %0, $x0 :: (load 8 from %ir.1, !tbaa !3)
|
2017-12-15 15:27:53 +08:00
|
|
|
; CHECK: li 3, 44
|
|
|
|
; CHECK: ldx 3, 3, 0
|
2018-02-01 06:04:26 +08:00
|
|
|
$x3 = COPY %2
|
|
|
|
BLR8 implicit $lr8, implicit $rm, implicit $x3
|
2017-12-15 15:27:53 +08:00
|
|
|
|
|
|
|
...
|
|
|
|
---
|
|
|
|
name: safeLDXZeroR3
|
|
|
|
alignment: 4
|
|
|
|
exposesReturnsTwice: false
|
|
|
|
legalized: false
|
|
|
|
regBankSelected: false
|
|
|
|
selected: false
|
|
|
|
tracksRegLiveness: true
|
|
|
|
registers:
|
|
|
|
- { id: 0, class: g8rc_and_g8rc_nox0, preferred-register: '' }
|
|
|
|
- { id: 1, class: g8rc, preferred-register: '' }
|
|
|
|
- { id: 2, class: g8rc, preferred-register: '' }
|
|
|
|
liveins:
|
2018-02-01 06:04:26 +08:00
|
|
|
- { reg: '$x3', virtual-reg: '%0' }
|
|
|
|
- { reg: '$x4', virtual-reg: '%1' }
|
2017-12-15 15:27:53 +08:00
|
|
|
frameInfo:
|
|
|
|
isFrameAddressTaken: false
|
|
|
|
isReturnAddressTaken: false
|
|
|
|
hasStackMap: false
|
|
|
|
hasPatchPoint: false
|
|
|
|
stackSize: 0
|
|
|
|
offsetAdjustment: 0
|
|
|
|
maxAlignment: 0
|
|
|
|
adjustsStack: false
|
|
|
|
hasCalls: false
|
|
|
|
stackProtector: ''
|
|
|
|
maxCallFrameSize: 4294967295
|
|
|
|
hasOpaqueSPAdjustment: false
|
|
|
|
hasVAStart: false
|
|
|
|
hasMustTailInVarArgFunc: false
|
|
|
|
savePoint: ''
|
|
|
|
restorePoint: ''
|
|
|
|
fixedStack:
|
|
|
|
stack:
|
|
|
|
constants:
|
|
|
|
body: |
|
|
|
|
bb.0.entry:
|
2018-02-01 06:04:26 +08:00
|
|
|
liveins: $x3, $x4
|
2017-12-15 15:27:53 +08:00
|
|
|
|
|
|
|
%1:g8rc = LI8 44
|
|
|
|
%0:g8rc_and_g8rc_nox0 = LI8 44
|
2018-02-01 06:04:26 +08:00
|
|
|
%2:g8rc = LDX $zero8, %1 :: (load 8 from %ir.1, !tbaa !3)
|
2017-12-15 15:27:53 +08:00
|
|
|
; CHECK: ld 3, 44(0)
|
2018-02-01 06:04:26 +08:00
|
|
|
$x3 = COPY %2
|
|
|
|
BLR8 implicit $lr8, implicit $rm, implicit $x3
|
2017-12-15 15:27:53 +08:00
|
|
|
|
|
|
|
...
|
|
|
|
---
|
|
|
|
name: safeLDXR3R0
|
|
|
|
alignment: 4
|
|
|
|
exposesReturnsTwice: false
|
|
|
|
legalized: false
|
|
|
|
regBankSelected: false
|
|
|
|
selected: false
|
|
|
|
tracksRegLiveness: true
|
|
|
|
registers:
|
|
|
|
- { id: 0, class: g8rc_and_g8rc_nox0, preferred-register: '' }
|
|
|
|
- { id: 1, class: g8rc, preferred-register: '' }
|
|
|
|
- { id: 2, class: g8rc, preferred-register: '' }
|
|
|
|
liveins:
|
2018-02-01 06:04:26 +08:00
|
|
|
- { reg: '$x3', virtual-reg: '%0' }
|
|
|
|
- { reg: '$x4', virtual-reg: '%1' }
|
2017-12-15 15:27:53 +08:00
|
|
|
frameInfo:
|
|
|
|
isFrameAddressTaken: false
|
|
|
|
isReturnAddressTaken: false
|
|
|
|
hasStackMap: false
|
|
|
|
hasPatchPoint: false
|
|
|
|
stackSize: 0
|
|
|
|
offsetAdjustment: 0
|
|
|
|
maxAlignment: 0
|
|
|
|
adjustsStack: false
|
|
|
|
hasCalls: false
|
|
|
|
stackProtector: ''
|
|
|
|
maxCallFrameSize: 4294967295
|
|
|
|
hasOpaqueSPAdjustment: false
|
|
|
|
hasVAStart: false
|
|
|
|
hasMustTailInVarArgFunc: false
|
|
|
|
savePoint: ''
|
|
|
|
restorePoint: ''
|
|
|
|
fixedStack:
|
|
|
|
stack:
|
|
|
|
constants:
|
|
|
|
body: |
|
|
|
|
bb.0.entry:
|
2018-02-01 06:04:26 +08:00
|
|
|
liveins: $x3, $x4
|
2017-12-15 15:27:53 +08:00
|
|
|
|
2018-02-01 06:04:26 +08:00
|
|
|
$x0 = LI8 44
|
|
|
|
%0:g8rc_and_g8rc_nox0 = COPY $x3
|
|
|
|
%2:g8rc = LDX %0, $x0 :: (load 8 from %ir.1, !tbaa !3)
|
2017-12-15 15:27:53 +08:00
|
|
|
; CHECK: ld 3, 44(3)
|
2018-02-01 06:04:26 +08:00
|
|
|
$x3 = COPY %2
|
|
|
|
BLR8 implicit $lr8, implicit $rm, implicit $x3
|
2017-12-15 15:27:53 +08:00
|
|
|
|
|
|
|
...
|