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llvm-project/clang/test/Driver/clang-translation.c

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Use FileCheck. llvm-svn: 164462
2012-09-22 23:26:38 +08:00
// RUN: %clang -target i386-unknown-unknown -### -S -O0 -Os %s -o %t.s -fverbose-asm -funwind-tables -fvisibility=hidden 2>&1 | FileCheck -check-prefix=I386 %s
// I386: "-triple" "i386-unknown-unknown"
// I386: "-S"
// I386: "-disable-free"
// I386: "-mrelocation-model" "static"
[Clang] Replace cc1 options '-mdisable-fp-elim' and '-momit-leaf-frame-pointer' with '-mframe-pointer' After D56351 and D64294, frame pointer handling is migrated to tri-state (all, non-leaf, none) in clang driver and on the function attribute. This patch makes the frame pointer handling cc1 option tri-state. Reviewers: chandlerc, rnk, t.p.northover, MaskRay Reviewed By: MaskRay Differential Revision: https://reviews.llvm.org/D56353 llvm-svn: 366645
2019-07-21 06:50:50 +08:00
// I386: "-mframe-pointer=all"
Use FileCheck. llvm-svn: 164462
2012-09-22 23:26:38 +08:00
// I386: "-munwind-tables"
// I386: "-Os"
// I386: "-fvisibility"
// I386: "hidden"
// I386: "-o"
// I386: clang-translation
[Driver] Bump default x86 cpu to Penryn when targeting macosx10.12+. 10.12 dropped support for all pre-Penryn Macs. llvm-svn: 289839
2016-12-16 02:14:27 +08:00
Use FileCheck. llvm-svn: 164468
2012-09-23 06:30:04 +08:00
// RUN: %clang -target i386-apple-darwin9 -### -S %s -o %t.s 2>&1 | \
// RUN: FileCheck -check-prefix=YONAH %s
[Driver] Bump default x86 cpu to Penryn when targeting macosx10.12+. 10.12 dropped support for all pre-Penryn Macs. llvm-svn: 289839
2016-12-16 02:14:27 +08:00
// RUN: %clang -target i386-apple-macosx10.11 -### -S %s -o %t.s 2>&1 | \
// RUN: FileCheck -check-prefix=YONAH %s
Use FileCheck. llvm-svn: 164468
2012-09-23 06:30:04 +08:00
// YONAH: "-target-cpu"
// YONAH: "yonah"
[Driver] Bump default x86 cpu to Penryn when targeting macosx10.12+. 10.12 dropped support for all pre-Penryn Macs. llvm-svn: 289839
2016-12-16 02:14:27 +08:00
Use FileCheck. llvm-svn: 164468
2012-09-23 06:30:04 +08:00
// RUN: %clang -target x86_64-apple-darwin9 -### -S %s -o %t.s 2>&1 | \
// RUN: FileCheck -check-prefix=CORE2 %s
[Driver] Bump default x86 cpu to Penryn when targeting macosx10.12+. 10.12 dropped support for all pre-Penryn Macs. llvm-svn: 289839
2016-12-16 02:14:27 +08:00
// RUN: %clang -target x86_64-apple-macosx10.11 -### -S %s -o %t.s 2>&1 | \
// RUN: FileCheck -check-prefix=CORE2 %s
Use FileCheck. llvm-svn: 164468
2012-09-23 06:30:04 +08:00
// CORE2: "-target-cpu"
// CORE2: "core2"
[Driver] Bump default x86 cpu to Penryn when targeting macosx10.12+. 10.12 dropped support for all pre-Penryn Macs. llvm-svn: 289839
2016-12-16 02:14:27 +08:00
X86: Make specifying avx2 simpler on Darwin with '-arch' Teach the '-arch' command line option to enable the compiler-friendly features of core-avx2 CPUs on Darwin. Pass the information along in the target triple like Darwin+ARM does. llvm-svn: 194907
2013-11-16 08:53:35 +08:00
// RUN: %clang -target x86_64h-apple-darwin -### -S %s -o %t.s 2>&1 | \
// RUN: FileCheck -check-prefix=AVX2 %s
[Driver] Bump default x86 cpu to Penryn when targeting macosx10.12+. 10.12 dropped support for all pre-Penryn Macs. llvm-svn: 289839
2016-12-16 02:14:27 +08:00
// RUN: %clang -target x86_64h-apple-macosx10.12 -### -S %s -o %t.s 2>&1 | \
// RUN: FileCheck -check-prefix=AVX2 %s
X86: Make specifying avx2 simpler on Darwin with '-arch' Teach the '-arch' command line option to enable the compiler-friendly features of core-avx2 CPUs on Darwin. Pass the information along in the target triple like Darwin+ARM does. llvm-svn: 194907
2013-11-16 08:53:35 +08:00
// AVX2: "-target-cpu"
// AVX2: "core-avx2"
Unbreak clang-cc handling of -msoft-float / -mfloat-abi=, which I borked. llvm-svn: 90873
2009-12-09 03:49:51 +08:00
[Driver] Don't override '-march' when using '-arch x86_64h' On Darwin, using '-arch x86_64h' would always override the option passed through '-march'. This patch allows users to use '-march' with x86_64h, while keeping the default to 'core-avx2' Differential Revision: https://reviews.llvm.org/D55775 llvm-svn: 349381
2018-12-18 03:29:27 +08:00
// RUN: %clang -target x86_64h-apple-darwin -march=skx -### %s -o /dev/null 2>&1 | \
// RUN: FileCheck -check-prefix=X8664HSKX %s
// X8664HSKX: "-target-cpu"
// X8664HSKX: "skx"
[Driver] Bump default x86 cpu to Penryn when targeting macosx10.12+. 10.12 dropped support for all pre-Penryn Macs. llvm-svn: 289839
2016-12-16 02:14:27 +08:00
// RUN: %clang -target i386-apple-macosx10.12 -### -S %s -o %t.s 2>&1 | \
// RUN: FileCheck -check-prefix=PENRYN %s
// RUN: %clang -target x86_64-apple-macosx10.12 -### -S %s -o %t.s 2>&1 | \
// RUN: FileCheck -check-prefix=PENRYN %s
// PENRYN: "-target-cpu"
// PENRYN: "penryn"
Use pipes. llvm-svn: 164469
2012-09-23 06:51:00 +08:00
// RUN: %clang -target x86_64-apple-darwin10 -### -S %s -arch armv7 2>&1 | \
// RUN: FileCheck -check-prefix=ARMV7_DEFAULT %s
Driver: Switch to using "clang" "-cc1" instead of "clang-cc". llvm-svn: 91174
2009-12-12 07:00:49 +08:00
// ARMV7_DEFAULT: clang
// ARMV7_DEFAULT: "-cc1"
Unbreak clang-cc handling of -msoft-float / -mfloat-abi=, which I borked. llvm-svn: 90873
2009-12-09 03:49:51 +08:00
// ARMV7_DEFAULT-NOT: "-msoft-float"
// ARMV7_DEFAULT: "-mfloat-abi" "soft"
// ARMV7_DEFAULT-NOT: "-msoft-float"
// ARMV7_DEFAULT: "-x" "c"
Use pipes. llvm-svn: 164469
2012-09-23 06:51:00 +08:00
// RUN: %clang -target x86_64-apple-darwin10 -### -S %s -arch armv7 \
// RUN: -msoft-float 2>&1 | FileCheck -check-prefix=ARMV7_SOFTFLOAT %s
Driver: Switch to using "clang" "-cc1" instead of "clang-cc". llvm-svn: 91174
2009-12-12 07:00:49 +08:00
// ARMV7_SOFTFLOAT: clang
// ARMV7_SOFTFLOAT: "-cc1"
Driver/ARM: Match GCC behavior in that -msoft-float disables NEON, despite this not being consistent at all with other parts of the GCC implementation. llvm-svn: 127777
2011-03-17 08:07:34 +08:00
// ARMV7_SOFTFLOAT: "-target-feature"
// ARMV7_SOFTFLOAT: "-neon"
Centralize the handling of -target-feature. No functionality change other than changing the order of -target-feature relative to other -cc1 command line arguments. llvm-svn: 188906
2013-08-22 00:39:20 +08:00
// ARMV7_SOFTFLOAT: "-msoft-float"
// ARMV7_SOFTFLOAT: "-mfloat-abi" "soft"
Unbreak clang-cc handling of -msoft-float / -mfloat-abi=, which I borked. llvm-svn: 90873
2009-12-09 03:49:51 +08:00
// ARMV7_SOFTFLOAT: "-x" "c"
Use pipes. llvm-svn: 164469
2012-09-23 06:51:00 +08:00
// RUN: %clang -target x86_64-apple-darwin10 -### -S %s -arch armv7 \
// RUN: -mhard-float 2>&1 | FileCheck -check-prefix=ARMV7_HARDFLOAT %s
Driver: Switch to using "clang" "-cc1" instead of "clang-cc". llvm-svn: 91174
2009-12-12 07:00:49 +08:00
// ARMV7_HARDFLOAT: clang
// ARMV7_HARDFLOAT: "-cc1"
Unbreak clang-cc handling of -msoft-float / -mfloat-abi=, which I borked. llvm-svn: 90873
2009-12-09 03:49:51 +08:00
// ARMV7_HARDFLOAT-NOT: "-msoft-float"
// ARMV7_HARDFLOAT: "-mfloat-abi" "hard"
// ARMV7_HARDFLOAT-NOT: "-msoft-float"
// ARMV7_HARDFLOAT: "-x" "c"
Fix default cpu for -march=armv5e. llvm-svn: 155540
2012-04-25 16:35:56 +08:00
[Driver][Darwin] Pass -munwind-table when !UseSjLjExceptions. This commit fixes a bug where clang/llvm doesn't emit an unwind table for a function when it is marked noexcept. Without this patch, the following code terminates with an uncaught exception on ARM64: int foo1() noexcept { try { throw 0; } catch (int i) { return 0; } return 1; } int main() { return foo1(); } rdar://problem/32411865 Differential Revision: https://reviews.llvm.org/D35693 llvm-svn: 310006
2017-08-04 07:55:42 +08:00
// RUN: %clang -target arm64-apple-ios10 -### -S %s -arch arm64 2>&1 | \
// RUN: FileCheck -check-prefix=ARM64-APPLE %s
// ARM64-APPLE: -munwind-table
[Driver] Disable uwtable by default in -ffreestanding mode We make the same decision when compiling the kernel or kexts -- we should do this in -ffreestanding mode as well to avoid size regressions in a potentially large set of firmware projects. It's still possible to get uwtable information in -ffreestanding mode by compiling with -funwind-tables (I expect this to be a rare case: I certainly haven't seen any projects like that). Context: -munwind-tables was enabled by default for some arm targets in r310006. Testing: check-clang rdar://problem/33934446 Differential Revision: https://reviews.llvm.org/D37777 llvm-svn: 313087
2017-09-13 06:51:53 +08:00
// RUN: %clang -target arm64-apple-ios10 -### -ffreestanding -S %s -arch arm64 2>&1 | \
// RUN: FileCheck -check-prefix=ARM64-FREESTANDING-APPLE %s
//
// RUN: %clang -target arm64-apple-ios10 -### -fno-unwind-tables -ffreestanding -S %s -arch arm64 2>&1 | \
// RUN: FileCheck -check-prefix=ARM64-FREESTANDING-APPLE %s
//
// ARM64-FREESTANDING-APPLE-NOT: -munwind-table
// RUN: %clang -target arm64-apple-ios10 -### -funwind-tables -S %s -arch arm64 2>&1 | \
// RUN: FileCheck -check-prefix=ARM64-EXPLICIT-UWTABLE-APPLE %s
//
// RUN: %clang -target arm64-apple-ios10 -### -ffreestanding -funwind-tables -S %s -arch arm64 2>&1 | \
// RUN: FileCheck -check-prefix=ARM64-EXPLICIT-UWTABLE-APPLE %s
//
// ARM64-EXPLICIT-UWTABLE-APPLE: -munwind-table
[Driver][Darwin] Do not pass -munwind-table if -fno-excpetions is supplied. With this change, -fno-exceptions disables unwind tables unless -funwind-tables is supplied too or the target is x86-64 (x86-64 requires emitting unwind tables). rdar://problem/33934446 llvm-svn: 311397
2017-08-22 06:46:46 +08:00
// RUN: %clang -target arm64-apple-ios10 -fno-exceptions -### -S %s -arch arm64 2>&1 | \
// RUN: FileCheck -check-prefix=ARM64-APPLE-EXCEP %s
// ARM64-APPLE-EXCEP-NOT: -munwind-table
[Driver][Darwin] Pass -munwind-table when !UseSjLjExceptions. This commit fixes a bug where clang/llvm doesn't emit an unwind table for a function when it is marked noexcept. Without this patch, the following code terminates with an uncaught exception on ARM64: int foo1() noexcept { try { throw 0; } catch (int i) { return 0; } return 1; } int main() { return foo1(); } rdar://problem/32411865 Differential Revision: https://reviews.llvm.org/D35693 llvm-svn: 310006
2017-08-04 07:55:42 +08:00
// RUN: %clang -target armv7k-apple-watchos4.0 -### -S %s -arch armv7k 2>&1 | \
// RUN: FileCheck -check-prefix=ARMV7K-APPLE %s
// ARMV7K-APPLE: -munwind-table
Use pipes. llvm-svn: 164469
2012-09-23 06:51:00 +08:00
// RUN: %clang -target arm-linux -### -S %s -march=armv5e 2>&1 | \
// RUN: FileCheck -check-prefix=ARMV5E %s
Fix default cpu for -march=armv5e. llvm-svn: 155540
2012-04-25 16:35:56 +08:00
// ARMV5E: clang
// ARMV5E: "-cc1"
// ARMV5E: "-target-cpu" "arm1022e"
Add PPC support for translating gcc-style -mcpu options into LLVM -target-cpu options. This functionality is based on what is done on ARM, and enables selecting PPC CPUs in a way compatible with gcc's driver. Also, mirroring gcc (and what is done on x86), -mcpu=native support was added. This uses the host cpu detection from LLVM (which will also soon be updated by refactoring code currently in backend). In order for this to work, the target needs a list of valid CPUs -- we now accept all CPUs accepted by LLVM. A few preprocessor defines for common CPU types have been added. llvm-svn: 158334
2012-06-12 06:35:19 +08:00
[ARM] Option for reading thread pointer from coprocessor register This patch enables option for reading thread pointer directly from coprocessor register (-mtp=soft/cp15). Differential Revision: https://reviews.llvm.org/D34878 llvm-svn: 313018
2017-09-12 18:40:58 +08:00
// RUN: %clang -target arm-linux -mtp=cp15 -### -S %s -arch armv7 2>&1 | \
// RUN: FileCheck -check-prefix=ARMv7_THREAD_POINTER-HARD %s
// ARMv7_THREAD_POINTER-HARD: "-target-feature" "+read-tp-hard"
// RUN: %clang -target arm-linux -mtp=soft -### -S %s -arch armv7 2>&1 | \
// RUN: FileCheck -check-prefix=ARMv7_THREAD_POINTER_SOFT %s
// ARMv7_THREAD_POINTER_SOFT-NOT: "-target-feature" "+read-tp-hard"
// RUN: %clang -target arm-linux -### -S %s -arch armv7 2>&1 | \
// RUN: FileCheck -check-prefix=ARMv7_THREAD_POINTER_NON %s
// ARMv7_THREAD_POINTER_NON-NOT: "-target-feature" "+read-tp-hard"
[AArch64] Support selecting TPIDR_EL[1-3] as the thread base Add an -mtp=el[0-3] option to select which of the AArch64 thread ID registers will be used for the TLS base pointer. This is a followup to rL356657 which added subtarget features to enable accesses to the privileged thread ID registers. Patch by Philip Derrin! Differential revision: https://reviews.llvm.org/D59631 llvm-svn: 357250
2019-03-29 21:32:41 +08:00
// RUN: %clang -target aarch64-linux -### -S %s -arch armv8a 2>&1 | \
// RUN: FileCheck -check-prefix=ARMv8_THREAD_POINTER_NON %s
// ARMv8_THREAD_POINTER_NON-NOT: "-target-feature" "+tpidr-el1"
// ARMv8_THREAD_POINTER_NON-NOT: "-target-feature" "+tpidr-el2"
// ARMv8_THREAD_POINTER_NON-NOT: "-target-feature" "+tpidr-el3"
// RUN: %clang -target aarch64-linux -### -S %s -arch armv8a -mtp=el0 2>&1 | \
// RUN: FileCheck -check-prefix=ARMv8_THREAD_POINTER_EL0 %s
// ARMv8_THREAD_POINTER_EL0-NOT: "-target-feature" "+tpidr-el1"
// ARMv8_THREAD_POINTER_EL0-NOT: "-target-feature" "+tpidr-el2"
// ARMv8_THREAD_POINTER_EL0-NOT: "-target-feature" "+tpidr-el3"
// RUN: %clang -target aarch64-linux -### -S %s -arch armv8a -mtp=el1 2>&1 | \
// RUN: FileCheck -check-prefix=ARMv8_THREAD_POINTER_EL1 %s
// ARMv8_THREAD_POINTER_EL1: "-target-feature" "+tpidr-el1"
// ARMv8_THREAD_POINTER_EL1-NOT: "-target-feature" "+tpidr-el2"
// ARMv8_THREAD_POINTER_EL1-NOT: "-target-feature" "+tpidr-el3"
// RUN: %clang -target aarch64-linux -### -S %s -arch armv8a -mtp=el2 2>&1 | \
// RUN: FileCheck -check-prefix=ARMv8_THREAD_POINTER_EL2 %s
// ARMv8_THREAD_POINTER_EL2-NOT: "-target-feature" "+tpidr-el1"
// ARMv8_THREAD_POINTER_EL2: "-target-feature" "+tpidr-el2"
// ARMv8_THREAD_POINTER_EL2-NOT: "-target-feature" "+tpidr-el3"
// RUN: %clang -target aarch64-linux -### -S %s -arch armv8a -mtp=el3 2>&1 | \
// RUN: FileCheck -check-prefix=ARMv8_THREAD_POINTER_EL3 %s
// ARMv8_THREAD_POINTER_EL3-NOT: "-target-feature" "+tpidr-el1"
// ARMv8_THREAD_POINTER_EL3-NOT: "-target-feature" "+tpidr-el2"
// ARMv8_THREAD_POINTER_EL3: "-target-feature" "+tpidr-el3"
The clang driver has a fairly fancy support for executing gcc instead of clang itself. This dates back to clang's early days and while it looks like some of it is still used (for kext for example), other parts are probably dead. Remove the -ccc-clang-archs option and associated code. I don't think there is any remaining setup where clang doesn't support an architecture but it can expect an working gcc cross compiler to be available. A nice side effect is that tests no longer need to differentiate architectures that are included in production builds of clang and those that are not. llvm-svn: 165545
2012-10-10 04:46:28 +08:00
// RUN: %clang -target powerpc64-unknown-linux-gnu \
Use pipes. llvm-svn: 164469
2012-09-23 06:51:00 +08:00
// RUN: -### -S %s -mcpu=G5 2>&1 | FileCheck -check-prefix=PPCG5 %s
Add PPC support for translating gcc-style -mcpu options into LLVM -target-cpu options. This functionality is based on what is done on ARM, and enables selecting PPC CPUs in a way compatible with gcc's driver. Also, mirroring gcc (and what is done on x86), -mcpu=native support was added. This uses the host cpu detection from LLVM (which will also soon be updated by refactoring code currently in backend). In order for this to work, the target needs a list of valid CPUs -- we now accept all CPUs accepted by LLVM. A few preprocessor defines for common CPU types have been added. llvm-svn: 158334
2012-06-12 06:35:19 +08:00
// PPCG5: clang
// PPCG5: "-cc1"
// PPCG5: "-target-cpu" "g5"
The clang driver has a fairly fancy support for executing gcc instead of clang itself. This dates back to clang's early days and while it looks like some of it is still used (for kext for example), other parts are probably dead. Remove the -ccc-clang-archs option and associated code. I don't think there is any remaining setup where clang doesn't support an architecture but it can expect an working gcc cross compiler to be available. A nice side effect is that tests no longer need to differentiate architectures that are included in production builds of clang and those that are not. llvm-svn: 165545
2012-10-10 04:46:28 +08:00
// RUN: %clang -target powerpc64-unknown-linux-gnu \
Use pipes. llvm-svn: 164469
2012-09-23 06:51:00 +08:00
// RUN: -### -S %s -mcpu=power7 2>&1 | FileCheck -check-prefix=PPCPWR7 %s
Add PPC support for translating gcc-style -mcpu options into LLVM -target-cpu options. This functionality is based on what is done on ARM, and enables selecting PPC CPUs in a way compatible with gcc's driver. Also, mirroring gcc (and what is done on x86), -mcpu=native support was added. This uses the host cpu detection from LLVM (which will also soon be updated by refactoring code currently in backend). In order for this to work, the target needs a list of valid CPUs -- we now accept all CPUs accepted by LLVM. A few preprocessor defines for common CPU types have been added. llvm-svn: 158334
2012-06-12 06:35:19 +08:00
// PPCPWR7: clang
// PPCPWR7: "-cc1"
// PPCPWR7: "-target-cpu" "pwr7"
Add ppc64/power8 as a target llvm-svn: 211778
2014-06-26 21:34:10 +08:00
// RUN: %clang -target powerpc64-unknown-linux-gnu \
// RUN: -### -S %s -mcpu=power8 2>&1 | FileCheck -check-prefix=PPCPWR8 %s
// PPCPWR8: clang
// PPCPWR8: "-cc1"
// PPCPWR8: "-target-cpu" "pwr8"
Add some missing PPC cpus llvm-svn: 174215
2013-02-02 04:23:10 +08:00
// RUN: %clang -target powerpc64-unknown-linux-gnu \
// RUN: -### -S %s -mcpu=630 2>&1 | FileCheck -check-prefix=PPC630 %s
// PPC630: clang
// PPC630: "-cc1"
// PPC630: "-target-cpu" "pwr3"
// RUN: %clang -target powerpc64-unknown-linux-gnu \
// RUN: -### -S %s -mcpu=power3 2>&1 | FileCheck -check-prefix=PPCPOWER3 %s
// PPCPOWER3: clang
// PPCPOWER3: "-cc1"
// PPCPOWER3: "-target-cpu" "pwr3"
// RUN: %clang -target powerpc64-unknown-linux-gnu \
// RUN: -### -S %s -mcpu=pwr3 2>&1 | FileCheck -check-prefix=PPCPWR3 %s
// PPCPWR3: clang
// PPCPWR3: "-cc1"
// PPCPWR3: "-target-cpu" "pwr3"
// RUN: %clang -target powerpc64-unknown-linux-gnu \
// RUN: -### -S %s -mcpu=power4 2>&1 | FileCheck -check-prefix=PPCPOWER4 %s
// PPCPOWER4: clang
// PPCPOWER4: "-cc1"
// PPCPOWER4: "-target-cpu" "pwr4"
// RUN: %clang -target powerpc64-unknown-linux-gnu \
// RUN: -### -S %s -mcpu=pwr4 2>&1 | FileCheck -check-prefix=PPCPWR4 %s
// PPCPWR4: clang
// PPCPWR4: "-cc1"
// PPCPWR4: "-target-cpu" "pwr4"
// RUN: %clang -target powerpc64-unknown-linux-gnu \
// RUN: -### -S %s -mcpu=power5 2>&1 | FileCheck -check-prefix=PPCPOWER5 %s
// PPCPOWER5: clang
// PPCPOWER5: "-cc1"
// PPCPOWER5: "-target-cpu" "pwr5"
// RUN: %clang -target powerpc64-unknown-linux-gnu \
// RUN: -### -S %s -mcpu=pwr5 2>&1 | FileCheck -check-prefix=PPCPWR5 %s
// PPCPWR5: clang
// PPCPWR5: "-cc1"
// PPCPWR5: "-target-cpu" "pwr5"
// RUN: %clang -target powerpc64-unknown-linux-gnu \
// RUN: -### -S %s -mcpu=power5x 2>&1 | FileCheck -check-prefix=PPCPOWER5X %s
// PPCPOWER5X: clang
// PPCPOWER5X: "-cc1"
// PPCPOWER5X: "-target-cpu" "pwr5x"
// RUN: %clang -target powerpc64-unknown-linux-gnu \
// RUN: -### -S %s -mcpu=pwr5x 2>&1 | FileCheck -check-prefix=PPCPWR5X %s
// PPCPWR5X: clang
// PPCPWR5X: "-cc1"
// PPCPWR5X: "-target-cpu" "pwr5x"
// RUN: %clang -target powerpc64-unknown-linux-gnu \
// RUN: -### -S %s -mcpu=power6 2>&1 | FileCheck -check-prefix=PPCPOWER6 %s
// PPCPOWER6: clang
// PPCPOWER6: "-cc1"
// PPCPOWER6: "-target-cpu" "pwr6"
// RUN: %clang -target powerpc64-unknown-linux-gnu \
// RUN: -### -S %s -mcpu=pwr6 2>&1 | FileCheck -check-prefix=PPCPWR6 %s
// PPCPWR6: clang
// PPCPWR6: "-cc1"
// PPCPWR6: "-target-cpu" "pwr6"
// RUN: %clang -target powerpc64-unknown-linux-gnu \
// RUN: -### -S %s -mcpu=power6x 2>&1 | FileCheck -check-prefix=PPCPOWER6X %s
// PPCPOWER6X: clang
// PPCPOWER6X: "-cc1"
// PPCPOWER6X: "-target-cpu" "pwr6x"
// RUN: %clang -target powerpc64-unknown-linux-gnu \
// RUN: -### -S %s -mcpu=pwr6x 2>&1 | FileCheck -check-prefix=PPCPWR6X %s
// PPCPWR6X: clang
// PPCPWR6X: "-cc1"
// PPCPWR6X: "-target-cpu" "pwr6x"
// RUN: %clang -target powerpc64-unknown-linux-gnu \
// RUN: -### -S %s -mcpu=power7 2>&1 | FileCheck -check-prefix=PPCPOWER7 %s
// PPCPOWER7: clang
// PPCPOWER7: "-cc1"
// PPCPOWER7: "-target-cpu" "pwr7"
// RUN: %clang -target powerpc64-unknown-linux-gnu \
// RUN: -### -S %s -mcpu=powerpc 2>&1 | FileCheck -check-prefix=PPCPOWERPC %s
// PPCPOWERPC: clang
// PPCPOWERPC: "-cc1"
// PPCPOWERPC: "-target-cpu" "ppc"
// RUN: %clang -target powerpc64-unknown-linux-gnu \
// RUN: -### -S %s -mcpu=powerpc64 2>&1 | FileCheck -check-prefix=PPCPOWERPC64 %s
// PPCPOWERPC64: clang
// PPCPOWERPC64: "-cc1"
// PPCPOWERPC64: "-target-cpu" "ppc64"
The clang driver has a fairly fancy support for executing gcc instead of clang itself. This dates back to clang's early days and while it looks like some of it is still used (for kext for example), other parts are probably dead. Remove the -ccc-clang-archs option and associated code. I don't think there is any remaining setup where clang doesn't support an architecture but it can expect an working gcc cross compiler to be available. A nice side effect is that tests no longer need to differentiate architectures that are included in production builds of clang and those that are not. llvm-svn: 165545
2012-10-10 04:46:28 +08:00
// RUN: %clang -target powerpc64-unknown-linux-gnu \
Use pipes. llvm-svn: 164469
2012-09-23 06:51:00 +08:00
// RUN: -### -S %s 2>&1 | FileCheck -check-prefix=PPC64NS %s
Add PPC support for translating gcc-style -mcpu options into LLVM -target-cpu options. This functionality is based on what is done on ARM, and enables selecting PPC CPUs in a way compatible with gcc's driver. Also, mirroring gcc (and what is done on x86), -mcpu=native support was added. This uses the host cpu detection from LLVM (which will also soon be updated by refactoring code currently in backend). In order for this to work, the target needs a list of valid CPUs -- we now accept all CPUs accepted by LLVM. A few preprocessor defines for common CPU types have been added. llvm-svn: 158334
2012-06-12 06:35:19 +08:00
// PPC64NS: clang
// PPC64NS: "-cc1"
// PPC64NS: "-target-cpu" "ppc64"
Add e500mc and e5500 to the list of valid PPC CPU names. Patch by Tobias von Koch! llvm-svn: 164176
2012-09-19 06:25:03 +08:00
Add 8548 CPU definition and attributes 8548 CPU is GCC's name for the e500v2, so accept this in clang. The e500v2 doesn't support lwsync, so define __NO_LWSYNC__ for this as well, as GCC does. Differential Revision: https://reviews.llvm.org/D67787
2019-10-25 05:22:47 +08:00
// RUN: %clang -target powerpc-fsl-linux -### -S %s \
// RUN: -mcpu=e500 2>&1 | FileCheck -check-prefix=PPCE500 %s
// PPCE500: clang
// PPCE500: "-cc1"
// PPCE500: "-target-cpu" "e500"
// RUN: %clang -target powerpc-fsl-linux -### -S %s \
// RUN: -mcpu=8548 2>&1 | FileCheck -check-prefix=PPC8548 %s
// PPC8548: clang
// PPC8548: "-cc1"
// PPC8548: "-target-cpu" "e500"
The clang driver has a fairly fancy support for executing gcc instead of clang itself. This dates back to clang's early days and while it looks like some of it is still used (for kext for example), other parts are probably dead. Remove the -ccc-clang-archs option and associated code. I don't think there is any remaining setup where clang doesn't support an architecture but it can expect an working gcc cross compiler to be available. A nice side effect is that tests no longer need to differentiate architectures that are included in production builds of clang and those that are not. llvm-svn: 165545
2012-10-10 04:46:28 +08:00
// RUN: %clang -target powerpc-fsl-linux -### -S %s \
Use pipes. llvm-svn: 164469
2012-09-23 06:51:00 +08:00
// RUN: -mcpu=e500mc 2>&1 | FileCheck -check-prefix=PPCE500MC %s
Add e500mc and e5500 to the list of valid PPC CPU names. Patch by Tobias von Koch! llvm-svn: 164176
2012-09-19 06:25:03 +08:00
// PPCE500MC: clang
// PPCE500MC: "-cc1"
// PPCE500MC: "-target-cpu" "e500mc"
The clang driver has a fairly fancy support for executing gcc instead of clang itself. This dates back to clang's early days and while it looks like some of it is still used (for kext for example), other parts are probably dead. Remove the -ccc-clang-archs option and associated code. I don't think there is any remaining setup where clang doesn't support an architecture but it can expect an working gcc cross compiler to be available. A nice side effect is that tests no longer need to differentiate architectures that are included in production builds of clang and those that are not. llvm-svn: 165545
2012-10-10 04:46:28 +08:00
// RUN: %clang -target powerpc64-fsl-linux -### -S \
Use pipes. llvm-svn: 164469
2012-09-23 06:51:00 +08:00
// RUN: %s -mcpu=e5500 2>&1 | FileCheck -check-prefix=PPCE5500 %s
Add e500mc and e5500 to the list of valid PPC CPU names. Patch by Tobias von Koch! llvm-svn: 164176
2012-09-19 06:25:03 +08:00
// PPCE5500: clang
// PPCE5500: "-cc1"
// PPCE5500: "-target-cpu" "e5500"
Fix pr13749. There is still a lot of code using getArchName that should be using getArch, but I will try to fix them one at time to add tests. llvm-svn: 164460
2012-09-22 23:04:11 +08:00
// RUN: %clang -target amd64-unknown-openbsd5.2 -### -S %s 2>&1 | \
// RUN: FileCheck -check-prefix=AMD64 %s
// AMD64: clang
// AMD64: "-cc1"
// AMD64: "-triple"
// AMD64: "amd64-unknown-openbsd5.2"
// AMD64: "-munwind-tables"
Use getArch instead of getArchName. The darwin change should be a nop since Triple::getArchTypeForDarwinArchName doesn't know about amd64. If things like amd64-mingw32 are to be rejected, we should print a error earlier on instead of silently using the wrong abi. Remove old comment that looks out of place, this is "in clang". llvm-svn: 165368
2012-10-07 11:23:40 +08:00
// RUN: %clang -target amd64--mingw32 -### -S %s 2>&1 | \
// RUN: FileCheck -check-prefix=AMD64-MINGW %s
// AMD64-MINGW: clang
// AMD64-MINGW: "-cc1"
// AMD64-MINGW: "-triple"
[ADT] Normalize empty triple components LLVM triple normalization is handling "unknown" and empty components differently; for example given "x86_64-unknown-linux-gnu" and "x86_64-linux-gnu" which should be equivalent, triple normalization returns "x86_64-unknown-linux-gnu" and "x86_64--linux-gnu". autoconf's config.sub returns "x86_64-unknown-linux-gnu" for both "x86_64-linux-gnu" and "x86_64-unknown-linux-gnu". This changes the triple normalization to behave the same way, replacing empty triple components with "unknown". This addresses PR37129. Differential Revision: https://reviews.llvm.org/D50219 llvm-svn: 339294
2018-08-09 06:23:57 +08:00
// AMD64-MINGW: "amd64-unknown-windows-gnu"
Use getArch instead of getArchName. The darwin change should be a nop since Triple::getArchTypeForDarwinArchName doesn't know about amd64. If things like amd64-mingw32 are to be rejected, we should print a error earlier on instead of silently using the wrong abi. Remove old comment that looks out of place, this is "in clang". llvm-svn: 165368
2012-10-07 11:23:40 +08:00
// AMD64-MINGW: "-munwind-tables"
Improve x86 android support: * -Bsymbolic must be added for x86 as well. * Default CPU name also set to 'core2' for x86 android. Patch by Edwin Vane. llvm-svn: 167307
2012-11-03 04:41:30 +08:00
Rename target i386-linux-android to i686-linux-android llvm-svn: 199073
2014-01-13 11:49:38 +08:00
// RUN: %clang -target i686-linux-android -### -S %s 2>&1 \
Improve x86 android support: * -Bsymbolic must be added for x86 as well. * Default CPU name also set to 'core2' for x86 android. Patch by Edwin Vane. llvm-svn: 167307
2012-11-03 04:41:30 +08:00
// RUN: --sysroot=%S/Inputs/basic_android_tree/sysroot \
// RUN: | FileCheck --check-prefix=ANDROID-X86 %s
// ANDROID-X86: clang
Make x86 Android default target CPUs compatible with GCC (http://llvm-reviews.chandlerc.com/D2655) llvm-svn: 200510
2014-01-31 12:07:13 +08:00
// ANDROID-X86: "-target-cpu" "i686"
Align with new GCC options for x86 Android 32-bit: +ssse3 64-bit: +sse4.2 +popcnt Differential Revision: http://reviews.llvm.org/D4287 llvm-svn: 211688
2014-06-25 20:15:36 +08:00
// ANDROID-X86: "-target-feature" "+ssse3"
Improve x86 android support, add x86_64 android target llvm-svn: 199875
2014-01-23 17:08:32 +08:00
// RUN: %clang -target x86_64-linux-android -### -S %s 2>&1 \
// RUN: --sysroot=%S/Inputs/basic_android_tree/sysroot \
// RUN: | FileCheck --check-prefix=ANDROID-X86_64 %s
// ANDROID-X86_64: clang
Make x86 Android default target CPUs compatible with GCC (http://llvm-reviews.chandlerc.com/D2655) llvm-svn: 200510
2014-01-31 12:07:13 +08:00
// ANDROID-X86_64: "-target-cpu" "x86-64"
Align with new GCC options for x86 Android 32-bit: +ssse3 64-bit: +sse4.2 +popcnt Differential Revision: http://reviews.llvm.org/D4287 llvm-svn: 211688
2014-06-25 20:15:36 +08:00
// ANDROID-X86_64: "-target-feature" "+sse4.2"
// ANDROID-X86_64: "-target-feature" "+popcnt"
Fix a typo in target features There was a slight typo in r364352 that ended up causing our backend to complain on some x86 Android builds. This CL fixes that. Differential Revision: https://reviews.llvm.org/D64781 llvm-svn: 366276
2019-07-17 06:32:17 +08:00
// ANDROID-X86_64: "-target-feature" "+cx16"
[Mips] Add test to check translation MIPS triples to cpu and float abi options. llvm-svn: 200080
2014-01-26 00:03:59 +08:00
// RUN: %clang -target mips-linux-gnu -### -S %s 2>&1 | \
// RUN: FileCheck -check-prefix=MIPS %s
// MIPS: clang
// MIPS: "-cc1"
[Mips] Change default CPU for MIPS 32/64 targets. Now they are mips32r2/mips64r2 respectively. llvm-svn: 200222
2014-01-27 21:59:04 +08:00
// MIPS: "-target-cpu" "mips32r2"
[Mips] Add test to check translation MIPS triples to cpu and float abi options. llvm-svn: 200080
2014-01-26 00:03:59 +08:00
// MIPS: "-mfloat-abi" "hard"
[driver][mips] Support MIPS R6 target triples This change adds support for the following MIPS target triples: mipsisa32r6-linux-gnu mipsisa32r6el-linux-gnu mipsisa64r6-linux-gnuabi64 mipsisa64r6el-linux-gnuabi64 mipsisa64r6-linux-gnuabin32 mipsisa64r6el-linux-gnuabin32 Patch by Yun Qiang Su. Differential revision: https://reviews.llvm.org/D50850 llvm-svn: 344608
2018-10-16 22:29:27 +08:00
// RUN: %clang -target mipsisa32r6-linux-gnu -### -S %s 2>&1 | \
// RUN: FileCheck -check-prefix=MIPSR6 %s
// MIPSR6: clang
// MIPSR6: "-cc1"
// MIPSR6: "-target-cpu" "mips32r6"
// MIPSR6: "-mfloat-abi" "hard"
[Mips] Add test to check translation MIPS triples to cpu and float abi options. llvm-svn: 200080
2014-01-26 00:03:59 +08:00
// RUN: %clang -target mipsel-linux-gnu -### -S %s 2>&1 | \
// RUN: FileCheck -check-prefix=MIPSEL %s
// MIPSEL: clang
// MIPSEL: "-cc1"
[Mips] Change default CPU for MIPS 32/64 targets. Now they are mips32r2/mips64r2 respectively. llvm-svn: 200222
2014-01-27 21:59:04 +08:00
// MIPSEL: "-target-cpu" "mips32r2"
[Mips] Add test to check translation MIPS triples to cpu and float abi options. llvm-svn: 200080
2014-01-26 00:03:59 +08:00
// MIPSEL: "-mfloat-abi" "hard"
[driver][mips] Support MIPS R6 target triples This change adds support for the following MIPS target triples: mipsisa32r6-linux-gnu mipsisa32r6el-linux-gnu mipsisa64r6-linux-gnuabi64 mipsisa64r6el-linux-gnuabi64 mipsisa64r6-linux-gnuabin32 mipsisa64r6el-linux-gnuabin32 Patch by Yun Qiang Su. Differential revision: https://reviews.llvm.org/D50850 llvm-svn: 344608
2018-10-16 22:29:27 +08:00
// RUN: %clang -target mipsisa32r6el-linux-gnu -### -S %s 2>&1 | \
// RUN: FileCheck -check-prefix=MIPSR6EL %s
// MIPSR6EL: clang
// MIPSR6EL: "-cc1"
// MIPSR6EL: "-target-cpu" "mips32r6"
// MIPSR6EL: "-mfloat-abi" "hard"
[Mips] Add test to check translation MIPS triples to cpu and float abi options. llvm-svn: 200080
2014-01-26 00:03:59 +08:00
// RUN: %clang -target mipsel-linux-android -### -S %s 2>&1 | \
// RUN: FileCheck -check-prefix=MIPSEL-ANDROID %s
// MIPSEL-ANDROID: clang
// MIPSEL-ANDROID: "-cc1"
[Mips] Set mips32 as default CPU for MIPS32 Android Change default CPU for MIPS32 Android. Now it is mips32 (rev1). Differential Revision: http://reviews.llvm.org/D20313 llvm-svn: 269754
2016-05-17 18:46:10 +08:00
// MIPSEL-ANDROID: "-target-cpu" "mips32"
[Mips] Finetuning MIPS32 Android default variants MIPS32 Android defaults to FPXX ("-fpxx"). MIPS32R6 Android defaults to FP64A ("-mfp64 -mno-odd-spreg"). Differential Revision: http://reviews.llvm.org/D20345 llvm-svn: 269914
2016-05-18 20:46:06 +08:00
// MIPSEL-ANDROID: "-target-feature" "+fpxx"
// MIPSEL-ANDROID: "-target-feature" "+nooddspreg"
[Mips] Add test to check translation MIPS triples to cpu and float abi options. llvm-svn: 200080
2014-01-26 00:03:59 +08:00
// MIPSEL-ANDROID: "-mfloat-abi" "hard"
[Mips] Finetuning MIPS32 Android default variants MIPS32 Android defaults to FPXX ("-fpxx"). MIPS32R6 Android defaults to FP64A ("-mfp64 -mno-odd-spreg"). Differential Revision: http://reviews.llvm.org/D20345 llvm-svn: 269914
2016-05-18 20:46:06 +08:00
// RUN: %clang -target mipsel-linux-android -### -S %s -mcpu=mips32r6 2>&1 | \
// RUN: FileCheck -check-prefix=MIPSEL-ANDROID-R6 %s
// MIPSEL-ANDROID-R6: clang
// MIPSEL-ANDROID-R6: "-cc1"
// MIPSEL-ANDROID-R6: "-target-cpu" "mips32r6"
// MIPSEL-ANDROID-R6: "-target-feature" "+fp64"
// MIPSEL-ANDROID-R6: "-target-feature" "+nooddspreg"
// MIPSEL-ANDROID-R6: "-mfloat-abi" "hard"
[Mips] Add test to check translation MIPS triples to cpu and float abi options. llvm-svn: 200080
2014-01-26 00:03:59 +08:00
// RUN: %clang -target mips64-linux-gnu -### -S %s 2>&1 | \
// RUN: FileCheck -check-prefix=MIPS64 %s
// MIPS64: clang
// MIPS64: "-cc1"
[Mips] Change default CPU for MIPS 32/64 targets. Now they are mips32r2/mips64r2 respectively. llvm-svn: 200222
2014-01-27 21:59:04 +08:00
// MIPS64: "-target-cpu" "mips64r2"
[Mips] Add test to check translation MIPS triples to cpu and float abi options. llvm-svn: 200080
2014-01-26 00:03:59 +08:00
// MIPS64: "-mfloat-abi" "hard"
[driver][mips] Support MIPS R6 target triples This change adds support for the following MIPS target triples: mipsisa32r6-linux-gnu mipsisa32r6el-linux-gnu mipsisa64r6-linux-gnuabi64 mipsisa64r6el-linux-gnuabi64 mipsisa64r6-linux-gnuabin32 mipsisa64r6el-linux-gnuabin32 Patch by Yun Qiang Su. Differential revision: https://reviews.llvm.org/D50850 llvm-svn: 344608
2018-10-16 22:29:27 +08:00
// RUN: %clang -target mipsisa64r6-linux-gnu -### -S %s 2>&1 | \
// RUN: FileCheck -check-prefix=MIPS64R6 %s
// MIPS64R6: clang
// MIPS64R6: "-cc1"
// MIPS64R6: "-target-cpu" "mips64r6"
// MIPS64R6: "-mfloat-abi" "hard"
[Mips] Add test to check translation MIPS triples to cpu and float abi options. llvm-svn: 200080
2014-01-26 00:03:59 +08:00
// RUN: %clang -target mips64el-linux-gnu -### -S %s 2>&1 | \
// RUN: FileCheck -check-prefix=MIPS64EL %s
// MIPS64EL: clang
// MIPS64EL: "-cc1"
[Mips] Change default CPU for MIPS 32/64 targets. Now they are mips32r2/mips64r2 respectively. llvm-svn: 200222
2014-01-27 21:59:04 +08:00
// MIPS64EL: "-target-cpu" "mips64r2"
[Mips] Add test to check translation MIPS triples to cpu and float abi options. llvm-svn: 200080
2014-01-26 00:03:59 +08:00
// MIPS64EL: "-mfloat-abi" "hard"
[Mips] Add support for mips64el-linux-android triple. llvm-svn: 200081
2014-01-26 00:04:08 +08:00
[driver][mips] Support MIPS R6 target triples This change adds support for the following MIPS target triples: mipsisa32r6-linux-gnu mipsisa32r6el-linux-gnu mipsisa64r6-linux-gnuabi64 mipsisa64r6el-linux-gnuabi64 mipsisa64r6-linux-gnuabin32 mipsisa64r6el-linux-gnuabin32 Patch by Yun Qiang Su. Differential revision: https://reviews.llvm.org/D50850 llvm-svn: 344608
2018-10-16 22:29:27 +08:00
// RUN: %clang -target mipsisa64r6el-linux-gnu -### -S %s 2>&1 | \
// RUN: FileCheck -check-prefix=MIPS64R6EL %s
// MIPS64R6EL: clang
// MIPS64R6EL: "-cc1"
// MIPS64R6EL: "-target-cpu" "mips64r6"
// MIPS64R6EL: "-mfloat-abi" "hard"
[mips] Fix handling of GNUABIN32 environment in a target triple The `GNUABIN32` environment in a target triple implies using the N32 ABI. This patch adds support for this environment and switches on N32 ABI if necessary. Patch by Patch by YunQiang Su. Differential revision: https://reviews.llvm.org/D51464 llvm-svn: 344570
2018-10-16 06:43:23 +08:00
// RUN: %clang -target mips64-linux-gnuabi64 -### -S %s 2>&1 | \
// RUN: FileCheck -check-prefix=MIPS64-GNUABI64 %s
// MIPS64-GNUABI64: clang
// MIPS64-GNUABI64: "-cc1"
// MIPS64-GNUABI64: "-target-cpu" "mips64r2"
// MIPS64-GNUABI64: "-target-abi" "n64"
// MIPS64-GNUABI64: "-mfloat-abi" "hard"
[driver][mips] Support MIPS R6 target triples This change adds support for the following MIPS target triples: mipsisa32r6-linux-gnu mipsisa32r6el-linux-gnu mipsisa64r6-linux-gnuabi64 mipsisa64r6el-linux-gnuabi64 mipsisa64r6-linux-gnuabin32 mipsisa64r6el-linux-gnuabin32 Patch by Yun Qiang Su. Differential revision: https://reviews.llvm.org/D50850 llvm-svn: 344608
2018-10-16 22:29:27 +08:00
// RUN: %clang -target mipsisa64r6-linux-gnuabi64 -### -S %s 2>&1 | \
// RUN: FileCheck -check-prefix=MIPS64R6-GNUABI64 %s
// MIPS64R6-GNUABI64: clang
// MIPS64R6-GNUABI64: "-cc1"
// MIPS64R6-GNUABI64: "-target-cpu" "mips64r6"
// MIPS64R6-GNUABI64: "-target-abi" "n64"
// MIPS64R6-GNUABI64: "-mfloat-abi" "hard"
[mips] Fix handling of GNUABIN32 environment in a target triple The `GNUABIN32` environment in a target triple implies using the N32 ABI. This patch adds support for this environment and switches on N32 ABI if necessary. Patch by Patch by YunQiang Su. Differential revision: https://reviews.llvm.org/D51464 llvm-svn: 344570
2018-10-16 06:43:23 +08:00
// RUN: %clang -target mips64el-linux-gnuabi64 -### -S %s 2>&1 | \
// RUN: FileCheck -check-prefix=MIPS64EL-GNUABI64 %s
// MIPS64EL-GNUABI64: clang
// MIPS64EL-GNUABI64: "-cc1"
// MIPS64EL-GNUABI64: "-target-cpu" "mips64r2"
// MIPS64EL-GNUABI64: "-target-abi" "n64"
// MIPS64EL-GNUABI64: "-mfloat-abi" "hard"
[driver][mips] Support MIPS R6 target triples This change adds support for the following MIPS target triples: mipsisa32r6-linux-gnu mipsisa32r6el-linux-gnu mipsisa64r6-linux-gnuabi64 mipsisa64r6el-linux-gnuabi64 mipsisa64r6-linux-gnuabin32 mipsisa64r6el-linux-gnuabin32 Patch by Yun Qiang Su. Differential revision: https://reviews.llvm.org/D50850 llvm-svn: 344608
2018-10-16 22:29:27 +08:00
// RUN: %clang -target mipsisa64r6el-linux-gnuabi64 -### -S %s 2>&1 | \
// RUN: FileCheck -check-prefix=MIPS64R6EL-GNUABI64 %s
// MIPS64R6EL-GNUABI64: clang
// MIPS64R6EL-GNUABI64: "-cc1"
// MIPS64R6EL-GNUABI64: "-target-cpu" "mips64r6"
// MIPS64R6EL-GNUABI64: "-target-abi" "n64"
// MIPS64R6EL-GNUABI64: "-mfloat-abi" "hard"
[mips] Fix handling of GNUABIN32 environment in a target triple The `GNUABIN32` environment in a target triple implies using the N32 ABI. This patch adds support for this environment and switches on N32 ABI if necessary. Patch by Patch by YunQiang Su. Differential revision: https://reviews.llvm.org/D51464 llvm-svn: 344570
2018-10-16 06:43:23 +08:00
// RUN: %clang -target mips64-linux-gnuabin32 -### -S %s 2>&1 | \
// RUN: FileCheck -check-prefix=MIPSN32 %s
// MIPSN32: clang
// MIPSN32: "-cc1"
// MIPSN32: "-target-cpu" "mips64r2"
// MIPSN32: "-target-abi" "n32"
// MIPSN32: "-mfloat-abi" "hard"
[driver][mips] Support MIPS R6 target triples This change adds support for the following MIPS target triples: mipsisa32r6-linux-gnu mipsisa32r6el-linux-gnu mipsisa64r6-linux-gnuabi64 mipsisa64r6el-linux-gnuabi64 mipsisa64r6-linux-gnuabin32 mipsisa64r6el-linux-gnuabin32 Patch by Yun Qiang Su. Differential revision: https://reviews.llvm.org/D50850 llvm-svn: 344608
2018-10-16 22:29:27 +08:00
// RUN: %clang -target mipsisa64r6-linux-gnuabin32 -### -S %s 2>&1 | \
// RUN: FileCheck -check-prefix=MIPSN32R6 %s
// MIPSN32R6: clang
// MIPSN32R6: "-cc1"
// MIPSN32R6: "-target-cpu" "mips64r6"
// MIPSN32R6: "-target-abi" "n32"
// MIPSN32R6: "-mfloat-abi" "hard"
[mips] Fix handling of GNUABIN32 environment in a target triple The `GNUABIN32` environment in a target triple implies using the N32 ABI. This patch adds support for this environment and switches on N32 ABI if necessary. Patch by Patch by YunQiang Su. Differential revision: https://reviews.llvm.org/D51464 llvm-svn: 344570
2018-10-16 06:43:23 +08:00
// RUN: %clang -target mips64el-linux-gnuabin32 -### -S %s 2>&1 | \
// RUN: FileCheck -check-prefix=MIPSN32EL %s
// MIPSN32EL: clang
// MIPSN32EL: "-cc1"
// MIPSN32EL: "-target-cpu" "mips64r2"
// MIPSN32EL: "-target-abi" "n32"
// MIPSN32EL: "-mfloat-abi" "hard"
[driver][mips] Support MIPS R6 target triples This change adds support for the following MIPS target triples: mipsisa32r6-linux-gnu mipsisa32r6el-linux-gnu mipsisa64r6-linux-gnuabi64 mipsisa64r6el-linux-gnuabi64 mipsisa64r6-linux-gnuabin32 mipsisa64r6el-linux-gnuabin32 Patch by Yun Qiang Su. Differential revision: https://reviews.llvm.org/D50850 llvm-svn: 344608
2018-10-16 22:29:27 +08:00
// RUN: %clang -target mipsisa64r6el-linux-gnuabin32 -### -S %s 2>&1 | \
// RUN: FileCheck -check-prefix=MIPSN32R6EL %s
// MIPSN32R6EL: clang
// MIPSN32R6EL: "-cc1"
// MIPSN32R6EL: "-target-cpu" "mips64r6"
// MIPSN32R6EL: "-target-abi" "n32"
// MIPSN32R6EL: "-mfloat-abi" "hard"
[Mips] Add support for mips64el-linux-android triple. llvm-svn: 200081
2014-01-26 00:04:08 +08:00
// RUN: %clang -target mips64el-linux-android -### -S %s 2>&1 | \
// RUN: FileCheck -check-prefix=MIPS64EL-ANDROID %s
// MIPS64EL-ANDROID: clang
// MIPS64EL-ANDROID: "-cc1"
[Mips] Set mips64r6 as default CPU for MIPS64 Android Change default CPU for MIPS64 Android. Now it is mips64r6. Differential Revision: http://reviews.llvm.org/D11294 llvm-svn: 242522
2015-07-17 20:57:30 +08:00
// MIPS64EL-ANDROID: "-target-cpu" "mips64r6"
[Mips] Add support for mips64el-linux-android triple. llvm-svn: 200081
2014-01-26 00:04:08 +08:00
// MIPS64EL-ANDROID: "-mfloat-abi" "hard"