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llvm-project/llvm/test/CodeGen/Mips/Fast-ISel/nullvoid.ll

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Revert r276982 and r276984: [mips][fastisel] Handle 0-4 arguments without SelectionDAG It seems that the stack offset in callabi.ll varies between machines. I'll look into it. llvm-svn: 276989
2016-07-28 23:37:42 +08:00
; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=1 -mcpu=mips32r2 \
Add Simple return instruction to Mips fast-isel Reviewers: dsanders Reviewed by: dsanders Differential Revision: http://reviews.llvm.org/D3430 llvm-svn: 207565
2014-04-30 01:57:50 +08:00
; RUN: < %s | FileCheck %s
Revert r276982 and r276984: [mips][fastisel] Handle 0-4 arguments without SelectionDAG It seems that the stack offset in callabi.ll varies between machines. I'll look into it. llvm-svn: 276989
2016-07-28 23:37:42 +08:00
; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=1 -mcpu=mips32 \
Add mips32 r1 to the list of supported targets for Mips fast-isel Summary: Expand list of supported targets for Mips to include mips32 r1. Previously it only include r2. More patches are coming where there is a difference but in the current patches as pushed upstream, r1 and r2 are equivalent. Test Plan: simplestorefp1.ll add new build bots at mips to test this flavor at both -O0 and -O2 Reviewers: dsanders Reviewed By: dsanders Differential Revision: http://reviews.llvm.org/D5306 llvm-svn: 217821
2014-09-16 04:30:25 +08:00
; RUN: < %s | FileCheck %s
Add Simple return instruction to Mips fast-isel Reviewers: dsanders Reviewed by: dsanders Differential Revision: http://reviews.llvm.org/D3430 llvm-svn: 207565
2014-04-30 01:57:50 +08:00
; Function Attrs: nounwind
define void @foo() {
entry:
ret void
; CHECK: jr $ra
}