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llvm-project/llvm/test/CodeGen/Mips/vector-load-store.ll

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MIPS DSP: add vector load/store patterns. llvm-svn: 164744
2012-09-27 09:50:59 +08:00
; RUN: llc -march=mipsel -mattr=+dsp < %s | FileCheck %s
@g1 = common global <2 x i16> zeroinitializer, align 4
@g0 = common global <2 x i16> zeroinitializer, align 4
@g3 = common global <4 x i8> zeroinitializer, align 4
@g2 = common global <4 x i8> zeroinitializer, align 4
define void @func_v2i16() nounwind {
entry:
; CHECK: lw
; CHECK: sw
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction Essentially the same as the GEP change in r230786. A similar migration script can be used to update test cases, though a few more test case improvements/changes were required this time around: (r229269-r229278) import fileinput import sys import re pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)") for line in sys.stdin: sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line)) Reviewers: rafael, dexonsmith, grosser Differential Revision: http://reviews.llvm.org/D7649 llvm-svn: 230794
2015-02-28 05:17:42 +08:00
%0 = load <2 x i16>, <2 x i16>* @g1, align 4
MIPS DSP: add vector load/store patterns. llvm-svn: 164744
2012-09-27 09:50:59 +08:00
store <2 x i16> %0, <2 x i16>* @g0, align 4
ret void
}
define void @func_v4i8() nounwind {
entry:
; CHECK: lw
; CHECK: sw
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction Essentially the same as the GEP change in r230786. A similar migration script can be used to update test cases, though a few more test case improvements/changes were required this time around: (r229269-r229278) import fileinput import sys import re pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)") for line in sys.stdin: sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line)) Reviewers: rafael, dexonsmith, grosser Differential Revision: http://reviews.llvm.org/D7649 llvm-svn: 230794
2015-02-28 05:17:42 +08:00
%0 = load <4 x i8>, <4 x i8>* @g3, align 4
MIPS DSP: add vector load/store patterns. llvm-svn: 164744
2012-09-27 09:50:59 +08:00
store <4 x i8> %0, <4 x i8>* @g2, align 4
ret void
}