2012-02-17 16:55:11 +08:00
|
|
|
//===-- MipsMCTargetDesc.cpp - Mips Target Descriptions -------------------===//
|
2011-07-15 04:59:42 +08:00
|
|
|
//
|
|
|
|
// The LLVM Compiler Infrastructure
|
|
|
|
//
|
|
|
|
// This file is distributed under the University of Illinois Open Source
|
|
|
|
// License. See LICENSE.TXT for details.
|
|
|
|
//
|
|
|
|
//===----------------------------------------------------------------------===//
|
|
|
|
//
|
|
|
|
// This file provides Mips specific target descriptions.
|
|
|
|
//
|
|
|
|
//===----------------------------------------------------------------------===//
|
|
|
|
|
2011-07-26 05:20:24 +08:00
|
|
|
#include "InstPrinter/MipsInstPrinter.h"
|
2012-12-04 00:50:05 +08:00
|
|
|
#include "MipsMCAsmInfo.h"
|
2014-02-28 18:00:38 +08:00
|
|
|
#include "MipsMCNaCl.h"
|
|
|
|
#include "MipsMCTargetDesc.h"
|
2013-10-08 21:08:17 +08:00
|
|
|
#include "MipsTargetStreamer.h"
|
2014-02-19 23:55:21 +08:00
|
|
|
#include "llvm/ADT/Triple.h"
|
2011-08-24 04:15:21 +08:00
|
|
|
#include "llvm/MC/MCCodeGenInfo.h"
|
2013-10-06 00:42:21 +08:00
|
|
|
#include "llvm/MC/MCELFStreamer.h"
|
2011-07-15 04:59:42 +08:00
|
|
|
#include "llvm/MC/MCInstrInfo.h"
|
|
|
|
#include "llvm/MC/MCRegisterInfo.h"
|
|
|
|
#include "llvm/MC/MCSubtargetInfo.h"
|
2013-10-08 21:08:17 +08:00
|
|
|
#include "llvm/MC/MCSymbol.h"
|
2012-12-04 00:50:05 +08:00
|
|
|
#include "llvm/MC/MachineLocation.h"
|
2013-10-08 21:08:17 +08:00
|
|
|
#include "llvm/Support/CommandLine.h"
|
2012-02-05 15:21:30 +08:00
|
|
|
#include "llvm/Support/ErrorHandling.h"
|
2013-10-08 21:08:17 +08:00
|
|
|
#include "llvm/Support/FormattedStream.h"
|
2011-08-25 02:08:43 +08:00
|
|
|
#include "llvm/Support/TargetRegistry.h"
|
2011-07-15 04:59:42 +08:00
|
|
|
|
|
|
|
#define GET_INSTRINFO_MC_DESC
|
|
|
|
#include "MipsGenInstrInfo.inc"
|
|
|
|
|
|
|
|
#define GET_SUBTARGETINFO_MC_DESC
|
|
|
|
#include "MipsGenSubtargetInfo.inc"
|
|
|
|
|
|
|
|
#define GET_REGINFO_MC_DESC
|
|
|
|
#include "MipsGenRegisterInfo.inc"
|
|
|
|
|
|
|
|
using namespace llvm;
|
|
|
|
|
2014-02-20 21:13:33 +08:00
|
|
|
/// Select the Mips CPU for the given triple and cpu name.
|
|
|
|
/// FIXME: Merge with the copy in MipsSubtarget.cpp
|
|
|
|
static inline StringRef selectMipsCPU(StringRef TT, StringRef CPU) {
|
2014-02-26 18:20:15 +08:00
|
|
|
if (CPU.empty() || CPU == "generic") {
|
2014-02-20 21:13:33 +08:00
|
|
|
Triple TheTriple(TT);
|
|
|
|
if (TheTriple.getArch() == Triple::mips ||
|
|
|
|
TheTriple.getArch() == Triple::mipsel)
|
|
|
|
CPU = "mips32";
|
|
|
|
else
|
|
|
|
CPU = "mips64";
|
|
|
|
}
|
|
|
|
return CPU;
|
|
|
|
}
|
|
|
|
|
2011-07-15 07:50:31 +08:00
|
|
|
static MCInstrInfo *createMipsMCInstrInfo() {
|
2011-07-15 04:59:42 +08:00
|
|
|
MCInstrInfo *X = new MCInstrInfo();
|
|
|
|
InitMipsMCInstrInfo(X);
|
|
|
|
return X;
|
|
|
|
}
|
|
|
|
|
2011-07-19 04:57:22 +08:00
|
|
|
static MCRegisterInfo *createMipsMCRegisterInfo(StringRef TT) {
|
|
|
|
MCRegisterInfo *X = new MCRegisterInfo();
|
|
|
|
InitMipsMCRegisterInfo(X, Mips::RA);
|
|
|
|
return X;
|
|
|
|
}
|
|
|
|
|
2011-07-15 07:50:31 +08:00
|
|
|
static MCSubtargetInfo *createMipsMCSubtargetInfo(StringRef TT, StringRef CPU,
|
|
|
|
StringRef FS) {
|
2014-02-20 21:13:33 +08:00
|
|
|
CPU = selectMipsCPU(TT, CPU);
|
2011-07-15 04:59:42 +08:00
|
|
|
MCSubtargetInfo *X = new MCSubtargetInfo();
|
2014-02-20 00:13:26 +08:00
|
|
|
InitMipsMCSubtargetInfo(X, TT, CPU, FS);
|
2011-07-15 04:59:42 +08:00
|
|
|
return X;
|
|
|
|
}
|
|
|
|
|
2013-05-13 09:16:13 +08:00
|
|
|
static MCAsmInfo *createMipsMCAsmInfo(const MCRegisterInfo &MRI, StringRef TT) {
|
2013-05-11 02:16:59 +08:00
|
|
|
MCAsmInfo *MAI = new MipsMCAsmInfo(TT);
|
2011-07-19 06:29:13 +08:00
|
|
|
|
2013-05-13 09:16:13 +08:00
|
|
|
unsigned SP = MRI.getDwarfRegNum(Mips::SP, true);
|
|
|
|
MCCFIInstruction Inst = MCCFIInstruction::createDefCfa(0, SP, 0);
|
|
|
|
MAI->addInitialFrameState(Inst);
|
2011-07-19 06:29:13 +08:00
|
|
|
|
|
|
|
return MAI;
|
|
|
|
}
|
|
|
|
|
2011-07-23 08:01:04 +08:00
|
|
|
static MCCodeGenInfo *createMipsMCCodeGenInfo(StringRef TT, Reloc::Model RM,
|
2011-11-16 16:38:26 +08:00
|
|
|
CodeModel::Model CM,
|
|
|
|
CodeGenOpt::Level OL) {
|
2011-07-19 14:37:02 +08:00
|
|
|
MCCodeGenInfo *X = new MCCodeGenInfo();
|
2012-03-31 10:38:36 +08:00
|
|
|
if (CM == CodeModel::JITDefault)
|
|
|
|
RM = Reloc::Static;
|
|
|
|
else if (RM == Reloc::Default)
|
2011-09-14 02:55:33 +08:00
|
|
|
RM = Reloc::PIC_;
|
2011-11-16 16:38:26 +08:00
|
|
|
X->InitMCCodeGenInfo(RM, CM, OL);
|
2011-07-19 14:37:02 +08:00
|
|
|
return X;
|
|
|
|
}
|
|
|
|
|
2011-07-26 05:20:24 +08:00
|
|
|
static MCInstPrinter *createMipsMCInstPrinter(const Target &T,
|
|
|
|
unsigned SyntaxVariant,
|
2011-09-08 01:24:38 +08:00
|
|
|
const MCAsmInfo &MAI,
|
2012-04-02 14:09:36 +08:00
|
|
|
const MCInstrInfo &MII,
|
2012-03-06 03:33:20 +08:00
|
|
|
const MCRegisterInfo &MRI,
|
2011-09-08 01:24:38 +08:00
|
|
|
const MCSubtargetInfo &STI) {
|
2012-04-02 14:09:36 +08:00
|
|
|
return new MipsInstPrinter(MAI, MII, MRI);
|
2011-07-26 05:20:24 +08:00
|
|
|
}
|
|
|
|
|
2011-10-01 05:29:38 +08:00
|
|
|
static MCStreamer *createMCStreamer(const Target &T, StringRef TT,
|
2013-10-08 21:08:17 +08:00
|
|
|
MCContext &Context, MCAsmBackend &MAB,
|
|
|
|
raw_ostream &OS, MCCodeEmitter *Emitter,
|
2014-01-26 14:38:58 +08:00
|
|
|
const MCSubtargetInfo &STI,
|
2013-10-08 21:08:17 +08:00
|
|
|
bool RelaxAll, bool NoExecStack) {
|
2014-02-28 18:00:38 +08:00
|
|
|
MCStreamer *S;
|
|
|
|
if (!Triple(TT).isOSNaCl())
|
|
|
|
S = createELFStreamer(Context, MAB, OS, Emitter, RelaxAll, NoExecStack);
|
|
|
|
else
|
|
|
|
S = createMipsNaClELFStreamer(Context, MAB, OS, Emitter, RelaxAll,
|
|
|
|
NoExecStack);
|
2014-01-26 14:57:13 +08:00
|
|
|
new MipsTargetELFStreamer(*S, STI);
|
2014-01-26 14:06:37 +08:00
|
|
|
return S;
|
2013-10-08 21:08:17 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
static MCStreamer *
|
|
|
|
createMCAsmStreamer(MCContext &Ctx, formatted_raw_ostream &OS,
|
2014-02-06 02:00:21 +08:00
|
|
|
bool isVerboseAsm, bool useCFI, bool useDwarfDirectory,
|
|
|
|
MCInstPrinter *InstPrint, MCCodeEmitter *CE,
|
|
|
|
MCAsmBackend *TAB, bool ShowInst) {
|
2014-01-26 14:06:37 +08:00
|
|
|
MCStreamer *S =
|
2014-02-06 02:00:21 +08:00
|
|
|
llvm::createAsmStreamer(Ctx, OS, isVerboseAsm, useCFI, useDwarfDirectory,
|
|
|
|
InstPrint, CE, TAB, ShowInst);
|
2014-01-26 14:06:37 +08:00
|
|
|
new MipsTargetAsmStreamer(*S, OS);
|
|
|
|
return S;
|
2011-10-01 05:29:38 +08:00
|
|
|
}
|
|
|
|
|
2011-07-23 05:58:54 +08:00
|
|
|
extern "C" void LLVMInitializeMipsTargetMC() {
|
|
|
|
// Register the MC asm info.
|
|
|
|
RegisterMCAsmInfoFn X(TheMipsTarget, createMipsMCAsmInfo);
|
|
|
|
RegisterMCAsmInfoFn Y(TheMipselTarget, createMipsMCAsmInfo);
|
2011-09-21 11:00:58 +08:00
|
|
|
RegisterMCAsmInfoFn A(TheMips64Target, createMipsMCAsmInfo);
|
|
|
|
RegisterMCAsmInfoFn B(TheMips64elTarget, createMipsMCAsmInfo);
|
2011-07-23 05:58:54 +08:00
|
|
|
|
|
|
|
// Register the MC codegen info.
|
2011-07-19 14:37:02 +08:00
|
|
|
TargetRegistry::RegisterMCCodeGenInfo(TheMipsTarget,
|
|
|
|
createMipsMCCodeGenInfo);
|
|
|
|
TargetRegistry::RegisterMCCodeGenInfo(TheMipselTarget,
|
|
|
|
createMipsMCCodeGenInfo);
|
2011-09-21 11:00:58 +08:00
|
|
|
TargetRegistry::RegisterMCCodeGenInfo(TheMips64Target,
|
|
|
|
createMipsMCCodeGenInfo);
|
|
|
|
TargetRegistry::RegisterMCCodeGenInfo(TheMips64elTarget,
|
|
|
|
createMipsMCCodeGenInfo);
|
2011-07-23 05:58:54 +08:00
|
|
|
|
|
|
|
// Register the MC instruction info.
|
|
|
|
TargetRegistry::RegisterMCInstrInfo(TheMipsTarget, createMipsMCInstrInfo);
|
2011-09-21 11:00:58 +08:00
|
|
|
TargetRegistry::RegisterMCInstrInfo(TheMipselTarget, createMipsMCInstrInfo);
|
|
|
|
TargetRegistry::RegisterMCInstrInfo(TheMips64Target, createMipsMCInstrInfo);
|
2012-03-01 09:53:15 +08:00
|
|
|
TargetRegistry::RegisterMCInstrInfo(TheMips64elTarget,
|
|
|
|
createMipsMCInstrInfo);
|
2011-07-23 05:58:54 +08:00
|
|
|
|
|
|
|
// Register the MC register info.
|
|
|
|
TargetRegistry::RegisterMCRegInfo(TheMipsTarget, createMipsMCRegisterInfo);
|
|
|
|
TargetRegistry::RegisterMCRegInfo(TheMipselTarget, createMipsMCRegisterInfo);
|
2011-09-21 11:00:58 +08:00
|
|
|
TargetRegistry::RegisterMCRegInfo(TheMips64Target, createMipsMCRegisterInfo);
|
|
|
|
TargetRegistry::RegisterMCRegInfo(TheMips64elTarget,
|
|
|
|
createMipsMCRegisterInfo);
|
2011-07-23 05:58:54 +08:00
|
|
|
|
2011-10-01 04:40:03 +08:00
|
|
|
// Register the MC Code Emitter
|
2012-03-01 09:53:15 +08:00
|
|
|
TargetRegistry::RegisterMCCodeEmitter(TheMipsTarget,
|
|
|
|
createMipsMCCodeEmitterEB);
|
2011-10-01 04:40:03 +08:00
|
|
|
TargetRegistry::RegisterMCCodeEmitter(TheMipselTarget,
|
2012-03-01 09:53:15 +08:00
|
|
|
createMipsMCCodeEmitterEL);
|
2011-10-01 04:40:03 +08:00
|
|
|
TargetRegistry::RegisterMCCodeEmitter(TheMips64Target,
|
2012-03-01 09:53:15 +08:00
|
|
|
createMipsMCCodeEmitterEB);
|
2011-10-01 04:40:03 +08:00
|
|
|
TargetRegistry::RegisterMCCodeEmitter(TheMips64elTarget,
|
2012-03-01 09:53:15 +08:00
|
|
|
createMipsMCCodeEmitterEL);
|
2011-10-01 04:40:03 +08:00
|
|
|
|
2011-10-01 05:29:38 +08:00
|
|
|
// Register the object streamer.
|
|
|
|
TargetRegistry::RegisterMCObjectStreamer(TheMipsTarget, createMCStreamer);
|
|
|
|
TargetRegistry::RegisterMCObjectStreamer(TheMipselTarget, createMCStreamer);
|
|
|
|
TargetRegistry::RegisterMCObjectStreamer(TheMips64Target, createMCStreamer);
|
2012-03-01 09:53:15 +08:00
|
|
|
TargetRegistry::RegisterMCObjectStreamer(TheMips64elTarget,
|
|
|
|
createMCStreamer);
|
2011-10-01 05:29:38 +08:00
|
|
|
|
2013-10-08 21:08:17 +08:00
|
|
|
// Register the asm streamer.
|
|
|
|
TargetRegistry::RegisterAsmStreamer(TheMipsTarget, createMCAsmStreamer);
|
|
|
|
TargetRegistry::RegisterAsmStreamer(TheMipselTarget, createMCAsmStreamer);
|
|
|
|
TargetRegistry::RegisterAsmStreamer(TheMips64Target, createMCAsmStreamer);
|
|
|
|
TargetRegistry::RegisterAsmStreamer(TheMips64elTarget, createMCAsmStreamer);
|
|
|
|
|
2011-10-01 05:23:45 +08:00
|
|
|
// Register the asm backend.
|
2012-01-11 12:04:14 +08:00
|
|
|
TargetRegistry::RegisterMCAsmBackend(TheMipsTarget,
|
2012-04-03 03:25:22 +08:00
|
|
|
createMipsAsmBackendEB32);
|
2012-01-11 12:04:14 +08:00
|
|
|
TargetRegistry::RegisterMCAsmBackend(TheMipselTarget,
|
2012-04-03 03:25:22 +08:00
|
|
|
createMipsAsmBackendEL32);
|
2012-01-11 12:04:14 +08:00
|
|
|
TargetRegistry::RegisterMCAsmBackend(TheMips64Target,
|
2012-04-03 03:25:22 +08:00
|
|
|
createMipsAsmBackendEB64);
|
2012-01-11 12:04:14 +08:00
|
|
|
TargetRegistry::RegisterMCAsmBackend(TheMips64elTarget,
|
2012-04-03 03:25:22 +08:00
|
|
|
createMipsAsmBackendEL64);
|
2011-11-12 06:58:42 +08:00
|
|
|
|
2011-07-23 05:58:54 +08:00
|
|
|
// Register the MC subtarget info.
|
|
|
|
TargetRegistry::RegisterMCSubtargetInfo(TheMipsTarget,
|
|
|
|
createMipsMCSubtargetInfo);
|
2011-09-21 11:00:58 +08:00
|
|
|
TargetRegistry::RegisterMCSubtargetInfo(TheMipselTarget,
|
|
|
|
createMipsMCSubtargetInfo);
|
|
|
|
TargetRegistry::RegisterMCSubtargetInfo(TheMips64Target,
|
|
|
|
createMipsMCSubtargetInfo);
|
|
|
|
TargetRegistry::RegisterMCSubtargetInfo(TheMips64elTarget,
|
|
|
|
createMipsMCSubtargetInfo);
|
2011-07-26 05:20:24 +08:00
|
|
|
|
|
|
|
// Register the MCInstPrinter.
|
|
|
|
TargetRegistry::RegisterMCInstPrinter(TheMipsTarget,
|
|
|
|
createMipsMCInstPrinter);
|
|
|
|
TargetRegistry::RegisterMCInstPrinter(TheMipselTarget,
|
|
|
|
createMipsMCInstPrinter);
|
2011-09-21 11:00:58 +08:00
|
|
|
TargetRegistry::RegisterMCInstPrinter(TheMips64Target,
|
|
|
|
createMipsMCInstPrinter);
|
|
|
|
TargetRegistry::RegisterMCInstPrinter(TheMips64elTarget,
|
|
|
|
createMipsMCInstPrinter);
|
2011-07-19 14:37:02 +08:00
|
|
|
}
|