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llvm-project/llvm/test/MC/RISCV/function-call.s

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[RISCV] Support "call" pseudoinstruction in the MC layer To do this: 1. Add PseudoCALLIndirct to match indirect function call. 2. Add PseudoCALL to support parsing and print pseudo `call` in assembly 3. Expand PseudoCALL to the following form with R_RISCV_CALL relocation type while encoding: auipc ra, func jalr ra, ra, 0 If we expand PseudoCALL before emitting assembly, we will see auipc and jalr pair when compile with -S. It's hard for assembly parser to parsing this pair and identify it's semantic is function call and then insert R_RISCV_CALL relocation type. Although we could insert R_RISCV_PCREL_HI20 and R_RISCV_PCREL_LO12_I relocation types instead of R_RISCV_CALL. Due to RISCV relocation design, auipc and jalr pair only can relax to jal with R_RISCV_CALL + R_RISCV_RELAX relocation types. We expand PseudoCALL as late as encoding(RISCVMCCodeEmitter) instead of before emitting assembly(RISCVAsmPrinter) because we want to preserve call pseudoinstruction in assembly code. It's more readable and assembly parser could identify call assembly and insert R_RISCV_CALL relocation type. Differential Revision: https://reviews.llvm.org/D45859 llvm-svn: 330826
2018-04-25 22:18:55 +08:00
# RUN: llvm-mc -filetype=obj -triple riscv32 < %s \
# RUN: | llvm-objdump -d - | FileCheck -check-prefix=INSTR %s
# RUN: llvm-mc -filetype=obj -triple riscv32 < %s \
# RUN: | llvm-readobj -r | FileCheck -check-prefix=RELOC %s
# RUN: llvm-mc -triple riscv32 < %s -show-encoding \
# RUN: | FileCheck -check-prefix=FIXUP %s
.long foo
call foo
# RELOC: R_RISCV_CALL foo 0x0
# INSTR: auipc ra, 0
# INSTR: jalr ra
[RISCV] Support resolving fixup_riscv_call and add to MCFixupKindInfo table Resolving fixup_riscv_call by assembler when the linker relaxation diabled and the function and callsite within the same compile unit. And also adding static_assert after Infos array declaration to avoid missing any new fixup in MCFixupKindInfo in the future. Differential Revision: https://reviews.llvm.org/D47126 llvm-svn: 333487
2018-05-30 09:16:36 +08:00
# FIXUP: fixup A - offset: 0, value: foo, kind: fixup_riscv_call
[RISCV] Support "call" pseudoinstruction in the MC layer To do this: 1. Add PseudoCALLIndirct to match indirect function call. 2. Add PseudoCALL to support parsing and print pseudo `call` in assembly 3. Expand PseudoCALL to the following form with R_RISCV_CALL relocation type while encoding: auipc ra, func jalr ra, ra, 0 If we expand PseudoCALL before emitting assembly, we will see auipc and jalr pair when compile with -S. It's hard for assembly parser to parsing this pair and identify it's semantic is function call and then insert R_RISCV_CALL relocation type. Although we could insert R_RISCV_PCREL_HI20 and R_RISCV_PCREL_LO12_I relocation types instead of R_RISCV_CALL. Due to RISCV relocation design, auipc and jalr pair only can relax to jal with R_RISCV_CALL + R_RISCV_RELAX relocation types. We expand PseudoCALL as late as encoding(RISCVMCCodeEmitter) instead of before emitting assembly(RISCVAsmPrinter) because we want to preserve call pseudoinstruction in assembly code. It's more readable and assembly parser could identify call assembly and insert R_RISCV_CALL relocation type. Differential Revision: https://reviews.llvm.org/D45859 llvm-svn: 330826
2018-04-25 22:18:55 +08:00
call bar
# RELOC: R_RISCV_CALL bar 0x0
# INSTR: auipc ra, 0
# INSTR: jalr ra
[RISCV] Support resolving fixup_riscv_call and add to MCFixupKindInfo table Resolving fixup_riscv_call by assembler when the linker relaxation diabled and the function and callsite within the same compile unit. And also adding static_assert after Infos array declaration to avoid missing any new fixup in MCFixupKindInfo in the future. Differential Revision: https://reviews.llvm.org/D47126 llvm-svn: 333487
2018-05-30 09:16:36 +08:00
# FIXUP: fixup A - offset: 0, value: bar, kind: fixup_riscv_call
[RISCV] Allow call pseudoinstruction to be used to call a function name that coincides with a register name Previously `call zero`, `call f0` etc would fail. This leads to compilation failures if building programs that define functions with those names and using -save-temps. llvm-svn: 330846
2018-04-26 01:25:29 +08:00
# Ensure that calls to functions whose names coincide with register names work.
call zero
# RELOC: R_RISCV_CALL zero 0x0
# INSTR: auipc ra, 0
# INSTR: jalr ra
[RISCV] Support resolving fixup_riscv_call and add to MCFixupKindInfo table Resolving fixup_riscv_call by assembler when the linker relaxation diabled and the function and callsite within the same compile unit. And also adding static_assert after Infos array declaration to avoid missing any new fixup in MCFixupKindInfo in the future. Differential Revision: https://reviews.llvm.org/D47126 llvm-svn: 333487
2018-05-30 09:16:36 +08:00
# FIXUP: fixup A - offset: 0, value: zero, kind: fixup_riscv_call
[RISCV] Allow call pseudoinstruction to be used to call a function name that coincides with a register name Previously `call zero`, `call f0` etc would fail. This leads to compilation failures if building programs that define functions with those names and using -save-temps. llvm-svn: 330846
2018-04-26 01:25:29 +08:00
call f1
# RELOC: R_RISCV_CALL f1 0x0
# INSTR: auipc ra, 0
# INSTR: jalr ra
[RISCV] Support resolving fixup_riscv_call and add to MCFixupKindInfo table Resolving fixup_riscv_call by assembler when the linker relaxation diabled and the function and callsite within the same compile unit. And also adding static_assert after Infos array declaration to avoid missing any new fixup in MCFixupKindInfo in the future. Differential Revision: https://reviews.llvm.org/D47126 llvm-svn: 333487
2018-05-30 09:16:36 +08:00
# FIXUP: fixup A - offset: 0, value: f1, kind: fixup_riscv_call
[RISCV] Allow call pseudoinstruction to be used to call a function name that coincides with a register name Previously `call zero`, `call f0` etc would fail. This leads to compilation failures if building programs that define functions with those names and using -save-temps. llvm-svn: 330846
2018-04-26 01:25:29 +08:00
call ra
# RELOC: R_RISCV_CALL ra 0x0
# INSTR: auipc ra, 0
# INSTR: jalr ra
[RISCV] Support resolving fixup_riscv_call and add to MCFixupKindInfo table Resolving fixup_riscv_call by assembler when the linker relaxation diabled and the function and callsite within the same compile unit. And also adding static_assert after Infos array declaration to avoid missing any new fixup in MCFixupKindInfo in the future. Differential Revision: https://reviews.llvm.org/D47126 llvm-svn: 333487
2018-05-30 09:16:36 +08:00
# FIXUP: fixup A - offset: 0, value: ra, kind: fixup_riscv_call
[RISCV] Support named operands for CSR instructions. Reviewers: asb, mgrang Reviewed By: asb Subscribers: jocewei, mgorny, jfb, PkmX, MartinMosbeck, brucehoult, the_o, rkruppe, rogfer01, rbar, johnrusso, simoncook, jordy.potman.lists, sabuasal, niosHD, kito-cheng, shiva0217, zzheng, edward-jones Differential Revision: https://reviews.llvm.org/D46759 llvm-svn: 343822
2018-10-05 05:50:54 +08:00
call mstatus
# RELOC: R_RISCV_CALL mstatus 0x0
# INSTR: auipc ra, 0
# INSTR: jalr ra
# FIXUP: fixup A - offset: 0, value: mstatus, kind: fixup_riscv_call
[RISCV] Support assembling @plt symbol operands This patch allows symbols appended with @plt to parse and assemble with the R_RISCV_CALL_PLT relocation. Differential Revision: https://reviews.llvm.org/D55335 Patch by Lewis Revill. llvm-svn: 357470
2019-04-02 20:47:20 +08:00
# Ensure that calls to procedure linkage table symbols work.
call foo@plt
# RELOC: R_RISCV_CALL_PLT foo 0x0
# INSTR: auipc ra, 0
# INSTR: jalr ra
# FIXUP: fixup A - offset: 0, value: foo@plt, kind: fixup_riscv_call_plt
[RISCV] Add pseudo instruction for calls with explicit register This patch adds the PseudoCALLReg instruction which allows using an explicit register operand as the destination for the return address. GCC can successfully parse this form of the call instruction, which would be used for calls to functions which do not use ra as the return address register, such as the __riscv_save libcalls. This patch forms the first part of an implementation of -msave-restore for RISC-V. Differential Revision: https://reviews.llvm.org/D62685 llvm-svn: 364403
2019-06-26 18:35:58 +08:00
# Ensure that an explicit register operand can be parsed.
call a0, foo
# RELOC: R_RISCV_CALL foo 0x0
# INSTR: auipc a0, 0
# INSTR: jalr a0
# FIXUP: fixup A - offset: 0, value: foo, kind: fixup_riscv_call
call a0, foo@plt
# RELOC: R_RISCV_CALL_PLT foo 0x0
# INSTR: auipc a0, 0
# INSTR: jalr a0
# FIXUP: fixup A - offset: 0, value: foo@plt, kind: fixup_riscv_call_plt