maxjhandsome
/
llvm-project
forked from OSchip/llvm-project
1
0
Fork 0
Code Issues Pull Requests Packages Releases Wiki Activity
llvm-project/llvm/test/CodeGen/X86/sse-fcopysign.ll

135 lines
3.8 KiB
LLVM
Raw Normal View History

[X86][SSE] Extended copysign tests to include llvm intrinsic implementation and constant folding. llvm-svn: 235279
2015-04-20 05:34:57 +08:00
; RUN: llc < %s -mtriple=i686-unknown -mattr=+sse2 | FileCheck %s --check-prefix=ALL --check-prefix=X32
; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse2 | FileCheck %s --check-prefix=ALL --check-prefix=X64
;
; Library Functions
;
Add a test case for SSE fcopysign using SSE bitwise operations. llvm-svn: 32901
2007-01-05 16:12:59 +08:00
For PR1336: Rename test functions to not conflict with an instruction mnemonic. llvm-svn: 36130
2007-04-16 22:23:07 +08:00
define float @tst1(float %a, float %b) {
[X86][SSE] Extended copysign tests to include llvm intrinsic implementation and constant folding. llvm-svn: 235279
2015-04-20 05:34:57 +08:00
; X32-LABEL: @tst1
; X32: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
; X32-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero
; X32-NEXT: movss %xmm1, 4(%esp)
; X32-NEXT: movss %xmm0, (%esp)
; X32-NEXT: calll copysignf
; X32-NEXT: addl $8, %esp
; X32-NEXT: retl
;
; X64-LABEL: @tst1
; X64: movaps %xmm0, %xmm2
; X64-NEXT: movaps %xmm1, %xmm0
; X64-NEXT: movaps %xmm2, %xmm1
; X64-NEXT: jmp copysignf
%tmp = tail call float @copysignf( float %b, float %a )
ret float %tmp
Add a test case for SSE fcopysign using SSE bitwise operations. llvm-svn: 32901
2007-01-05 16:12:59 +08:00
}
For PR1336: Rename test functions to not conflict with an instruction mnemonic. llvm-svn: 36130
2007-04-16 22:23:07 +08:00
define double @tst2(double %a, float %b, float %c) {
[X86][SSE] Extended copysign tests to include llvm intrinsic implementation and constant folding. llvm-svn: 235279
2015-04-20 05:34:57 +08:00
; X32-LABEL: @tst2
; X32: movsd {{.*#+}} xmm0 = mem[0],zero
; X32-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero
; X32-NEXT: addss 32(%esp), %xmm1
; X32-NEXT: cvtss2sd %xmm1, %xmm1
; X32-NEXT: movsd %xmm0, (%esp)
; X32-NEXT: movsd %xmm1, 8(%esp)
; X32-NEXT: calll copysign
; X32-NEXT: addl $16, %esp
; X32-NEXT: retl
;
; X64-LABEL: @tst2
; X64: addss %xmm2, %xmm1
; X64-NEXT: cvtss2sd %xmm1, %xmm1
; X64-NEXT: jmp copysign
%tmp1 = fadd float %b, %c
%tmp2 = fpext float %tmp1 to double
%tmp = tail call double @copysign( double %a, double %tmp2 )
ret double %tmp
Add a test case for SSE fcopysign using SSE bitwise operations. llvm-svn: 32901
2007-01-05 16:12:59 +08:00
}
For PR761: Remove "target endian/pointersize" or add "target datalayout" to make the test parse properly or set the datalayout because defaults changes. For PR645: Make global names use the @ prefix. For llvm-upgrade changes: Fix test cases or completely remove use of llvm-upgrade for test cases that cannot survive the new renaming or upgrade capabilities. llvm-svn: 33533
2007-01-26 16:25:06 +08:00
declare float @copysignf(float, float)
declare double @copysign(double, double)
[X86][SSE] Extended copysign tests to include llvm intrinsic implementation and constant folding. llvm-svn: 235279
2015-04-20 05:34:57 +08:00
;
; LLVM Intrinsic
;
define float @int1(float %a, float %b) {
; X32-LABEL: @int1
fix invalid load folding with SSE/AVX FP logical instructions (PR22371) This is a follow-up to the FIXME that was added with D7474 ( http://reviews.llvm.org/rL229531 ). I thought this load folding bug had been made hard-to-hit, but it turns out to be very easy when targeting 32-bit x86 and causes a miscompile/crash in Wine: https://bugs.winehq.org/show_bug.cgi?id=38826 https://llvm.org/bugs/show_bug.cgi?id=22371#c25 The quick fix is to simply remove the scalar FP logical instructions from the load folding table in X86InstrInfo, but that causes us to miss load folds that should be possible when lowering fabs, fneg, fcopysign. So the majority of this patch is altering those lowerings to use *vector* FP logical instructions (because that's all x86 gives us anyway). That lets us do the load folding legally. Differential Revision: http://reviews.llvm.org/D11477 llvm-svn: 243361
2015-07-28 08:48:32 +08:00
; X32: movss 8(%esp), %xmm0 {{.*#+}} xmm0 = mem[0],zero,zero,zero
; X32-NEXT: andps .LCPI2_0, %xmm0
; X32-NEXT: movss 12(%esp), %xmm1 {{.*#+}} xmm1 = mem[0],zero,zero,zero
; X32-NEXT: andps .LCPI2_1, %xmm1
; X32-NEXT: orps %xmm0, %xmm1
; X32-NEXT: movss %xmm1, (%esp)
[X86][SSE] Extended copysign tests to include llvm intrinsic implementation and constant folding. llvm-svn: 235279
2015-04-20 05:34:57 +08:00
; X32-NEXT: flds (%esp)
; X32-NEXT: popl %eax
; X32-NEXT: retl
;
; X64-LABEL: @int1
; X64: andps .LCPI2_0(%rip), %xmm0
; X64-NEXT: andps .LCPI2_1(%rip), %xmm1
; X64-NEXT: orps %xmm1, %xmm0
; X64-NEXT: retq
%tmp = tail call float @llvm.copysign.f32( float %b, float %a )
ret float %tmp
}
define double @int2(double %a, float %b, float %c) {
; X32-LABEL: @int2
fix invalid load folding with SSE/AVX FP logical instructions (PR22371) This is a follow-up to the FIXME that was added with D7474 ( http://reviews.llvm.org/rL229531 ). I thought this load folding bug had been made hard-to-hit, but it turns out to be very easy when targeting 32-bit x86 and causes a miscompile/crash in Wine: https://bugs.winehq.org/show_bug.cgi?id=38826 https://llvm.org/bugs/show_bug.cgi?id=22371#c25 The quick fix is to simply remove the scalar FP logical instructions from the load folding table in X86InstrInfo, but that causes us to miss load folds that should be possible when lowering fabs, fneg, fcopysign. So the majority of this patch is altering those lowerings to use *vector* FP logical instructions (because that's all x86 gives us anyway). That lets us do the load folding legally. Differential Revision: http://reviews.llvm.org/D11477 llvm-svn: 243361
2015-07-28 08:48:32 +08:00
; X32: movss 16(%ebp), %xmm0 {{.*#+}} xmm0 = mem[0],zero,zero,zero
; X32-NEXT: addss 20(%ebp), %xmm0
; X32-NEXT: movsd 8(%ebp), %xmm1 {{.*#+}} xmm1 = mem[0],zero
; X32-NEXT: andpd .LCPI3_0, %xmm1
; X32-NEXT: cvtss2sd %xmm0, %xmm0
; X32-NEXT: andpd .LCPI3_1, %xmm0
; X32-NEXT: orpd %xmm1, %xmm0
; X32-NEXT: movlpd %xmm0, (%esp)
[X86][SSE] Extended copysign tests to include llvm intrinsic implementation and constant folding. llvm-svn: 235279
2015-04-20 05:34:57 +08:00
; X32-NEXT: fldl (%esp)
; X32-NEXT: movl %ebp, %esp
; X32-NEXT: popl %ebp
; X32-NEXT: retl
;
; X64-LABEL: @int2
; X64: addss %xmm2, %xmm1
; X64-NEXT: cvtss2sd %xmm1, %xmm1
fix invalid load folding with SSE/AVX FP logical instructions (PR22371) This is a follow-up to the FIXME that was added with D7474 ( http://reviews.llvm.org/rL229531 ). I thought this load folding bug had been made hard-to-hit, but it turns out to be very easy when targeting 32-bit x86 and causes a miscompile/crash in Wine: https://bugs.winehq.org/show_bug.cgi?id=38826 https://llvm.org/bugs/show_bug.cgi?id=22371#c25 The quick fix is to simply remove the scalar FP logical instructions from the load folding table in X86InstrInfo, but that causes us to miss load folds that should be possible when lowering fabs, fneg, fcopysign. So the majority of this patch is altering those lowerings to use *vector* FP logical instructions (because that's all x86 gives us anyway). That lets us do the load folding legally. Differential Revision: http://reviews.llvm.org/D11477 llvm-svn: 243361
2015-07-28 08:48:32 +08:00
; X64-NEXT: andpd .LCPI3_0(%rip), %xmm1
; X64-NEXT: andpd .LCPI3_1(%rip), %xmm0
[X86][SSE] Extended copysign tests to include llvm intrinsic implementation and constant folding. llvm-svn: 235279
2015-04-20 05:34:57 +08:00
; X64-NEXT: orpd %xmm1, %xmm0
; X64-NEXT: retq
%tmp1 = fadd float %b, %c
%tmp2 = fpext float %tmp1 to double
%tmp = tail call double @llvm.copysign.f64( double %a, double %tmp2 )
ret double %tmp
}
define float @cst1() {
; X32-LABEL: @cst1
; X32: fld1
; X32-NEXT: fchs
; X32-NEXT: retl
;
; X64-LABEL: @cst1
; X64: movss .LCPI4_0(%rip), %xmm0 {{.*#+}} xmm0 = mem[0],zero,zero,zero
; X64-NEXT: retq
%tmp = tail call float @llvm.copysign.f32( float 1.0, float -2.0 )
ret float %tmp
}
define double @cst2() {
; X32-LABEL: @cst2
; X32: fldz
; X32-NEXT: fchs
; X32-NEXT: retl
;
; X64-LABEL: @cst2
; X64: movsd .LCPI5_0(%rip), %xmm0 {{.*#+}} xmm0 = mem[0],zero
; X64-NEXT: retq
%tmp1 = fadd float -1.0, -1.0
%tmp2 = fpext float %tmp1 to double
%tmp = tail call double @llvm.copysign.f64( double 0.0, double %tmp2 )
ret double %tmp
}
declare float @llvm.copysign.f32(float %Mag, float %Sgn)
declare double @llvm.copysign.f64(double %Mag, double %Sgn)