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llvm-project/llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-unmerge-values.mir

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AMDGPU/GlobalISel: Make some G_MERGE_VALUEs legal llvm-svn: 327267
2018-03-12 21:35:43 +08:00
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
GlobalISel: Implement widenScalar for G_UNMERGE_VALUES For the scalar case only. Also move the similar G_MERGE_VALUES handling to a separate function and cleanup to make them look more similar. llvm-svn: 352979
2019-02-03 08:07:33 +08:00
# RUN: llc -mtriple=amdgcn-- -O0 -run-pass=legalizer -global-isel-abort=0 -o - %s | FileCheck %s
AMDGPU/GlobalISel: Make some G_MERGE_VALUEs legal llvm-svn: 327267
2018-03-12 21:35:43 +08:00
---
AMDGPU/GlobalISel: Fix some crashs in g_unmerge_values/g_merge_values This was crashing in the predicate function assuming the value is a vector. Copy more of what AArch64 uses. This probably needs more refinement later, but I don't exactly understand what it means in some cases, particularly since any legalization for these seems to be missing. llvm-svn: 351693
2019-01-21 02:40:36 +08:00
name: test_unmerge_s32_s64
AMDGPU/GlobalISel: Make some G_MERGE_VALUEs legal llvm-svn: 327267
2018-03-12 21:35:43 +08:00
body: |
bb.0:
AMDGPU/GlobalISel: Fix some crashs in g_unmerge_values/g_merge_values This was crashing in the predicate function assuming the value is a vector. Copy more of what AArch64 uses. This probably needs more refinement later, but I don't exactly understand what it means in some cases, particularly since any legalization for these seems to be missing. llvm-svn: 351693
2019-01-21 02:40:36 +08:00
; CHECK-LABEL: name: test_unmerge_s32_s64
AMDGPU/GlobalISel: Make some G_MERGE_VALUEs legal llvm-svn: 327267
2018-03-12 21:35:43 +08:00
; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
; CHECK: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[C]](s64)
; CHECK: $vgpr0 = COPY [[UV]](s32)
AMDGPU/GlobalISel: Fix some crashs in g_unmerge_values/g_merge_values This was crashing in the predicate function assuming the value is a vector. Copy more of what AArch64 uses. This probably needs more refinement later, but I don't exactly understand what it means in some cases, particularly since any legalization for these seems to be missing. llvm-svn: 351693
2019-01-21 02:40:36 +08:00
; CHECK: $vgpr1 = COPY [[UV1]](s32)
AMDGPU/GlobalISel: Make some G_MERGE_VALUEs legal llvm-svn: 327267
2018-03-12 21:35:43 +08:00
%0:_(s64) = G_CONSTANT i64 0
%1:_(s32), %2:_(s32) = G_UNMERGE_VALUES %0:_(s64)
$vgpr0 = COPY %1(s32)
AMDGPU/GlobalISel: Fix some crashs in g_unmerge_values/g_merge_values This was crashing in the predicate function assuming the value is a vector. Copy more of what AArch64 uses. This probably needs more refinement later, but I don't exactly understand what it means in some cases, particularly since any legalization for these seems to be missing. llvm-svn: 351693
2019-01-21 02:40:36 +08:00
$vgpr1 = COPY %2(s32)
...
---
name: test_unmerge_s32_v2s32
body: |
bb.0:
liveins: $vgpr0_vgpr1
; CHECK-LABEL: name: test_unmerge_s32_v2s32
; CHECK: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr0_vgpr1
; CHECK: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<2 x s32>)
; CHECK: $vgpr0 = COPY [[UV]](s32)
; CHECK: $vgpr21 = COPY [[UV1]](s32)
%0:_(<2 x s32>) = COPY $vgpr0_vgpr1
%1:_(s32), %2:_(s32) = G_UNMERGE_VALUES %0
$vgpr0 = COPY %1
$vgpr21= COPY %2
...
---
name: test_unmerge_s16_v2s16
body: |
bb.0:
liveins: $vgpr0
; CHECK-LABEL: name: test_unmerge_s16_v2s16
; CHECK: [[COPY:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr0
GlobalISel: Lower scalarizing unmerge of a vector to shifts AMDGPU sometimes has legal s16 and <2 x s16> operations, but all registers are really 32-bit. An unmerge destination really should ben widened to a 32-bit register. If widening a scalarizing vector with a target size that matches the vector size, bitcast to integer and extract the relevant bits with shifts. I'm not sure if this is the right place for this. This could arguably be part of widenScalar for the result. I also have a growing feeling that we're missing a bitcast legalize action. llvm-svn: 367604
2019-08-02 03:10:05 +08:00
; CHECK: [[BITCAST:%[0-9]+]]:_(s32) = G_BITCAST [[COPY]](<2 x s16>)
; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
; CHECK: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST]], [[C]](s32)
; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY [[BITCAST]](s32)
; CHECK: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LSHR]](s32)
; CHECK: $vgpr0 = COPY [[COPY1]](s32)
; CHECK: $vgpr1 = COPY [[COPY2]](s32)
AMDGPU/GlobalISel: Fix some crashs in g_unmerge_values/g_merge_values This was crashing in the predicate function assuming the value is a vector. Copy more of what AArch64 uses. This probably needs more refinement later, but I don't exactly understand what it means in some cases, particularly since any legalization for these seems to be missing. llvm-svn: 351693
2019-01-21 02:40:36 +08:00
%0:_(<2 x s16>) = COPY $vgpr0
%1:_(s16), %2:_(s16) = G_UNMERGE_VALUES %0
%3:_(s32) = G_ANYEXT %1
%4:_(s32) = G_ANYEXT %2
$vgpr0 = COPY %3
$vgpr1 = COPY %4
...
---
name: test_unmerge_s16_v3s16
body: |
bb.0:
; CHECK-LABEL: name: test_unmerge_s16_v3s16
GlobalISel: Implement moreElementsVector for implicit_def llvm-svn: 353754
2019-02-12 06:00:39 +08:00
; CHECK: [[DEF:%[0-9]+]]:_(<4 x s16>) = G_IMPLICIT_DEF
; CHECK: [[EXTRACT:%[0-9]+]]:_(<3 x s16>) = G_EXTRACT [[DEF]](<4 x s16>), 0
GlobalISel: Allow CSE of G_IMPLICIT_DEF The legalizer produces a lot of these, and they make reading legalized MIR annoying. For some reason, this does seem to sometimes introduce copies of implicit def, which is dumb.
2020-02-04 11:49:00 +08:00
; CHECK: [[INSERT:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[DEF]], [[EXTRACT]](<3 x s16>), 0
GlobalISel: Implement moreElementsVector for G_UNMERGE_VALUES sources This is necessary for handling <3 x s16> on AMDGPU, assuming this should be handled as 2 separate legalization actions. The alternative would be for fewerElementsVector to handle 3->2. llvm-svn: 369547
2019-08-22 00:59:10 +08:00
; CHECK: [[UV:%[0-9]+]]:_(<2 x s16>), [[UV1:%[0-9]+]]:_(<2 x s16>) = G_UNMERGE_VALUES [[INSERT]](<4 x s16>)
; CHECK: [[BITCAST:%[0-9]+]]:_(s32) = G_BITCAST [[UV]](<2 x s16>)
; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
; CHECK: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST]], [[C]](s32)
; CHECK: [[BITCAST1:%[0-9]+]]:_(s32) = G_BITCAST [[UV1]](<2 x s16>)
; CHECK: [[LSHR1:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST1]], [[C]](s32)
; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY [[BITCAST]](s32)
; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LSHR]](s32)
; CHECK: [[COPY2:%[0-9]+]]:_(s32) = COPY [[BITCAST1]](s32)
; CHECK: $vgpr0 = COPY [[COPY]](s32)
; CHECK: $vgpr1 = COPY [[COPY1]](s32)
; CHECK: $vgpr2 = COPY [[COPY2]](s32)
AMDGPU/GlobalISel: Fix some crashs in g_unmerge_values/g_merge_values This was crashing in the predicate function assuming the value is a vector. Copy more of what AArch64 uses. This probably needs more refinement later, but I don't exactly understand what it means in some cases, particularly since any legalization for these seems to be missing. llvm-svn: 351693
2019-01-21 02:40:36 +08:00
%0:_(<3 x s16>) = G_IMPLICIT_DEF
%1:_(s16), %2:_(s16), %3:_(s16) = G_UNMERGE_VALUES %0
%4:_(s32) = G_ANYEXT %1
%5:_(s32) = G_ANYEXT %2
%6:_(s32) = G_ANYEXT %3
$vgpr0 = COPY %4
$vgpr1 = COPY %5
$vgpr2 = COPY %6
AMDGPU/GlobalISel: Make some G_MERGE_VALUEs legal llvm-svn: 327267
2018-03-12 21:35:43 +08:00
...
GlobalISel: Implement widenScalar for G_UNMERGE_VALUES For the scalar case only. Also move the similar G_MERGE_VALUES handling to a separate function and cleanup to make them look more similar. llvm-svn: 352979
2019-02-03 08:07:33 +08:00
---
GlobalISel: Lower scalarizing unmerge of a vector to shifts AMDGPU sometimes has legal s16 and <2 x s16> operations, but all registers are really 32-bit. An unmerge destination really should ben widened to a 32-bit register. If widening a scalarizing vector with a target size that matches the vector size, bitcast to integer and extract the relevant bits with shifts. I'm not sure if this is the right place for this. This could arguably be part of widenScalar for the result. I also have a growing feeling that we're missing a bitcast legalize action. llvm-svn: 367604
2019-08-02 03:10:05 +08:00
name: test_unmerge_s16_v4s16
body: |
bb.0:
liveins: $vgpr0_vgpr1
; CHECK-LABEL: name: test_unmerge_s16_v4s16
; CHECK: [[COPY:%[0-9]+]]:_(<4 x s16>) = COPY $vgpr0_vgpr1
GlobalISel: Partially implement fewerElementsVector G_UNMERGE_VALUES Odd sized vectors aren't handled yet. llvm-svn: 368713
2019-08-14 00:26:28 +08:00
; CHECK: [[UV:%[0-9]+]]:_(<2 x s16>), [[UV1:%[0-9]+]]:_(<2 x s16>) = G_UNMERGE_VALUES [[COPY]](<4 x s16>)
; CHECK: [[BITCAST:%[0-9]+]]:_(s32) = G_BITCAST [[UV]](<2 x s16>)
; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
; CHECK: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST]], [[C]](s32)
; CHECK: [[BITCAST1:%[0-9]+]]:_(s32) = G_BITCAST [[UV1]](<2 x s16>)
; CHECK: [[LSHR1:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST1]], [[C]](s32)
; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY [[BITCAST]](s32)
; CHECK: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LSHR]](s32)
; CHECK: [[COPY3:%[0-9]+]]:_(s32) = COPY [[BITCAST1]](s32)
; CHECK: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LSHR1]](s32)
; CHECK: $vgpr0 = COPY [[COPY1]](s32)
; CHECK: $vgpr1 = COPY [[COPY2]](s32)
; CHECK: $vgpr2 = COPY [[COPY3]](s32)
; CHECK: $vgpr3 = COPY [[COPY4]](s32)
GlobalISel: Lower scalarizing unmerge of a vector to shifts AMDGPU sometimes has legal s16 and <2 x s16> operations, but all registers are really 32-bit. An unmerge destination really should ben widened to a 32-bit register. If widening a scalarizing vector with a target size that matches the vector size, bitcast to integer and extract the relevant bits with shifts. I'm not sure if this is the right place for this. This could arguably be part of widenScalar for the result. I also have a growing feeling that we're missing a bitcast legalize action. llvm-svn: 367604
2019-08-02 03:10:05 +08:00
%0:_(<4 x s16>) = COPY $vgpr0_vgpr1
%1:_(s16), %2:_(s16), %3:_(s16), %4:_(s16) = G_UNMERGE_VALUES %0
%5:_(s32) = G_ANYEXT %1
%6:_(s32) = G_ANYEXT %2
%7:_(s32) = G_ANYEXT %3
%8:_(s32) = G_ANYEXT %4
$vgpr0 = COPY %5
$vgpr1 = COPY %6
$vgpr2 = COPY %7
$vgpr3 = COPY %8
...
---
name: test_unmerge_s16_v6s16
body: |
bb.0:
liveins: $vgpr0_vgpr1
; CHECK-LABEL: name: test_unmerge_s16_v6s16
; CHECK: [[COPY:%[0-9]+]]:_(<6 x s16>) = COPY $vgpr0_vgpr1_vgpr2
GlobalISel: Partially implement fewerElementsVector G_UNMERGE_VALUES Odd sized vectors aren't handled yet. llvm-svn: 368713
2019-08-14 00:26:28 +08:00
; CHECK: [[UV:%[0-9]+]]:_(<2 x s16>), [[UV1:%[0-9]+]]:_(<2 x s16>), [[UV2:%[0-9]+]]:_(<2 x s16>) = G_UNMERGE_VALUES [[COPY]](<6 x s16>)
; CHECK: [[BITCAST:%[0-9]+]]:_(s32) = G_BITCAST [[UV]](<2 x s16>)
; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
; CHECK: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST]], [[C]](s32)
; CHECK: [[BITCAST1:%[0-9]+]]:_(s32) = G_BITCAST [[UV1]](<2 x s16>)
; CHECK: [[LSHR1:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST1]], [[C]](s32)
; CHECK: [[BITCAST2:%[0-9]+]]:_(s32) = G_BITCAST [[UV2]](<2 x s16>)
; CHECK: [[LSHR2:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST2]], [[C]](s32)
; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY [[BITCAST]](s32)
; CHECK: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LSHR]](s32)
; CHECK: [[COPY3:%[0-9]+]]:_(s32) = COPY [[BITCAST1]](s32)
; CHECK: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LSHR1]](s32)
; CHECK: [[COPY5:%[0-9]+]]:_(s32) = COPY [[BITCAST2]](s32)
; CHECK: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LSHR2]](s32)
; CHECK: $vgpr0 = COPY [[COPY1]](s32)
; CHECK: $vgpr1 = COPY [[COPY2]](s32)
; CHECK: $vgpr2 = COPY [[COPY3]](s32)
; CHECK: $vgpr3 = COPY [[COPY4]](s32)
; CHECK: $vgpr4 = COPY [[COPY5]](s32)
; CHECK: $vgpr5 = COPY [[COPY6]](s32)
GlobalISel: Lower scalarizing unmerge of a vector to shifts AMDGPU sometimes has legal s16 and <2 x s16> operations, but all registers are really 32-bit. An unmerge destination really should ben widened to a 32-bit register. If widening a scalarizing vector with a target size that matches the vector size, bitcast to integer and extract the relevant bits with shifts. I'm not sure if this is the right place for this. This could arguably be part of widenScalar for the result. I also have a growing feeling that we're missing a bitcast legalize action. llvm-svn: 367604
2019-08-02 03:10:05 +08:00
%0:_(<6 x s16>) = COPY $vgpr0_vgpr1_vgpr2
%1:_(s16), %2:_(s16), %3:_(s16), %4:_(s16), %5:_(s16), %6:_(s16) = G_UNMERGE_VALUES %0
%7:_(s32) = G_ANYEXT %1
%8:_(s32) = G_ANYEXT %2
%9:_(s32) = G_ANYEXT %3
%10:_(s32) = G_ANYEXT %4
%11:_(s32) = G_ANYEXT %5
%12:_(s32) = G_ANYEXT %6
$vgpr0 = COPY %7
$vgpr1 = COPY %8
$vgpr2 = COPY %9
$vgpr3 = COPY %10
$vgpr4 = COPY %11
$vgpr5 = COPY %12
...
---
GlobalISel: Implement widenScalar for G_UNMERGE_VALUES For the scalar case only. Also move the similar G_MERGE_VALUES handling to a separate function and cleanup to make them look more similar. llvm-svn: 352979
2019-02-03 08:07:33 +08:00
name: test_unmerge_s8_s16
body: |
bb.0:
liveins: $vgpr0
; CHECK-LABEL: name: test_unmerge_s8_s16
; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
GlobalISel: Reimplement widenScalar for G_UNMERGE_VALUES results Only use shifts if the requested type exactly matches the source type, and create sub-unmerges otherwise.
2020-01-21 22:02:42 +08:00
; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 8
; CHECK: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535
GlobalISel: Implement widenScalar for G_UNMERGE_VALUES For the scalar case only. Also move the similar G_MERGE_VALUES handling to a separate function and cleanup to make them look more similar. llvm-svn: 352979
2019-02-03 08:07:33 +08:00
; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY [[COPY]](s32)
GlobalISel: Reimplement widenScalar for G_UNMERGE_VALUES results Only use shifts if the requested type exactly matches the source type, and create sub-unmerges otherwise.
2020-01-21 22:02:42 +08:00
; CHECK: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C1]]
; CHECK: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[AND]], [[C]](s32)
; CHECK: [[COPY2:%[0-9]+]]:_(s32) = COPY [[COPY]](s32)
; CHECK: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LSHR]](s32)
; CHECK: $vgpr0 = COPY [[COPY2]](s32)
; CHECK: $vgpr1 = COPY [[COPY3]](s32)
GlobalISel: Implement widenScalar for G_UNMERGE_VALUES For the scalar case only. Also move the similar G_MERGE_VALUES handling to a separate function and cleanup to make them look more similar. llvm-svn: 352979
2019-02-03 08:07:33 +08:00
%0:_(s32) = COPY $vgpr0
%1:_(s16) = G_TRUNC %0
%2:_(s8), %3:_(s8) = G_UNMERGE_VALUES %1
%4:_(s32) = G_ANYEXT %2
%5:_(s32) = G_ANYEXT %3
$vgpr0 = COPY %4
$vgpr1 = COPY %5
...
---
name: test_unmerge_s8_s32
body: |
bb.0:
liveins: $vgpr0
; CHECK-LABEL: name: test_unmerge_s8_s32
; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
GlobalISel: Reimplement widenScalar for G_UNMERGE_VALUES results Only use shifts if the requested type exactly matches the source type, and create sub-unmerges otherwise.
2020-01-21 22:02:42 +08:00
; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
; CHECK: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[COPY]], [[C]](s32)
; CHECK: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 8
; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY [[C1]](s32)
; CHECK: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535
; CHECK: [[COPY2:%[0-9]+]]:_(s32) = COPY [[COPY]](s32)
; CHECK: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C2]]
; CHECK: [[LSHR1:%[0-9]+]]:_(s32) = G_LSHR [[AND]], [[COPY1]](s32)
; CHECK: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LSHR]](s32)
; CHECK: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C2]]
; CHECK: [[LSHR2:%[0-9]+]]:_(s32) = G_LSHR [[AND1]], [[C1]](s32)
; CHECK: [[COPY4:%[0-9]+]]:_(s32) = COPY [[COPY]](s32)
; CHECK: [[COPY5:%[0-9]+]]:_(s32) = COPY [[LSHR1]](s32)
; CHECK: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LSHR]](s32)
; CHECK: [[COPY7:%[0-9]+]]:_(s32) = COPY [[LSHR2]](s32)
; CHECK: $vgpr0 = COPY [[COPY4]](s32)
; CHECK: $vgpr1 = COPY [[COPY5]](s32)
; CHECK: $vgpr2 = COPY [[COPY6]](s32)
; CHECK: $vgpr3 = COPY [[COPY7]](s32)
GlobalISel: Implement widenScalar for G_UNMERGE_VALUES For the scalar case only. Also move the similar G_MERGE_VALUES handling to a separate function and cleanup to make them look more similar. llvm-svn: 352979
2019-02-03 08:07:33 +08:00
%0:_(s32) = COPY $vgpr0
%1:_(s8), %2:_(s8), %3:_(s8), %4:_(s8) = G_UNMERGE_VALUES %0
%5:_(s32) = G_ANYEXT %1
%6:_(s32) = G_ANYEXT %2
%7:_(s32) = G_ANYEXT %3
%8:_(s32) = G_ANYEXT %4
$vgpr0 = COPY %5
$vgpr1 = COPY %6
$vgpr2 = COPY %7
$vgpr3 = COPY %8
...
AMDGPU/GlobalISel: Add some baseline tests for unmerge legalization
2020-01-21 21:18:39 +08:00
---
name: test_unmerge_s8_s48
body: |
bb.0:
liveins: $vgpr0_vgpr1
; CHECK-LABEL: name: test_unmerge_s8_s48
; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1
; CHECK: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](s64)
GlobalISel: Reimplement widenScalar for G_UNMERGE_VALUES results Only use shifts if the requested type exactly matches the source type, and create sub-unmerges otherwise.
2020-01-21 22:02:42 +08:00
; CHECK: [[DEF:%[0-9]+]]:_(s64) = G_IMPLICIT_DEF
[GlobalISel] combine G_TRUNC with G_MERGE_VALUES Summary: Truncating the result of a merge means that most likely we could have done without merge in the first place and just used the input merge inputs directly. This can be done in three cases: 1. If the truncation result is smaller than the merge source, we can use the source in the trunc directly 2. If the sizes are the same, we can replace the register or use a copy 3. If the truncation size is a multiple of the merge source size, we can build a smaller merge This gets rid of most of the larger, hard-to-legalize merges. Reviewers: qcolombet, aditya_nandakumar, aemerson, paquette, arsenm, Petar.Avramovic Reviewed By: arsenm Subscribers: sdardis, jvesely, wdng, nhaehnle, rovka, jrtc27, atanasyan, kerbowa, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D75915
2020-03-10 00:00:38 +08:00
; CHECK: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[DEF]](s64)
GlobalISel: Reimplement widenScalar for G_UNMERGE_VALUES results Only use shifts if the requested type exactly matches the source type, and create sub-unmerges otherwise.
2020-01-21 22:02:42 +08:00
; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
[GlobalISel] combine G_TRUNC with G_MERGE_VALUES Summary: Truncating the result of a merge means that most likely we could have done without merge in the first place and just used the input merge inputs directly. This can be done in three cases: 1. If the truncation result is smaller than the merge source, we can use the source in the trunc directly 2. If the sizes are the same, we can replace the register or use a copy 3. If the truncation size is a multiple of the merge source size, we can build a smaller merge This gets rid of most of the larger, hard-to-legalize merges. Reviewers: qcolombet, aditya_nandakumar, aemerson, paquette, arsenm, Petar.Avramovic Reviewed By: arsenm Subscribers: sdardis, jvesely, wdng, nhaehnle, rovka, jrtc27, atanasyan, kerbowa, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D75915
2020-03-10 00:00:38 +08:00
; CHECK: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[UV]], [[C]](s32)
; CHECK: [[LSHR1:%[0-9]+]]:_(s32) = G_LSHR [[TRUNC]], [[C]](s32)
GlobalISel: Reimplement widenScalar for G_UNMERGE_VALUES results Only use shifts if the requested type exactly matches the source type, and create sub-unmerges otherwise.
2020-01-21 22:02:42 +08:00
; CHECK: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 8
; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY [[C1]](s32)
; CHECK: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535
[GlobalISel] combine G_TRUNC with G_MERGE_VALUES Summary: Truncating the result of a merge means that most likely we could have done without merge in the first place and just used the input merge inputs directly. This can be done in three cases: 1. If the truncation result is smaller than the merge source, we can use the source in the trunc directly 2. If the sizes are the same, we can replace the register or use a copy 3. If the truncation size is a multiple of the merge source size, we can build a smaller merge This gets rid of most of the larger, hard-to-legalize merges. Reviewers: qcolombet, aditya_nandakumar, aemerson, paquette, arsenm, Petar.Avramovic Reviewed By: arsenm Subscribers: sdardis, jvesely, wdng, nhaehnle, rovka, jrtc27, atanasyan, kerbowa, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D75915
2020-03-10 00:00:38 +08:00
; CHECK: [[COPY2:%[0-9]+]]:_(s32) = COPY [[UV]](s32)
GlobalISel: Reimplement widenScalar for G_UNMERGE_VALUES results Only use shifts if the requested type exactly matches the source type, and create sub-unmerges otherwise.
2020-01-21 22:02:42 +08:00
; CHECK: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C2]]
; CHECK: [[LSHR2:%[0-9]+]]:_(s32) = G_LSHR [[AND]], [[COPY1]](s32)
; CHECK: [[COPY3:%[0-9]+]]:_(s32) = COPY [[C1]](s32)
; CHECK: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LSHR]](s32)
; CHECK: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C2]]
; CHECK: [[LSHR3:%[0-9]+]]:_(s32) = G_LSHR [[AND1]], [[COPY3]](s32)
[GlobalISel] combine G_TRUNC with G_MERGE_VALUES Summary: Truncating the result of a merge means that most likely we could have done without merge in the first place and just used the input merge inputs directly. This can be done in three cases: 1. If the truncation result is smaller than the merge source, we can use the source in the trunc directly 2. If the sizes are the same, we can replace the register or use a copy 3. If the truncation size is a multiple of the merge source size, we can build a smaller merge This gets rid of most of the larger, hard-to-legalize merges. Reviewers: qcolombet, aditya_nandakumar, aemerson, paquette, arsenm, Petar.Avramovic Reviewed By: arsenm Subscribers: sdardis, jvesely, wdng, nhaehnle, rovka, jrtc27, atanasyan, kerbowa, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D75915
2020-03-10 00:00:38 +08:00
; CHECK: [[COPY5:%[0-9]+]]:_(s32) = COPY [[TRUNC]](s32)
GlobalISel: Reimplement widenScalar for G_UNMERGE_VALUES results Only use shifts if the requested type exactly matches the source type, and create sub-unmerges otherwise.
2020-01-21 22:02:42 +08:00
; CHECK: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY5]], [[C2]]
; CHECK: [[LSHR4:%[0-9]+]]:_(s32) = G_LSHR [[AND2]], [[C1]](s32)
[GlobalISel] combine G_TRUNC with G_MERGE_VALUES Summary: Truncating the result of a merge means that most likely we could have done without merge in the first place and just used the input merge inputs directly. This can be done in three cases: 1. If the truncation result is smaller than the merge source, we can use the source in the trunc directly 2. If the sizes are the same, we can replace the register or use a copy 3. If the truncation size is a multiple of the merge source size, we can build a smaller merge This gets rid of most of the larger, hard-to-legalize merges. Reviewers: qcolombet, aditya_nandakumar, aemerson, paquette, arsenm, Petar.Avramovic Reviewed By: arsenm Subscribers: sdardis, jvesely, wdng, nhaehnle, rovka, jrtc27, atanasyan, kerbowa, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D75915
2020-03-10 00:00:38 +08:00
; CHECK: [[COPY6:%[0-9]+]]:_(s32) = COPY [[UV]](s32)
GlobalISel: Reimplement widenScalar for G_UNMERGE_VALUES results Only use shifts if the requested type exactly matches the source type, and create sub-unmerges otherwise.
2020-01-21 22:02:42 +08:00
; CHECK: [[COPY7:%[0-9]+]]:_(s32) = COPY [[LSHR2]](s32)
; CHECK: [[COPY8:%[0-9]+]]:_(s32) = COPY [[LSHR]](s32)
; CHECK: [[COPY9:%[0-9]+]]:_(s32) = COPY [[LSHR3]](s32)
[GlobalISel] combine G_TRUNC with G_MERGE_VALUES Summary: Truncating the result of a merge means that most likely we could have done without merge in the first place and just used the input merge inputs directly. This can be done in three cases: 1. If the truncation result is smaller than the merge source, we can use the source in the trunc directly 2. If the sizes are the same, we can replace the register or use a copy 3. If the truncation size is a multiple of the merge source size, we can build a smaller merge This gets rid of most of the larger, hard-to-legalize merges. Reviewers: qcolombet, aditya_nandakumar, aemerson, paquette, arsenm, Petar.Avramovic Reviewed By: arsenm Subscribers: sdardis, jvesely, wdng, nhaehnle, rovka, jrtc27, atanasyan, kerbowa, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D75915
2020-03-10 00:00:38 +08:00
; CHECK: [[COPY10:%[0-9]+]]:_(s32) = COPY [[TRUNC]](s32)
GlobalISel: Reimplement widenScalar for G_UNMERGE_VALUES results Only use shifts if the requested type exactly matches the source type, and create sub-unmerges otherwise.
2020-01-21 22:02:42 +08:00
; CHECK: [[COPY11:%[0-9]+]]:_(s32) = COPY [[LSHR4]](s32)
; CHECK: $vgpr0 = COPY [[COPY6]](s32)
; CHECK: $vgpr1 = COPY [[COPY7]](s32)
; CHECK: $vgpr2 = COPY [[COPY8]](s32)
; CHECK: $vgpr3 = COPY [[COPY9]](s32)
; CHECK: $vgpr4 = COPY [[COPY10]](s32)
; CHECK: $vgpr5 = COPY [[COPY11]](s32)
AMDGPU/GlobalISel: Add some baseline tests for unmerge legalization
2020-01-21 21:18:39 +08:00
%0:_(s64) = COPY $vgpr0_vgpr1
%1:_(s48) = G_TRUNC %0
%2:_(s8), %3:_(s8), %4:_(s8), %5:_(s8), %6:_(s8), %7:_(s8) = G_UNMERGE_VALUES %1
%8:_(s32) = G_ANYEXT %2
%9:_(s32) = G_ANYEXT %3
%10:_(s32) = G_ANYEXT %4
%11:_(s32) = G_ANYEXT %5
%12:_(s32) = G_ANYEXT %6
%13:_(s32) = G_ANYEXT %7
$vgpr0 = COPY %8
$vgpr1 = COPY %9
$vgpr2 = COPY %10
$vgpr3 = COPY %11
$vgpr4 = COPY %12
$vgpr5 = COPY %13
...
---
name: test_unmerge_s16_s48
body: |
bb.0:
liveins: $vgpr0_vgpr1
; CHECK-LABEL: name: test_unmerge_s16_s48
; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1
GlobalISel: Reimplement widenScalar for G_UNMERGE_VALUES results Only use shifts if the requested type exactly matches the source type, and create sub-unmerges otherwise.
2020-01-21 22:02:42 +08:00
; CHECK: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](s64)
; CHECK: [[DEF:%[0-9]+]]:_(s64) = G_IMPLICIT_DEF
[GlobalISel] combine G_TRUNC with G_MERGE_VALUES Summary: Truncating the result of a merge means that most likely we could have done without merge in the first place and just used the input merge inputs directly. This can be done in three cases: 1. If the truncation result is smaller than the merge source, we can use the source in the trunc directly 2. If the sizes are the same, we can replace the register or use a copy 3. If the truncation size is a multiple of the merge source size, we can build a smaller merge This gets rid of most of the larger, hard-to-legalize merges. Reviewers: qcolombet, aditya_nandakumar, aemerson, paquette, arsenm, Petar.Avramovic Reviewed By: arsenm Subscribers: sdardis, jvesely, wdng, nhaehnle, rovka, jrtc27, atanasyan, kerbowa, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D75915
2020-03-10 00:00:38 +08:00
; CHECK: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[DEF]](s64)
GlobalISel: Reimplement widenScalar for G_UNMERGE_VALUES results Only use shifts if the requested type exactly matches the source type, and create sub-unmerges otherwise.
2020-01-21 22:02:42 +08:00
; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
[GlobalISel] combine G_TRUNC with G_MERGE_VALUES Summary: Truncating the result of a merge means that most likely we could have done without merge in the first place and just used the input merge inputs directly. This can be done in three cases: 1. If the truncation result is smaller than the merge source, we can use the source in the trunc directly 2. If the sizes are the same, we can replace the register or use a copy 3. If the truncation size is a multiple of the merge source size, we can build a smaller merge This gets rid of most of the larger, hard-to-legalize merges. Reviewers: qcolombet, aditya_nandakumar, aemerson, paquette, arsenm, Petar.Avramovic Reviewed By: arsenm Subscribers: sdardis, jvesely, wdng, nhaehnle, rovka, jrtc27, atanasyan, kerbowa, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D75915
2020-03-10 00:00:38 +08:00
; CHECK: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[UV]], [[C]](s32)
; CHECK: [[LSHR1:%[0-9]+]]:_(s32) = G_LSHR [[TRUNC]], [[C]](s32)
; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY [[UV]](s32)
GlobalISel: Reimplement widenScalar for G_UNMERGE_VALUES results Only use shifts if the requested type exactly matches the source type, and create sub-unmerges otherwise.
2020-01-21 22:02:42 +08:00
; CHECK: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LSHR]](s32)
[GlobalISel] combine G_TRUNC with G_MERGE_VALUES Summary: Truncating the result of a merge means that most likely we could have done without merge in the first place and just used the input merge inputs directly. This can be done in three cases: 1. If the truncation result is smaller than the merge source, we can use the source in the trunc directly 2. If the sizes are the same, we can replace the register or use a copy 3. If the truncation size is a multiple of the merge source size, we can build a smaller merge This gets rid of most of the larger, hard-to-legalize merges. Reviewers: qcolombet, aditya_nandakumar, aemerson, paquette, arsenm, Petar.Avramovic Reviewed By: arsenm Subscribers: sdardis, jvesely, wdng, nhaehnle, rovka, jrtc27, atanasyan, kerbowa, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D75915
2020-03-10 00:00:38 +08:00
; CHECK: [[COPY3:%[0-9]+]]:_(s32) = COPY [[TRUNC]](s32)
GlobalISel: Reimplement widenScalar for G_UNMERGE_VALUES results Only use shifts if the requested type exactly matches the source type, and create sub-unmerges otherwise.
2020-01-21 22:02:42 +08:00
; CHECK: $vgpr0 = COPY [[COPY1]](s32)
; CHECK: $vgpr1 = COPY [[COPY2]](s32)
; CHECK: $vgpr2 = COPY [[COPY3]](s32)
AMDGPU/GlobalISel: Add some baseline tests for unmerge legalization
2020-01-21 21:18:39 +08:00
%0:_(s64) = COPY $vgpr0_vgpr1
%1:_(s48) = G_TRUNC %0
%2:_(s16), %3:_(s16), %4:_(s16) = G_UNMERGE_VALUES %1
%5:_(s32) = G_ANYEXT %2
%6:_(s32) = G_ANYEXT %3
%7:_(s32) = G_ANYEXT %4
$vgpr0 = COPY %5
$vgpr1 = COPY %6
$vgpr2 = COPY %7
...
---
name: test_unmerge_s8_s64
body: |
bb.0:
liveins: $vgpr0_vgpr1
; CHECK-LABEL: name: test_unmerge_s8_s64
; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1
GlobalISel: Reimplement widenScalar for G_UNMERGE_VALUES results Only use shifts if the requested type exactly matches the source type, and create sub-unmerges otherwise.
2020-01-21 22:02:42 +08:00
; CHECK: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](s64)
; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
; CHECK: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[UV]], [[C]](s32)
; CHECK: [[LSHR1:%[0-9]+]]:_(s32) = G_LSHR [[UV1]], [[C]](s32)
; CHECK: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 8
; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY [[C1]](s32)
; CHECK: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535
; CHECK: [[COPY2:%[0-9]+]]:_(s32) = COPY [[UV]](s32)
; CHECK: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C2]]
; CHECK: [[LSHR2:%[0-9]+]]:_(s32) = G_LSHR [[AND]], [[COPY1]](s32)
; CHECK: [[COPY3:%[0-9]+]]:_(s32) = COPY [[C1]](s32)
; CHECK: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LSHR]](s32)
; CHECK: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C2]]
; CHECK: [[LSHR3:%[0-9]+]]:_(s32) = G_LSHR [[AND1]], [[COPY3]](s32)
; CHECK: [[COPY5:%[0-9]+]]:_(s32) = COPY [[C1]](s32)
; CHECK: [[COPY6:%[0-9]+]]:_(s32) = COPY [[UV1]](s32)
; CHECK: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C2]]
; CHECK: [[LSHR4:%[0-9]+]]:_(s32) = G_LSHR [[AND2]], [[COPY5]](s32)
; CHECK: [[COPY7:%[0-9]+]]:_(s32) = COPY [[LSHR1]](s32)
; CHECK: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY7]], [[C2]]
; CHECK: [[LSHR5:%[0-9]+]]:_(s32) = G_LSHR [[AND3]], [[C1]](s32)
; CHECK: [[COPY8:%[0-9]+]]:_(s32) = COPY [[UV]](s32)
; CHECK: [[COPY9:%[0-9]+]]:_(s32) = COPY [[LSHR2]](s32)
; CHECK: [[COPY10:%[0-9]+]]:_(s32) = COPY [[LSHR]](s32)
; CHECK: [[COPY11:%[0-9]+]]:_(s32) = COPY [[LSHR3]](s32)
; CHECK: [[COPY12:%[0-9]+]]:_(s32) = COPY [[UV1]](s32)
; CHECK: [[COPY13:%[0-9]+]]:_(s32) = COPY [[LSHR4]](s32)
; CHECK: [[COPY14:%[0-9]+]]:_(s32) = COPY [[LSHR1]](s32)
; CHECK: [[COPY15:%[0-9]+]]:_(s32) = COPY [[LSHR5]](s32)
; CHECK: $vgpr0 = COPY [[COPY8]](s32)
; CHECK: $vgpr1 = COPY [[COPY9]](s32)
; CHECK: $vgpr2 = COPY [[COPY10]](s32)
; CHECK: $vgpr3 = COPY [[COPY11]](s32)
; CHECK: $vgpr4 = COPY [[COPY12]](s32)
; CHECK: $vgpr5 = COPY [[COPY13]](s32)
; CHECK: $vgpr6 = COPY [[COPY14]](s32)
; CHECK: $vgpr7 = COPY [[COPY15]](s32)
AMDGPU/GlobalISel: Add some baseline tests for unmerge legalization
2020-01-21 21:18:39 +08:00
%0:_(s64) = COPY $vgpr0_vgpr1
%1:_(s8), %2:_(s8), %3:_(s8), %4:_(s8), %5:_(s8), %6:_(s8), %7:_(s8), %8:_(s8) = G_UNMERGE_VALUES %0
%10:_(s32) = G_ANYEXT %1
%11:_(s32) = G_ANYEXT %2
%12:_(s32) = G_ANYEXT %3
%13:_(s32) = G_ANYEXT %4
%14:_(s32) = G_ANYEXT %5
%15:_(s32) = G_ANYEXT %6
%16:_(s32) = G_ANYEXT %7
%17:_(s32) = G_ANYEXT %8
$vgpr0 = COPY %10
$vgpr1 = COPY %11
$vgpr2 = COPY %12
$vgpr3 = COPY %13
$vgpr4 = COPY %14
$vgpr5 = COPY %15
$vgpr6 = COPY %16
$vgpr7 = COPY %17
...
---
name: test_unmerge_s8_p1
body: |
bb.0:
liveins: $vgpr0_vgpr1
; CHECK-LABEL: name: test_unmerge_s8_p1
; CHECK: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1
GlobalISel: Support widening unmerge results with pointer source
2020-01-22 00:12:36 +08:00
; CHECK: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](p1)
; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
; CHECK: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[UV]], [[C]](s32)
; CHECK: [[LSHR1:%[0-9]+]]:_(s32) = G_LSHR [[UV1]], [[C]](s32)
; CHECK: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 8
; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY [[C1]](s32)
; CHECK: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535
; CHECK: [[COPY2:%[0-9]+]]:_(s32) = COPY [[UV]](s32)
; CHECK: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C2]]
; CHECK: [[LSHR2:%[0-9]+]]:_(s32) = G_LSHR [[AND]], [[COPY1]](s32)
; CHECK: [[COPY3:%[0-9]+]]:_(s32) = COPY [[C1]](s32)
; CHECK: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LSHR]](s32)
; CHECK: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C2]]
; CHECK: [[LSHR3:%[0-9]+]]:_(s32) = G_LSHR [[AND1]], [[COPY3]](s32)
; CHECK: [[COPY5:%[0-9]+]]:_(s32) = COPY [[C1]](s32)
; CHECK: [[COPY6:%[0-9]+]]:_(s32) = COPY [[UV1]](s32)
; CHECK: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C2]]
; CHECK: [[LSHR4:%[0-9]+]]:_(s32) = G_LSHR [[AND2]], [[COPY5]](s32)
; CHECK: [[COPY7:%[0-9]+]]:_(s32) = COPY [[LSHR1]](s32)
; CHECK: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY7]], [[C2]]
; CHECK: [[LSHR5:%[0-9]+]]:_(s32) = G_LSHR [[AND3]], [[C1]](s32)
; CHECK: [[COPY8:%[0-9]+]]:_(s32) = COPY [[UV]](s32)
; CHECK: [[COPY9:%[0-9]+]]:_(s32) = COPY [[LSHR2]](s32)
; CHECK: [[COPY10:%[0-9]+]]:_(s32) = COPY [[LSHR]](s32)
; CHECK: [[COPY11:%[0-9]+]]:_(s32) = COPY [[LSHR3]](s32)
; CHECK: [[COPY12:%[0-9]+]]:_(s32) = COPY [[UV1]](s32)
; CHECK: [[COPY13:%[0-9]+]]:_(s32) = COPY [[LSHR4]](s32)
; CHECK: [[COPY14:%[0-9]+]]:_(s32) = COPY [[LSHR1]](s32)
; CHECK: [[COPY15:%[0-9]+]]:_(s32) = COPY [[LSHR5]](s32)
; CHECK: $vgpr0 = COPY [[COPY8]](s32)
; CHECK: $vgpr1 = COPY [[COPY9]](s32)
; CHECK: $vgpr2 = COPY [[COPY10]](s32)
; CHECK: $vgpr3 = COPY [[COPY11]](s32)
; CHECK: $vgpr4 = COPY [[COPY12]](s32)
; CHECK: $vgpr5 = COPY [[COPY13]](s32)
; CHECK: $vgpr6 = COPY [[COPY14]](s32)
; CHECK: $vgpr7 = COPY [[COPY15]](s32)
AMDGPU/GlobalISel: Add some baseline tests for unmerge legalization
2020-01-21 21:18:39 +08:00
%0:_(p1) = COPY $vgpr0_vgpr1
%1:_(s8), %2:_(s8), %3:_(s8), %4:_(s8), %5:_(s8), %6:_(s8), %7:_(s8), %8:_(s8) = G_UNMERGE_VALUES %0
%10:_(s32) = G_ANYEXT %1
%11:_(s32) = G_ANYEXT %2
%12:_(s32) = G_ANYEXT %3
%13:_(s32) = G_ANYEXT %4
%14:_(s32) = G_ANYEXT %5
%15:_(s32) = G_ANYEXT %6
%16:_(s32) = G_ANYEXT %7
%17:_(s32) = G_ANYEXT %8
$vgpr0 = COPY %10
$vgpr1 = COPY %11
$vgpr2 = COPY %12
$vgpr3 = COPY %13
$vgpr4 = COPY %14
$vgpr5 = COPY %15
$vgpr6 = COPY %16
$vgpr7 = COPY %17
...
GlobalISel: Support widening unmerge results with pointer source
2020-01-22 00:12:36 +08:00
---
name: test_unmerge_s4_p1
body: |
bb.0:
liveins: $vgpr0_vgpr1
; CHECK-LABEL: name: test_unmerge_s4_p1
; CHECK: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1
; CHECK: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](p1)
; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
; CHECK: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[UV]], [[C]](s32)
; CHECK: [[LSHR1:%[0-9]+]]:_(s32) = G_LSHR [[UV1]], [[C]](s32)
; CHECK: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 4
; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY [[C1]](s32)
; CHECK: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535
; CHECK: [[COPY2:%[0-9]+]]:_(s32) = COPY [[UV]](s32)
; CHECK: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C2]]
; CHECK: [[LSHR2:%[0-9]+]]:_(s32) = G_LSHR [[AND]], [[COPY1]](s32)
; CHECK: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 8
; CHECK: [[COPY3:%[0-9]+]]:_(s32) = COPY [[C3]](s32)
; CHECK: [[COPY4:%[0-9]+]]:_(s32) = COPY [[UV]](s32)
; CHECK: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C2]]
; CHECK: [[LSHR3:%[0-9]+]]:_(s32) = G_LSHR [[AND1]], [[COPY3]](s32)
; CHECK: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 12
; CHECK: [[COPY5:%[0-9]+]]:_(s32) = COPY [[C4]](s32)
; CHECK: [[COPY6:%[0-9]+]]:_(s32) = COPY [[UV]](s32)
; CHECK: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C2]]
; CHECK: [[LSHR4:%[0-9]+]]:_(s32) = G_LSHR [[AND2]], [[COPY5]](s32)
; CHECK: [[COPY7:%[0-9]+]]:_(s32) = COPY [[C1]](s32)
; CHECK: [[COPY8:%[0-9]+]]:_(s32) = COPY [[LSHR]](s32)
; CHECK: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY8]], [[C2]]
; CHECK: [[LSHR5:%[0-9]+]]:_(s32) = G_LSHR [[AND3]], [[COPY7]](s32)
; CHECK: [[COPY9:%[0-9]+]]:_(s32) = COPY [[C3]](s32)
; CHECK: [[COPY10:%[0-9]+]]:_(s32) = COPY [[LSHR]](s32)
; CHECK: [[AND4:%[0-9]+]]:_(s32) = G_AND [[COPY10]], [[C2]]
; CHECK: [[LSHR6:%[0-9]+]]:_(s32) = G_LSHR [[AND4]], [[COPY9]](s32)
; CHECK: [[COPY11:%[0-9]+]]:_(s32) = COPY [[C4]](s32)
; CHECK: [[COPY12:%[0-9]+]]:_(s32) = COPY [[LSHR]](s32)
; CHECK: [[AND5:%[0-9]+]]:_(s32) = G_AND [[COPY12]], [[C2]]
; CHECK: [[LSHR7:%[0-9]+]]:_(s32) = G_LSHR [[AND5]], [[COPY11]](s32)
; CHECK: [[COPY13:%[0-9]+]]:_(s32) = COPY [[C1]](s32)
; CHECK: [[COPY14:%[0-9]+]]:_(s32) = COPY [[UV1]](s32)
; CHECK: [[AND6:%[0-9]+]]:_(s32) = G_AND [[COPY14]], [[C2]]
; CHECK: [[LSHR8:%[0-9]+]]:_(s32) = G_LSHR [[AND6]], [[COPY13]](s32)
; CHECK: [[COPY15:%[0-9]+]]:_(s32) = COPY [[C3]](s32)
; CHECK: [[COPY16:%[0-9]+]]:_(s32) = COPY [[UV1]](s32)
; CHECK: [[AND7:%[0-9]+]]:_(s32) = G_AND [[COPY16]], [[C2]]
; CHECK: [[LSHR9:%[0-9]+]]:_(s32) = G_LSHR [[AND7]], [[COPY15]](s32)
; CHECK: [[COPY17:%[0-9]+]]:_(s32) = COPY [[C4]](s32)
; CHECK: [[COPY18:%[0-9]+]]:_(s32) = COPY [[UV1]](s32)
; CHECK: [[AND8:%[0-9]+]]:_(s32) = G_AND [[COPY18]], [[C2]]
; CHECK: [[LSHR10:%[0-9]+]]:_(s32) = G_LSHR [[AND8]], [[COPY17]](s32)
; CHECK: [[COPY19:%[0-9]+]]:_(s32) = COPY [[LSHR1]](s32)
; CHECK: [[AND9:%[0-9]+]]:_(s32) = G_AND [[COPY19]], [[C2]]
; CHECK: [[LSHR11:%[0-9]+]]:_(s32) = G_LSHR [[AND9]], [[C1]](s32)
; CHECK: [[COPY20:%[0-9]+]]:_(s32) = COPY [[LSHR1]](s32)
; CHECK: [[AND10:%[0-9]+]]:_(s32) = G_AND [[COPY20]], [[C2]]
; CHECK: [[LSHR12:%[0-9]+]]:_(s32) = G_LSHR [[AND10]], [[C3]](s32)
; CHECK: [[COPY21:%[0-9]+]]:_(s32) = COPY [[LSHR1]](s32)
; CHECK: [[AND11:%[0-9]+]]:_(s32) = G_AND [[COPY21]], [[C2]]
; CHECK: [[LSHR13:%[0-9]+]]:_(s32) = G_LSHR [[AND11]], [[C4]](s32)
; CHECK: [[COPY22:%[0-9]+]]:_(s32) = COPY [[UV]](s32)
; CHECK: [[COPY23:%[0-9]+]]:_(s32) = COPY [[LSHR2]](s32)
; CHECK: [[COPY24:%[0-9]+]]:_(s32) = COPY [[LSHR3]](s32)
; CHECK: [[COPY25:%[0-9]+]]:_(s32) = COPY [[LSHR4]](s32)
; CHECK: [[COPY26:%[0-9]+]]:_(s32) = COPY [[LSHR]](s32)
; CHECK: [[COPY27:%[0-9]+]]:_(s32) = COPY [[LSHR5]](s32)
; CHECK: [[COPY28:%[0-9]+]]:_(s32) = COPY [[LSHR6]](s32)
; CHECK: [[COPY29:%[0-9]+]]:_(s32) = COPY [[LSHR7]](s32)
; CHECK: [[COPY30:%[0-9]+]]:_(s32) = COPY [[UV1]](s32)
; CHECK: [[COPY31:%[0-9]+]]:_(s32) = COPY [[LSHR8]](s32)
; CHECK: [[COPY32:%[0-9]+]]:_(s32) = COPY [[LSHR9]](s32)
; CHECK: [[COPY33:%[0-9]+]]:_(s32) = COPY [[LSHR10]](s32)
; CHECK: [[COPY34:%[0-9]+]]:_(s32) = COPY [[LSHR1]](s32)
; CHECK: [[COPY35:%[0-9]+]]:_(s32) = COPY [[LSHR11]](s32)
; CHECK: [[COPY36:%[0-9]+]]:_(s32) = COPY [[LSHR12]](s32)
; CHECK: [[COPY37:%[0-9]+]]:_(s32) = COPY [[LSHR13]](s32)
; CHECK: $vgpr0 = COPY [[COPY22]](s32)
; CHECK: $vgpr1 = COPY [[COPY23]](s32)
; CHECK: $vgpr2 = COPY [[COPY24]](s32)
; CHECK: $vgpr3 = COPY [[COPY25]](s32)
; CHECK: $vgpr4 = COPY [[COPY26]](s32)
; CHECK: $vgpr5 = COPY [[COPY27]](s32)
; CHECK: $vgpr6 = COPY [[COPY28]](s32)
; CHECK: $vgpr7 = COPY [[COPY29]](s32)
; CHECK: $vgpr8 = COPY [[COPY30]](s32)
; CHECK: $vgpr9 = COPY [[COPY31]](s32)
; CHECK: $vgpr10 = COPY [[COPY32]](s32)
; CHECK: $vgpr11 = COPY [[COPY33]](s32)
; CHECK: $vgpr12 = COPY [[COPY34]](s32)
; CHECK: $vgpr13 = COPY [[COPY35]](s32)
; CHECK: $vgpr14 = COPY [[COPY36]](s32)
; CHECK: $vgpr15 = COPY [[COPY37]](s32)
%0:_(p1) = COPY $vgpr0_vgpr1
%1:_(s4), %2:_(s4), %3:_(s4), %4:_(s4), %5:_(s4), %6:_(s4), %7:_(s4), %8:_(s4), %9:_(s4), %10:_(s4), %11:_(s4), %12:_(s4), %13:_(s4), %14:_(s4), %15:_(s4), %16:_(s4) = G_UNMERGE_VALUES %0
%17:_(s32) = G_ANYEXT %1
%18:_(s32) = G_ANYEXT %2
%19:_(s32) = G_ANYEXT %3
%20:_(s32) = G_ANYEXT %4
%21:_(s32) = G_ANYEXT %5
%22:_(s32) = G_ANYEXT %6
%23:_(s32) = G_ANYEXT %7
%24:_(s32) = G_ANYEXT %8
%25:_(s32) = G_ANYEXT %9
%26:_(s32) = G_ANYEXT %10
%27:_(s32) = G_ANYEXT %11
%28:_(s32) = G_ANYEXT %12
%29:_(s32) = G_ANYEXT %13
%30:_(s32) = G_ANYEXT %14
%31:_(s32) = G_ANYEXT %15
%32:_(s32) = G_ANYEXT %16
$vgpr0 = COPY %17
$vgpr1 = COPY %18
$vgpr2 = COPY %19
$vgpr3 = COPY %20
$vgpr4 = COPY %21
$vgpr5 = COPY %22
$vgpr6 = COPY %23
$vgpr7 = COPY %24
$vgpr8 = COPY %25
$vgpr9 = COPY %26
$vgpr10 = COPY %27
$vgpr11 = COPY %28
$vgpr12 = COPY %29
$vgpr13 = COPY %30
$vgpr14 = COPY %31
$vgpr15 = COPY %32
...
---
name: test_unmerge_s16_p1
body: |
bb.0:
liveins: $vgpr0_vgpr1
; CHECK-LABEL: name: test_unmerge_s16_p1
; CHECK: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1
; CHECK: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](p1)
; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
; CHECK: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[UV]], [[C]](s32)
; CHECK: [[LSHR1:%[0-9]+]]:_(s32) = G_LSHR [[UV1]], [[C]](s32)
; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY [[UV]](s32)
; CHECK: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LSHR]](s32)
; CHECK: [[COPY3:%[0-9]+]]:_(s32) = COPY [[UV1]](s32)
; CHECK: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LSHR1]](s32)
; CHECK: $vgpr0 = COPY [[COPY1]](s32)
; CHECK: $vgpr1 = COPY [[COPY2]](s32)
; CHECK: $vgpr2 = COPY [[COPY3]](s32)
; CHECK: $vgpr3 = COPY [[COPY4]](s32)
%0:_(p1) = COPY $vgpr0_vgpr1
%1:_(s16), %2:_(s16), %3:_(s16), %4:_(s16) = G_UNMERGE_VALUES %0
%5:_(s32) = G_ANYEXT %1
%6:_(s32) = G_ANYEXT %2
%7:_(s32) = G_ANYEXT %3
%8:_(s32) = G_ANYEXT %4
$vgpr0 = COPY %5
$vgpr1 = COPY %6
$vgpr2 = COPY %7
$vgpr3 = COPY %8
...
---
name: test_unmerge_s32_p1
body: |
bb.0:
liveins: $vgpr0_vgpr1
; CHECK-LABEL: name: test_unmerge_s32_p1
; CHECK: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1
; CHECK: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](p1)
; CHECK: $vgpr0 = COPY [[UV]](s32)
; CHECK: $vgpr1 = COPY [[UV1]](s32)
%0:_(p1) = COPY $vgpr0_vgpr1
%1:_(s32), %2:_(s32) = G_UNMERGE_VALUES %0
$vgpr0 = COPY %1
$vgpr1 = COPY %2
...
GlobalISel: Implement widenScalar for G_UNMERGE_VALUES For the scalar case only. Also move the similar G_MERGE_VALUES handling to a separate function and cleanup to make them look more similar. llvm-svn: 352979
2019-02-03 08:07:33 +08:00
---
name: test_unmerge_s16_s32
body: |
bb.0:
liveins: $vgpr0
; CHECK-LABEL: name: test_unmerge_s16_s32
; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
GlobalISel: Reimplement widenScalar for G_UNMERGE_VALUES results Only use shifts if the requested type exactly matches the source type, and create sub-unmerges otherwise.
2020-01-21 22:02:42 +08:00
; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
; CHECK: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[COPY]], [[C]](s32)
; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY [[COPY]](s32)
; CHECK: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LSHR]](s32)
; CHECK: $vgpr0 = COPY [[COPY1]](s32)
; CHECK: $vgpr1 = COPY [[COPY2]](s32)
GlobalISel: Implement widenScalar for G_UNMERGE_VALUES For the scalar case only. Also move the similar G_MERGE_VALUES handling to a separate function and cleanup to make them look more similar. llvm-svn: 352979
2019-02-03 08:07:33 +08:00
%0:_(s32) = COPY $vgpr0
%1:_(s16), %2:_(s16) = G_UNMERGE_VALUES %0
GlobalISel: Support widening unmerge results with pointer source
2020-01-22 00:12:36 +08:00
%3:_(s32) = G_ANYEXT %1
%4:_(s32) = G_ANYEXT %2
$vgpr0 = COPY %3
$vgpr1 = COPY %4
...
---
name: test_unmerge_s16_p3
body: |
bb.0:
liveins: $vgpr0
; CHECK-LABEL: name: test_unmerge_s16_p3
; CHECK: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0
; CHECK: [[PTRTOINT:%[0-9]+]]:_(s32) = G_PTRTOINT [[COPY]](p3)
; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
; CHECK: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[PTRTOINT]], [[C]](s32)
; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY [[PTRTOINT]](s32)
; CHECK: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LSHR]](s32)
; CHECK: $vgpr0 = COPY [[COPY1]](s32)
; CHECK: $vgpr1 = COPY [[COPY2]](s32)
%0:_(p3) = COPY $vgpr0
%1:_(s16), %2:_(s16) = G_UNMERGE_VALUES %0
GlobalISel: Implement widenScalar for G_UNMERGE_VALUES For the scalar case only. Also move the similar G_MERGE_VALUES handling to a separate function and cleanup to make them look more similar. llvm-svn: 352979
2019-02-03 08:07:33 +08:00
%3:_(s32) = G_ANYEXT %1
%4:_(s32) = G_ANYEXT %2
$vgpr0 = COPY %3
$vgpr1 = COPY %4
...
---
name: test_unmerge_s16_s64
body: |
bb.0:
liveins: $vgpr0_vgpr1
; CHECK-LABEL: name: test_unmerge_s16_s64
; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1
GlobalISel: Reimplement widenScalar for G_UNMERGE_VALUES results Only use shifts if the requested type exactly matches the source type, and create sub-unmerges otherwise.
2020-01-21 22:02:42 +08:00
; CHECK: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](s64)
; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
; CHECK: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[UV]], [[C]](s32)
; CHECK: [[LSHR1:%[0-9]+]]:_(s32) = G_LSHR [[UV1]], [[C]](s32)
; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY [[UV]](s32)
; CHECK: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LSHR]](s32)
; CHECK: [[COPY3:%[0-9]+]]:_(s32) = COPY [[UV1]](s32)
; CHECK: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LSHR1]](s32)
; CHECK: $vgpr0 = COPY [[COPY1]](s32)
; CHECK: $vgpr1 = COPY [[COPY2]](s32)
; CHECK: $vgpr2 = COPY [[COPY3]](s32)
; CHECK: $vgpr3 = COPY [[COPY4]](s32)
GlobalISel: Implement widenScalar for G_UNMERGE_VALUES For the scalar case only. Also move the similar G_MERGE_VALUES handling to a separate function and cleanup to make them look more similar. llvm-svn: 352979
2019-02-03 08:07:33 +08:00
%0:_(s64) = COPY $vgpr0_vgpr1
%1:_(s16), %2:_(s16), %3:_(s16), %4:_(s16) = G_UNMERGE_VALUES %0
%5:_(s32) = G_ANYEXT %1
%6:_(s32) = G_ANYEXT %2
%7:_(s32) = G_ANYEXT %3
%8:_(s32) = G_ANYEXT %4
$vgpr0 = COPY %5
$vgpr1 = COPY %6
$vgpr2 = COPY %7
$vgpr3 = COPY %8
...
---
name: test_unmerge_s1_s3
body: |
bb.0:
liveins: $vgpr0
; CHECK-LABEL: name: test_unmerge_s1_s3
; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
GlobalISel: Reimplement widenScalar for G_UNMERGE_VALUES results Only use shifts if the requested type exactly matches the source type, and create sub-unmerges otherwise.
2020-01-21 22:02:42 +08:00
; CHECK: [[TRUNC:%[0-9]+]]:_(s3) = G_TRUNC [[COPY]](s32)
; CHECK: [[UV:%[0-9]+]]:_(s1), [[UV1:%[0-9]+]]:_(s1), [[UV2:%[0-9]+]]:_(s1) = G_UNMERGE_VALUES [[TRUNC]](s3)
; CHECK: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[UV]](s1)
; CHECK: [[ANYEXT1:%[0-9]+]]:_(s32) = G_ANYEXT [[UV1]](s1)
; CHECK: [[ANYEXT2:%[0-9]+]]:_(s32) = G_ANYEXT [[UV2]](s1)
; CHECK: $vgpr0 = COPY [[ANYEXT]](s32)
; CHECK: $vgpr1 = COPY [[ANYEXT1]](s32)
; CHECK: $vgpr2 = COPY [[ANYEXT2]](s32)
GlobalISel: Implement widenScalar for G_UNMERGE_VALUES For the scalar case only. Also move the similar G_MERGE_VALUES handling to a separate function and cleanup to make them look more similar. llvm-svn: 352979
2019-02-03 08:07:33 +08:00
%0:_(s32) = COPY $vgpr0
%1:_(s3) = G_TRUNC %0
%2:_(s1), %3:_(s1), %4:_(s1) = G_UNMERGE_VALUES %1
%5:_(s32) = G_ANYEXT %2
%6:_(s32) = G_ANYEXT %3
%7:_(s32) = G_ANYEXT %4
$vgpr0 = COPY %5
$vgpr1 = COPY %6
$vgpr2 = COPY %7
...
---
name: test_unmerge_s1_s8
body: |
bb.0:
liveins: $vgpr0
; CHECK-LABEL: name: test_unmerge_s1_s8
; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
GlobalISel: Reimplement widenScalar for G_UNMERGE_VALUES results Only use shifts if the requested type exactly matches the source type, and create sub-unmerges otherwise.
2020-01-21 22:02:42 +08:00
; CHECK: [[TRUNC:%[0-9]+]]:_(s8) = G_TRUNC [[COPY]](s32)
; CHECK: [[UV:%[0-9]+]]:_(s1), [[UV1:%[0-9]+]]:_(s1), [[UV2:%[0-9]+]]:_(s1), [[UV3:%[0-9]+]]:_(s1), [[UV4:%[0-9]+]]:_(s1), [[UV5:%[0-9]+]]:_(s1), [[UV6:%[0-9]+]]:_(s1), [[UV7:%[0-9]+]]:_(s1) = G_UNMERGE_VALUES [[TRUNC]](s8)
; CHECK: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[UV]](s1)
; CHECK: [[ANYEXT1:%[0-9]+]]:_(s32) = G_ANYEXT [[UV1]](s1)
; CHECK: [[ANYEXT2:%[0-9]+]]:_(s32) = G_ANYEXT [[UV2]](s1)
; CHECK: [[ANYEXT3:%[0-9]+]]:_(s32) = G_ANYEXT [[UV3]](s1)
; CHECK: [[ANYEXT4:%[0-9]+]]:_(s32) = G_ANYEXT [[UV4]](s1)
; CHECK: [[ANYEXT5:%[0-9]+]]:_(s32) = G_ANYEXT [[UV5]](s1)
; CHECK: [[ANYEXT6:%[0-9]+]]:_(s32) = G_ANYEXT [[UV6]](s1)
; CHECK: [[ANYEXT7:%[0-9]+]]:_(s32) = G_ANYEXT [[UV7]](s1)
GlobalISel: Fix narrowScalar for G_ANYEXT results This is nearly the same as G_ZEXT.
2020-01-10 22:47:17 +08:00
; CHECK: $vgpr0 = COPY [[ANYEXT]](s32)
; CHECK: $vgpr1 = COPY [[ANYEXT1]](s32)
; CHECK: $vgpr2 = COPY [[ANYEXT2]](s32)
; CHECK: $vgpr3 = COPY [[ANYEXT3]](s32)
; CHECK: $vgpr4 = COPY [[ANYEXT4]](s32)
; CHECK: $vgpr5 = COPY [[ANYEXT5]](s32)
; CHECK: $vgpr6 = COPY [[ANYEXT6]](s32)
; CHECK: $vgpr7 = COPY [[ANYEXT7]](s32)
GlobalISel: Implement widenScalar for G_UNMERGE_VALUES For the scalar case only. Also move the similar G_MERGE_VALUES handling to a separate function and cleanup to make them look more similar. llvm-svn: 352979
2019-02-03 08:07:33 +08:00
%0:_(s32) = COPY $vgpr0
%1:_(s8) = G_TRUNC %0
%2:_(s1), %3:_(s1), %4:_(s1), %5:_(s1), %6:_(s1), %7:_(s1), %8:_(s1), %9:_(s1) = G_UNMERGE_VALUES %1
%10:_(s32) = G_ANYEXT %2
%11:_(s32) = G_ANYEXT %3
%12:_(s32) = G_ANYEXT %4
%13:_(s32) = G_ANYEXT %5
%14:_(s32) = G_ANYEXT %6
%15:_(s32) = G_ANYEXT %7
%16:_(s32) = G_ANYEXT %8
%17:_(s32) = G_ANYEXT %9
$vgpr0 = COPY %10
$vgpr1 = COPY %11
$vgpr2 = COPY %12
$vgpr3 = COPY %13
$vgpr4 = COPY %14
$vgpr5 = COPY %15
$vgpr6 = COPY %16
$vgpr7 = COPY %17
...