2009-08-16 01:28:09 +08:00
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; Tests for SSE2 and below, without SSE3+.
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2009-09-09 07:54:48 +08:00
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; RUN: llc < %s -mtriple=i386-apple-darwin10 -mcpu=pentium4 | FileCheck %s
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2008-05-24 08:10:02 +08:00
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define void @t1(<2 x double>* %r, <2 x double>* %A, double %B) nounwind {
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%tmp3 = load <2 x double>* %A, align 16
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%tmp7 = insertelement <2 x double> undef, double %B, i32 0
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%tmp9 = shufflevector <2 x double> %tmp3, <2 x double> %tmp7, <2 x i32> < i32 2, i32 1 >
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store <2 x double> %tmp9, <2 x double>* %r, align 16
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ret void
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2009-08-16 01:28:09 +08:00
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; CHECK: t1:
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; CHECK: movl 8(%esp), %eax
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2009-10-23 13:58:34 +08:00
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; CHECK-NEXT: movl 4(%esp), %ecx
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2009-08-16 02:32:21 +08:00
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; CHECK-NEXT: movapd (%eax), %xmm0
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; CHECK-NEXT: movlpd 12(%esp), %xmm0
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2009-10-23 13:58:34 +08:00
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; CHECK-NEXT: movapd %xmm0, (%ecx)
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2009-08-16 02:32:21 +08:00
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; CHECK-NEXT: ret
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2008-05-24 08:10:02 +08:00
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}
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define void @t2(<2 x double>* %r, <2 x double>* %A, double %B) nounwind {
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%tmp3 = load <2 x double>* %A, align 16
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%tmp7 = insertelement <2 x double> undef, double %B, i32 0
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%tmp9 = shufflevector <2 x double> %tmp3, <2 x double> %tmp7, <2 x i32> < i32 0, i32 2 >
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store <2 x double> %tmp9, <2 x double>* %r, align 16
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ret void
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2009-08-16 01:28:09 +08:00
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; CHECK: t2:
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; CHECK: movl 8(%esp), %eax
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2009-10-23 13:58:34 +08:00
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; CHECK-NEXT: movl 4(%esp), %ecx
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2009-08-16 02:32:21 +08:00
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; CHECK-NEXT: movapd (%eax), %xmm0
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; CHECK-NEXT: movhpd 12(%esp), %xmm0
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2009-10-23 13:58:34 +08:00
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; CHECK-NEXT: movapd %xmm0, (%ecx)
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2009-08-16 02:32:21 +08:00
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; CHECK-NEXT: ret
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2008-05-24 08:10:02 +08:00
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}
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