forked from OSchip/llvm-project
74 lines
1.9 KiB
LLVM
74 lines
1.9 KiB
LLVM
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=i686-unknown | FileCheck %s --check-prefix=X86
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; RUN: llc < %s -mtriple=x86_64-unknown | FileCheck %s --check-prefix=X64
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; Test coverage for matchAddressRecursively's MUL handling
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; Based off:
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; struct A {
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; int m_ints[5];
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; int m_bar();
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; };
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; struct {
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; A* m_data;
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; } c;
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; void foo(bool b, int i) {
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; if (b)
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; return;
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; int j = c.m_data[i + 1].m_bar();
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; foo(false, j);
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; }
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%struct.A = type { [5 x i32] }
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define void @foo(i1 zeroext, i32) nounwind {
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; X86-LABEL: foo:
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; X86: # %bb.0:
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; X86-NEXT: movb {{[0-9]+}}(%esp), %al
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; X86-NEXT: testb %al, %al
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; X86-NEXT: je .LBB0_1
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; X86-NEXT: # %bb.3:
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; X86-NEXT: retl
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; X86-NEXT: .LBB0_1: # %.preheader
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: .p2align 4, 0x90
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; X86-NEXT: .LBB0_2: # =>This Inner Loop Header: Depth=1
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; X86-NEXT: leal (%eax,%eax,4), %eax
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; X86-NEXT: leal 20(,%eax,4), %eax
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; X86-NEXT: pushl %eax
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; X86-NEXT: calll bar
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; X86-NEXT: addl $4, %esp
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; X86-NEXT: jmp .LBB0_2
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;
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; X64-LABEL: foo:
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; X64: # %bb.0:
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; X64-NEXT: pushq %rax
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; X64-NEXT: testl %edi, %edi
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; X64-NEXT: je .LBB0_1
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; X64-NEXT: # %bb.3:
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; X64-NEXT: popq %rax
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; X64-NEXT: retq
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; X64-NEXT: .LBB0_1: # %.preheader
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; X64-NEXT: movl %esi, %eax
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; X64-NEXT: .p2align 4, 0x90
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; X64-NEXT: .LBB0_2: # =>This Inner Loop Header: Depth=1
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; X64-NEXT: incl %eax
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; X64-NEXT: cltq
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; X64-NEXT: shlq $2, %rax
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; X64-NEXT: leaq (%rax,%rax,4), %rdi
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; X64-NEXT: callq bar
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; X64-NEXT: jmp .LBB0_2
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br i1 %0, label %9, label %3
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%4 = phi i32 [ %8, %3 ], [ %1, %2 ]
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%5 = add nsw i32 %4, 1
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%6 = sext i32 %5 to i64
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%7 = getelementptr inbounds %struct.A, %struct.A* null, i64 %6
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%8 = tail call i32 @bar(%struct.A* %7)
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br label %3
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ret void
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}
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declare i32 @bar(%struct.A*)
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