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llvm-project/llvm/test/CodeGen/X86/narrow_op-2.ll

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Eliminate more uses of llvm-as and llvm-dis. llvm-svn: 81290
2009-09-09 07:54:48 +08:00
; RUN: llc < %s -march=x86-64 | FileCheck %s
Added optimization that narrow load / op / store and the 'op' is a bit twiddling instruction and its second operand is an immediate. If bits that are touched by 'op' can be done with a narrower instruction, reduce the width of the load and store as well. This happens a lot with bitfield manipulation code. e.g. orl $65536, 8(%rax) => orb $1, 10(%rax) Since narrowing is not always a win, e.g. i32 -> i16 is a loss on x86, dag combiner consults with the target before performing the optimization. llvm-svn: 72507
2009-05-28 08:35:15 +08:00
%struct.bf = type { i64, i16, i16, i32 }
@bfi = external global %struct.bf*
define void @t1() nounwind ssp {
entry:
change selectiondag to add the sign extended versions of immediate operands to instructions instead of zero extended ones. This makes the asmprinter print signed values more consistently. This apparently only really affects the X86 backend. llvm-svn: 81265
2009-09-09 07:05:44 +08:00
; CHECK: andb $-2, 10(
; CHECK: andb $-3, 10(
Added optimization that narrow load / op / store and the 'op' is a bit twiddling instruction and its second operand is an immediate. If bits that are touched by 'op' can be done with a narrower instruction, reduce the width of the load and store as well. This happens a lot with bitfield manipulation code. e.g. orl $65536, 8(%rax) => orb $1, 10(%rax) Since narrowing is not always a win, e.g. i32 -> i16 is a loss on x86, dag combiner consults with the target before performing the optimization. llvm-svn: 72507
2009-05-28 08:35:15 +08:00
%0 = load %struct.bf** @bfi, align 8
%1 = getelementptr %struct.bf* %0, i64 0, i32 1
%2 = bitcast i16* %1 to i32*
%3 = load i32* %2, align 1
%4 = and i32 %3, -65537
store i32 %4, i32* %2, align 1
%5 = load %struct.bf** @bfi, align 8
%6 = getelementptr %struct.bf* %5, i64 0, i32 1
%7 = bitcast i16* %6 to i32*
%8 = load i32* %7, align 1
%9 = and i32 %8, -131073
store i32 %9, i32* %7, align 1
ret void
}