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llvm-project/llvm/test/CodeGen/PowerPC/2008-03-26-CoalescerBug.ll

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Eliminate more uses of llvm-as and llvm-dis. llvm-svn: 81293
2009-09-09 08:09:15 +08:00
; RUN: llc < %s -mtriple=powerpc-apple-darwin
One more coalescer fix wrt deadness propagation. llvm-svn: 48837
2008-03-27 04:15:49 +08:00
define i32 @t(i64 %byteStart, i32 %activeIndex) nounwind {
entry:
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction Essentially the same as the GEP change in r230786. A similar migration script can be used to update test cases, though a few more test case improvements/changes were required this time around: (r229269-r229278) import fileinput import sys import re pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)") for line in sys.stdin: sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line)) Reviewers: rafael, dexonsmith, grosser Differential Revision: http://reviews.llvm.org/D7649 llvm-svn: 230794
2015-02-28 05:17:42 +08:00
%tmp50 = load i32, i32* null, align 4 ; <i32> [#uses=1]
One more coalescer fix wrt deadness propagation. llvm-svn: 48837
2008-03-27 04:15:49 +08:00
%tmp5051 = zext i32 %tmp50 to i64 ; <i64> [#uses=3]
%tmp53 = udiv i64 %byteStart, %tmp5051 ; <i64> [#uses=1]
%tmp5354 = trunc i64 %tmp53 to i32 ; <i32> [#uses=1]
%tmp62 = urem i64 %byteStart, %tmp5051 ; <i64> [#uses=1]
%tmp94 = add i32 0, 1 ; <i32> [#uses=1]
%tmp100 = urem i32 %tmp94, 0 ; <i32> [#uses=2]
%tmp108 = add i32 0, %activeIndex ; <i32> [#uses=1]
%tmp110 = sub i32 %tmp108, 0 ; <i32> [#uses=1]
%tmp112 = urem i32 %tmp110, 0 ; <i32> [#uses=2]
%tmp122 = icmp ult i32 %tmp112, %tmp100 ; <i1> [#uses=1]
%iftmp.175.0 = select i1 %tmp122, i32 %tmp112, i32 %tmp100 ; <i32> [#uses=1]
%tmp119 = add i32 %tmp5354, 0 ; <i32> [#uses=1]
%tmp131 = add i32 %tmp119, %iftmp.175.0 ; <i32> [#uses=1]
%tmp131132 = zext i32 %tmp131 to i64 ; <i64> [#uses=1]
%tmp147 = mul i64 %tmp131132, %tmp5051 ; <i64> [#uses=1]
br i1 false, label %bb164, label %bb190
bb164: ; preds = %entry
%tmp171172 = and i64 %tmp62, 4294967295 ; <i64> [#uses=1]
%tmp173 = add i64 %tmp171172, %tmp147 ; <i64> [#uses=0]
ret i32 0
bb190: ; preds = %entry
ret i32 0
}