forked from OSchip/llvm-project
809 lines
13 KiB
TableGen
809 lines
13 KiB
TableGen
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//===- P9InstrResources.td - P9 Instruction Resource Defs -*- tablegen -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file defines resources required by some of P9 instruction. This is part
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// P9 processor model used for instruction scheduling. Not every instruction
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// is listed here. Instructions in this file belong to itinerary classes that
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// have instructions with different resource requirements.
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//
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//===----------------------------------------------------------------------===//
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def : InstRW<[P9_ALUE_2C, P9_ALUO_2C, IP_EXECE_1C, IP_EXECO_1C,
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DISP_1C, DISP_1C],
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(instrs
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VADDCUW,
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VADDUBM,
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VADDUDM,
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VADDUHM,
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VADDUWM,
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VAND,
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VANDC,
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VCMPEQUB,
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VCMPEQUBo,
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VCMPEQUD,
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VCMPEQUDo,
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VCMPEQUH,
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VCMPEQUHo,
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VCMPEQUW,
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VCMPEQUWo,
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VCMPGTSB,
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VCMPGTSBo,
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VCMPGTSD,
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VCMPGTSDo,
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VCMPGTSH,
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VCMPGTSHo,
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VCMPGTSW,
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VCMPGTSWo,
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VCMPGTUB,
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VCMPGTUBo,
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VCMPGTUD,
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VCMPGTUDo,
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VCMPGTUH,
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VCMPGTUHo,
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VCMPGTUW,
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VCMPGTUWo,
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VCMPNEB,
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VCMPNEBo,
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VCMPNEH,
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VCMPNEHo,
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VCMPNEW,
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VCMPNEWo,
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VCMPNEZB,
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VCMPNEZBo,
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VCMPNEZH,
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VCMPNEZHo,
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VCMPNEZW,
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VCMPNEZWo,
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VEQV,
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VEXTSB2D,
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VEXTSB2W,
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VEXTSH2D,
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VEXTSH2W,
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VEXTSW2D,
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VMRGEW,
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VMRGOW,
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VNAND,
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VNEGD,
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VNEGW,
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VNOR,
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VOR,
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VORC,
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VPOPCNTB,
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VPOPCNTH,
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VPOPCNTW,
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VSEL,
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VSUBCUW,
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VSUBUBM,
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VSUBUDM,
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VSUBUHM,
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VSUBUWM,
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VXOR,
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V_SET0B,
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V_SET0H,
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V_SET0,
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XVABSDP,
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XVABSSP,
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XVCPSGNDP,
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XVCPSGNSP,
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XVIEXPDP,
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XVNABSDP,
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XVNABSSP,
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XVNEGDP,
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XVNEGSP,
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XVXEXPDP,
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XXLAND,
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XXLANDC,
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XXLEQV,
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XXLNAND,
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XXLNOR,
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XXLOR,
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XXLORf,
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XXLORC,
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XXLXOR,
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XXSEL
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)>;
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def : InstRW<[P9_ALU_2C, IP_EXEC_1C, DISP_1C, DISP_1C],
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(instrs
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XSABSQP,
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XSCPSGNQP,
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XSIEXPQP,
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XSNABSQP,
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XSNEGQP,
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XSXEXPQP,
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XSABSDP,
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XSCPSGNDP,
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XSIEXPDP,
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XSNABSDP,
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XSNEGDP,
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XSXEXPDP
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)>;
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def : InstRW<[P9_ALUE_3C, P9_ALUO_3C, IP_EXECE_1C, IP_EXECO_1C, DISP_1C, DISP_1C],
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(instrs
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VMINSB,
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VMINSD,
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VMINSH,
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VMINSW,
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VMINUB,
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VMINUD,
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VMINUH,
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VMINUW,
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VPOPCNTD,
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VPRTYBD,
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VPRTYBW,
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VRLB,
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VRLD,
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VRLDMI,
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VRLDNM,
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VRLH,
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VRLW,
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VRLWMI,
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VRLWNM,
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VSHASIGMAD,
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VSHASIGMAW,
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VSLB,
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VSLD,
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VSLH,
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VSLW,
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VSRAB,
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VSRAD,
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VSRAH,
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VSRAW,
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VSRB,
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VSRD,
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VSRH,
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VSRW,
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VSUBSBS,
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VSUBSHS,
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VSUBSWS,
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VSUBUBS,
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VSUBUHS,
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VSUBUWS,
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XSCMPEQDP,
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XSCMPEXPDP,
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XSCMPGEDP,
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XSCMPGTDP,
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XSCMPODP,
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XSCMPUDP,
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XSCVSPDPN,
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XSMAXCDP,
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XSMAXDP,
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XSMAXJDP,
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XSMINCDP,
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XSMINDP,
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XSMINJDP,
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XSTDIVDP,
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XSTSQRTDP,
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XSTSTDCDP,
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XSTSTDCSP,
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XSXSIGDP,
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XVCMPEQDP,
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XVCMPEQDPo,
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XVCMPEQSP,
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XVCMPEQSPo,
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XVCMPGEDP,
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XVCMPGEDPo,
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XVCMPGESP,
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XVCMPGESPo,
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XVCMPGTDP,
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XVCMPGTDPo,
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XVCMPGTSP,
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XVCMPGTSPo,
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XVIEXPSP,
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XVMAXDP,
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XVMAXSP,
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XVMINDP,
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XVMINSP,
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XVTDIVDP,
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XVTDIVSP,
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XVTSQRTDP,
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XVTSQRTSP,
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XVTSTDCDP,
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XVTSTDCSP,
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XVXEXPSP,
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XVXSIGDP,
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XVXSIGSP
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)>;
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def : InstRW<[P9_ALUE_4C, P9_ALUO_4C, IP_EXECE_1C, IP_EXECO_1C, DISP_1C, DISP_1C],
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(instrs
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VABSDUB,
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VABSDUH,
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VABSDUW,
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VADDSBS,
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VADDSHS,
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VADDSWS,
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VADDUBS,
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VADDUHS,
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VADDUWS,
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VAVGSB,
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VAVGSH,
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VAVGSW,
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VAVGUB,
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VAVGUH,
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VAVGUW,
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VBPERMD,
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VCLZB,
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VCLZD,
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VCLZH,
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VCLZW,
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VCMPBFP,
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VCMPBFPo,
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VCMPGTFP,
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VCMPGTFPo,
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VCTZB,
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VCTZD,
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VCTZH,
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VCTZW,
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VMAXFP,
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VMAXSB,
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VMAXSD,
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VMAXSH,
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VMAXSW,
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VMAXUB,
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VMAXUD,
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VMAXUH,
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VMAXUW,
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VMINFP,
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VCMPEQFP,
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VCMPEQFPo,
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VCMPGEFP,
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VCMPGEFPo
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)>;
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def : InstRW<[P9_DPE_7C, P9_DPO_7C, IP_EXECE_1C, IP_EXECO_1C, DISP_1C, DISP_1C],
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(instrs
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VADDFP,
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VCTSXS,
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VCTSXS_0,
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VCTUXS,
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VCTUXS_0,
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VEXPTEFP,
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VLOGEFP,
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VMADDFP,
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VMHADDSHS,
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VNMSUBFP,
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VREFP,
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VRFIM,
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VRFIN,
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VRFIP,
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VRFIZ,
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VRSQRTEFP,
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VSUBFP,
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XVADDDP,
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XVADDSP,
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XVCVDPSP,
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XVCVDPSXDS,
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XVCVDPSXWS,
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XVCVDPUXDS,
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XVCVDPUXWS,
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XVCVHPSP,
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XVCVSPDP,
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XVCVSPHP,
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XVCVSPSXDS,
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XVCVSPSXWS,
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XVCVSPUXDS,
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XVCVSPUXWS,
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XVCVSXDDP,
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XVCVSXDSP,
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XVCVSXWDP,
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XVCVSXWSP,
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XVCVUXDDP,
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XVCVUXDSP,
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XVCVUXWDP,
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XVCVUXWSP,
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XVMADDADP,
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XVMADDASP,
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XVMADDMDP,
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XVMADDMSP,
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XVMSUBADP,
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XVMSUBASP,
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XVMSUBMDP,
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XVMSUBMSP,
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XVMULDP,
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XVMULSP,
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XVNMADDADP,
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XVNMADDASP,
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XVNMADDMDP,
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XVNMADDMSP,
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XVNMSUBADP,
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XVNMSUBASP,
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XVNMSUBMDP,
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XVNMSUBMSP,
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XVRDPI,
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XVRDPIC,
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XVRDPIM,
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XVRDPIP,
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XVRDPIZ,
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XVREDP,
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XVRESP,
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XVRSPI,
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XVRSPIC,
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XVRSPIM,
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XVRSPIP,
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XVRSPIZ,
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XVRSQRTEDP,
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XVRSQRTESP,
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XVSUBDP,
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XVSUBSP,
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VCFSX,
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VCFSX_0,
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VCFUX,
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VCFUX_0,
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VMHRADDSHS,
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VMLADDUHM,
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VMSUMMBM,
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VMSUMSHM,
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VMSUMSHS,
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VMSUMUBM,
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VMSUMUHM,
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VMSUMUHS,
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VMULESB,
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VMULESH,
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VMULESW,
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VMULEUB,
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VMULEUH,
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VMULEUW,
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VMULOSB,
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VMULOSH,
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VMULOSW,
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VMULOUB,
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VMULOUH,
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VMULOUW,
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VMULUWM,
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VSUM2SWS,
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VSUM4SBS,
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VSUM4SHS,
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VSUM4UBS,
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VSUMSWS
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)>;
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def : InstRW<[P9_DP_7C, IP_EXEC_1C, DISP_1C, DISP_1C, DISP_1C],
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(instrs
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XSMADDADP,
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XSMADDASP,
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XSMADDMDP,
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XSMADDMSP,
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XSMSUBADP,
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XSMSUBASP,
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XSMSUBMDP,
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XSMSUBMSP,
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XSMULDP,
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XSMULSP,
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XSNMADDADP,
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XSNMADDASP,
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XSNMADDMDP,
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XSNMADDMSP,
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XSNMSUBADP,
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XSNMSUBASP,
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XSNMSUBMDP,
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XSNMSUBMSP
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)>;
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def : InstRW<[P9_DP_7C, IP_EXEC_1C, DISP_1C, DISP_1C],
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(instrs
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XSADDDP,
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XSADDSP,
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XSCVDPHP,
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XSCVDPSP,
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XSCVDPSXDS,
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XSCVDPSXWS,
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XSCVDPUXDS,
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XSCVDPUXWS,
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XSCVHPDP,
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XSCVSPDP,
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XSCVSXDDP,
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XSCVSXDSP,
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XSCVUXDDP,
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XSCVUXDSP,
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XSRDPI,
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XSRDPIC,
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XSRDPIM,
|
||
|
|
XSRDPIP,
|
||
|
|
XSRDPIZ,
|
||
|
|
XSREDP,
|
||
|
|
XSRESP,
|
||
|
|
//XSRSP,
|
||
|
|
XSRSQRTEDP,
|
||
|
|
XSRSQRTESP,
|
||
|
|
XSSUBDP,
|
||
|
|
XSSUBSP,
|
||
|
|
XSCVDPSPN
|
||
|
|
)>;
|
||
|
|
|
||
|
|
def : InstRW<[P9_PM_3C, IP_EXECO_1C, IP_EXECE_1C, DISP_1C, DISP_1C],
|
||
|
|
(instrs
|
||
|
|
VBPERMQ,
|
||
|
|
VCLZLSBB,
|
||
|
|
VCTZLSBB,
|
||
|
|
VEXTRACTD,
|
||
|
|
VEXTRACTUB,
|
||
|
|
VEXTRACTUH,
|
||
|
|
VEXTRACTUW,
|
||
|
|
VEXTUBLX,
|
||
|
|
VEXTUBRX,
|
||
|
|
VEXTUHLX,
|
||
|
|
VEXTUHRX,
|
||
|
|
VEXTUWLX,
|
||
|
|
VEXTUWRX,
|
||
|
|
VGBBD,
|
||
|
|
VINSERTB,
|
||
|
|
VINSERTD,
|
||
|
|
VINSERTH,
|
||
|
|
VINSERTW,
|
||
|
|
VMRGHB,
|
||
|
|
VMRGHH,
|
||
|
|
VMRGHW,
|
||
|
|
VMRGLB,
|
||
|
|
VMRGLH,
|
||
|
|
VMRGLW,
|
||
|
|
VPERM,
|
||
|
|
VPERMR,
|
||
|
|
VPERMXOR,
|
||
|
|
VPKPX,
|
||
|
|
VPKSDSS,
|
||
|
|
VPKSDUS,
|
||
|
|
VPKSHSS,
|
||
|
|
VPKSHUS,
|
||
|
|
VPKSWSS,
|
||
|
|
VPKSWUS,
|
||
|
|
VPKUDUM,
|
||
|
|
VPKUDUS,
|
||
|
|
VPKUHUM,
|
||
|
|
VPKUHUS,
|
||
|
|
VPKUWUM,
|
||
|
|
VPKUWUS,
|
||
|
|
VPRTYBQ,
|
||
|
|
VSL,
|
||
|
|
VSLDOI,
|
||
|
|
VSLO,
|
||
|
|
VSLV,
|
||
|
|
VSPLTB,
|
||
|
|
VSPLTH,
|
||
|
|
VSPLTISB,
|
||
|
|
VSPLTISH,
|
||
|
|
VSPLTISW,
|
||
|
|
VSPLTW,
|
||
|
|
VSR,
|
||
|
|
VSRO,
|
||
|
|
VSRV,
|
||
|
|
VUPKHPX,
|
||
|
|
VUPKHSB,
|
||
|
|
VUPKHSH,
|
||
|
|
VUPKHSW,
|
||
|
|
VUPKLPX,
|
||
|
|
VUPKLSB,
|
||
|
|
VUPKLSH,
|
||
|
|
VUPKLSW,
|
||
|
|
XXBRD,
|
||
|
|
XXBRH,
|
||
|
|
XXBRQ,
|
||
|
|
XXBRW,
|
||
|
|
XXEXTRACTUW,
|
||
|
|
XXINSERTW,
|
||
|
|
XXMRGHW,
|
||
|
|
XXMRGLW,
|
||
|
|
XXPERM,
|
||
|
|
XXPERMR,
|
||
|
|
XXSLDWI,
|
||
|
|
XXSPLTIB,
|
||
|
|
XXSPLTW,
|
||
|
|
VADDCUQ,
|
||
|
|
VADDECUQ,
|
||
|
|
VADDEUQM,
|
||
|
|
VADDUQM,
|
||
|
|
VMUL10CUQ,
|
||
|
|
VMUL10ECUQ,
|
||
|
|
VMUL10EUQ,
|
||
|
|
VMUL10UQ,
|
||
|
|
VSUBCUQ,
|
||
|
|
VSUBECUQ,
|
||
|
|
VSUBEUQM,
|
||
|
|
VSUBUQM,
|
||
|
|
XSCMPEXPQP,
|
||
|
|
XSCMPOQP,
|
||
|
|
XSCMPUQP,
|
||
|
|
XSTSTDCQP,
|
||
|
|
XSXSIGQP
|
||
|
|
)>;
|
||
|
|
|
||
|
|
def : InstRW<[P9_DFU_12C, IP_EXECE_1C, IP_EXECO_1C, DISP_1C, DISP_1C],
|
||
|
|
(instrs
|
||
|
|
XSADDQP,
|
||
|
|
XSADDQPO,
|
||
|
|
XSCVDPQP,
|
||
|
|
XSCVQPDP,
|
||
|
|
XSCVQPDPO,
|
||
|
|
XSCVQPSDZ,
|
||
|
|
XSCVQPSWZ,
|
||
|
|
XSCVQPUDZ,
|
||
|
|
XSCVQPUWZ,
|
||
|
|
XSCVSDQP,
|
||
|
|
XSCVUDQP,
|
||
|
|
XSRQPI,
|
||
|
|
XSRQPXP,
|
||
|
|
XSSUBQP,
|
||
|
|
XSSUBQPO
|
||
|
|
)>;
|
||
|
|
|
||
|
|
def : InstRW<[P9_DFU_24C, IP_EXECE_1C, IP_EXECO_1C, DISP_1C, DISP_1C],
|
||
|
|
(instrs
|
||
|
|
XSMADDQP,
|
||
|
|
XSMADDQPO,
|
||
|
|
XSMSUBQP,
|
||
|
|
XSMSUBQPO,
|
||
|
|
XSMULQP,
|
||
|
|
XSMULQPO,
|
||
|
|
XSNMADDQP,
|
||
|
|
XSNMADDQPO,
|
||
|
|
XSNMSUBQP,
|
||
|
|
XSNMSUBQPO
|
||
|
|
)>;
|
||
|
|
|
||
|
|
def : InstRW<[P9_DFU_58C, IP_EXECE_1C, IP_EXECO_1C, DISP_1C, DISP_1C],
|
||
|
|
(instrs
|
||
|
|
XSDIVQP,
|
||
|
|
XSDIVQPO
|
||
|
|
)>;
|
||
|
|
|
||
|
|
def : InstRW<[P9_DFU_76C, IP_EXECE_1C, IP_EXECO_1C, DISP_1C, DISP_1C],
|
||
|
|
(instrs
|
||
|
|
XSSQRTQP,
|
||
|
|
XSSQRTQPO
|
||
|
|
)>;
|
||
|
|
|
||
|
|
// Load Operation in IIC_LdStLFD
|
||
|
|
|
||
|
|
def : InstRW<[P9_LS_5C, IP_AGEN_1C, DISP_1C, DISP_1C],
|
||
|
|
(instrs
|
||
|
|
LXSDX,
|
||
|
|
LXVD2X,
|
||
|
|
LXSIWZX,
|
||
|
|
LXV,
|
||
|
|
LXSD
|
||
|
|
)>;
|
||
|
|
|
||
|
|
def : InstRW<[P9_LS_5C, IP_AGEN_1C, DISP_1C, DISP_1C, DISP_1C],
|
||
|
|
(instrs
|
||
|
|
LFIWZX,
|
||
|
|
LFDX,
|
||
|
|
LFD
|
||
|
|
)>;
|
||
|
|
|
||
|
|
def : InstRW<[P9_LoadAndALUOp_7C, IP_AGEN_1C, IP_EXEC_1C,
|
||
|
|
DISP_1C, DISP_1C, DISP_1C, DISP_1C],
|
||
|
|
(instrs
|
||
|
|
LXSSPX,
|
||
|
|
LXSIWAX,
|
||
|
|
LXSSP
|
||
|
|
)>;
|
||
|
|
|
||
|
|
def : InstRW<[P9_LoadAndALUOp_7C, IP_AGEN_1C, IP_EXEC_1C,
|
||
|
|
DISP_1C, DISP_1C, DISP_1C, DISP_1C, DISP_1C, DISP_1C],
|
||
|
|
(instrs
|
||
|
|
LFIWAX,
|
||
|
|
LFSX,
|
||
|
|
LFS
|
||
|
|
)>;
|
||
|
|
|
||
|
|
def : InstRW<[P9_LoadAndPMOp_8C, IP_AGEN_1C, IP_EXEC_1C, DISP_1C, DISP_1C],
|
||
|
|
(instrs
|
||
|
|
LXVDSX,
|
||
|
|
LXVW4X
|
||
|
|
)>;
|
||
|
|
|
||
|
|
// Store Operations in IIC_LdStSTFD.
|
||
|
|
|
||
|
|
def : InstRW<[P9_LS_1C, IP_EXEC_1C, IP_AGEN_1C, DISP_1C, DISP_1C, DISP_1C],
|
||
|
|
(instrs
|
||
|
|
STFS,
|
||
|
|
STFD,
|
||
|
|
STFIWX,
|
||
|
|
STFSX,
|
||
|
|
STFDX,
|
||
|
|
STXSDX,
|
||
|
|
STXSSPX,
|
||
|
|
STXSIWX
|
||
|
|
)>;
|
||
|
|
|
||
|
|
def : InstRW<[P9_LS_1C, IP_EXEC_1C, IP_EXEC_1C, IP_AGEN_1C, DISP_1C, DISP_1C],
|
||
|
|
(instrs
|
||
|
|
STXVD2X,
|
||
|
|
STXVW4X
|
||
|
|
)>;
|
||
|
|
|
||
|
|
|
||
|
|
// Divide Operations in IIC_IntDivW, IIC_IntDivD.
|
||
|
|
|
||
|
|
def : InstRW<[P9_DIV_16C_8, IP_EXECE_1C, DISP_1C, DISP_1C],
|
||
|
|
(instrs
|
||
|
|
DIVW,
|
||
|
|
DIVWU
|
||
|
|
)>;
|
||
|
|
|
||
|
|
def : InstRW<[P9_DIV_24C_8, IP_EXECE_1C, DISP_1C, DISP_1C],
|
||
|
|
(instrs
|
||
|
|
DIVWE,
|
||
|
|
DIVD,
|
||
|
|
DIVWEU,
|
||
|
|
DIVDU
|
||
|
|
)>;
|
||
|
|
|
||
|
|
def : InstRW<[P9_DIV_40C_8, IP_EXECE_1C, DISP_1C, DISP_1C],
|
||
|
|
(instrs
|
||
|
|
DIVDE,
|
||
|
|
DIVDEU
|
||
|
|
)>;
|
||
|
|
|
||
|
|
def : InstRW<[P9_IntDivAndALUOp_26C_8, IP_EXECE_1C, IP_EXEC_1C,
|
||
|
|
DISP_1C, DISP_1C, DISP_1C, DISP_1C],
|
||
|
|
(instrs
|
||
|
|
DIVWEo,
|
||
|
|
DIVWEUo
|
||
|
|
)>;
|
||
|
|
|
||
|
|
def : InstRW<[P9_IntDivAndALUOp_42C_8, IP_EXECE_1C, IP_EXEC_1C,
|
||
|
|
DISP_1C, DISP_1C, DISP_1C, DISP_1C],
|
||
|
|
(instrs
|
||
|
|
DIVDEo,
|
||
|
|
DIVDEUo
|
||
|
|
)>;
|
||
|
|
|
||
|
|
// Rotate Operations in IIC_IntRotateD, IIC_IntRotateDI
|
||
|
|
def : InstRW<[P9_ALU_2C, IP_EXEC_1C, DISP_1C, DISP_1C],
|
||
|
|
(instrs
|
||
|
|
SLD,
|
||
|
|
SRD,
|
||
|
|
SRAD,
|
||
|
|
SRADI,
|
||
|
|
RLDIC
|
||
|
|
)>;
|
||
|
|
|
||
|
|
def : InstRW<[P9_ALU_2C, IP_EXEC_1C, DISP_1C, DISP_1C, DISP_1C],
|
||
|
|
(instrs
|
||
|
|
RLDCL,
|
||
|
|
RLDCR,
|
||
|
|
RLDIMI,
|
||
|
|
RLDICL,
|
||
|
|
RLDICR,
|
||
|
|
RLDICL_32_64
|
||
|
|
)>;
|
||
|
|
|
||
|
|
// CR access instructions in _BrMCR, IIC_BrMCRX.
|
||
|
|
|
||
|
|
def : InstRW<[P9_ALU_2C, P9_ALU_2C, IP_EXEC_1C, IP_EXEC_1C,
|
||
|
|
DISP_1C, DISP_1C, DISP_1C, DISP_1C, DISP_1C, DISP_1C],
|
||
|
|
(instrs
|
||
|
|
MTOCRF,
|
||
|
|
MTOCRF8,
|
||
|
|
MTCRF,
|
||
|
|
MTCRF8
|
||
|
|
)>;
|
||
|
|
|
||
|
|
def : InstRW<[P9_ALU_5C, IP_EXEC_1C, DISP_1C, DISP_1C],
|
||
|
|
(instrs
|
||
|
|
MCRF,
|
||
|
|
MCRXRX
|
||
|
|
)>;
|
||
|
|
|
||
|
|
def : InstRW<[P9_ALU_5C, P9_ALU_5C, IP_EXEC_1C, IP_EXEC_1C,
|
||
|
|
DISP_1C, DISP_1C, DISP_1C, DISP_1C],
|
||
|
|
(instrs
|
||
|
|
MCRFS
|
||
|
|
)>;
|
||
|
|
|
||
|
|
// FP Div instructions in IIC_FPDivD and IIC_FPDivS.
|
||
|
|
|
||
|
|
def : InstRW<[P9_DP_33C_8, IP_EXEC_1C, DISP_1C, DISP_1C, DISP_1C],
|
||
|
|
(instrs
|
||
|
|
FDIV,
|
||
|
|
XSDIVDP
|
||
|
|
)>;
|
||
|
|
|
||
|
|
def : InstRW<[P9_DP_22C_5, IP_EXEC_1C, DISP_1C, DISP_1C, DISP_1C],
|
||
|
|
(instrs
|
||
|
|
FDIVS,
|
||
|
|
XSDIVSP
|
||
|
|
)>;
|
||
|
|
|
||
|
|
def : InstRW<[P9_DP_24C_8, IP_EXECE_1C, IP_EXECO_1C, DISP_1C, DISP_1C],
|
||
|
|
(instrs
|
||
|
|
XVDIVSP
|
||
|
|
)>;
|
||
|
|
|
||
|
|
def : InstRW<[P9_DP_33C_8, IP_EXECE_1C, IP_EXECO_1C, DISP_1C, DISP_1C],
|
||
|
|
(instrs
|
||
|
|
XVDIVDP
|
||
|
|
)>;
|
||
|
|
|
||
|
|
// FP Instructions in IIC_FPGeneral, IIC_FPFused
|
||
|
|
|
||
|
|
def : InstRW<[P9_DP_7C, IP_EXEC_1C, DISP_1C, DISP_1C, DISP_1C],
|
||
|
|
(instrs
|
||
|
|
FRSP,
|
||
|
|
FRIND,
|
||
|
|
FRINS,
|
||
|
|
FRIPD,
|
||
|
|
FRIPS,
|
||
|
|
FRIZD,
|
||
|
|
FRIZS,
|
||
|
|
FRIMD,
|
||
|
|
FRIMS,
|
||
|
|
FRE,
|
||
|
|
FRES,
|
||
|
|
FRSQRTE,
|
||
|
|
FRSQRTES,
|
||
|
|
FMADDS,
|
||
|
|
FMADD,
|
||
|
|
FMSUBS,
|
||
|
|
FMSUB,
|
||
|
|
FNMADDS,
|
||
|
|
FNMADD,
|
||
|
|
FNMSUBS,
|
||
|
|
FNMSUB,
|
||
|
|
FSELD,
|
||
|
|
FSELS,
|
||
|
|
FADDS,
|
||
|
|
FMULS,
|
||
|
|
FMUL,
|
||
|
|
FSUBS,
|
||
|
|
FCFID,
|
||
|
|
FCTID,
|
||
|
|
FCTIDZ,
|
||
|
|
FCFIDU,
|
||
|
|
FCFIDS,
|
||
|
|
FCFIDUS,
|
||
|
|
FCTIDUZ,
|
||
|
|
FCTIWUZ,
|
||
|
|
FCTIW,
|
||
|
|
FCTIWZ
|
||
|
|
)>;
|
||
|
|
|
||
|
|
def : InstRW<[P9_DP_7C, IP_EXEC_1C, DISP_1C, DISP_1C, DISP_1C],
|
||
|
|
(instrs
|
||
|
|
FMR,
|
||
|
|
FABSD,
|
||
|
|
FABSS,
|
||
|
|
FNABSD,
|
||
|
|
FNABSS,
|
||
|
|
FNEGD,
|
||
|
|
FNEGS,
|
||
|
|
FCPSGND,
|
||
|
|
FCPSGNS
|
||
|
|
)>;
|
||
|
|
|
||
|
|
def : InstRW<[P9_ALU_3C, IP_EXEC_1C, DISP_1C, DISP_1C, DISP_1C],
|
||
|
|
(instrs
|
||
|
|
FCMPUS,
|
||
|
|
FCMPUD
|
||
|
|
)>;
|
||
|
|
|
||
|
|
// Load instructions in IIC_LdStLFDU and IIC_LdStLFDUX.
|
||
|
|
|
||
|
|
def : InstRW<[P9_LoadAndALUOp_7C, P9_ALU_2C,
|
||
|
|
IP_AGEN_1C, IP_EXEC_1C, IP_EXEC_1C,
|
||
|
|
DISP_1C, DISP_1C, DISP_1C, DISP_1C,
|
||
|
|
DISP_1C, DISP_1C, DISP_1C, DISP_1C],
|
||
|
|
(instrs
|
||
|
|
LFSU,
|
||
|
|
LFSUX
|
||
|
|
)>;
|
||
|
|
|
||
|
|
def : InstRW<[P9_LS_5C, P9_ALU_2C, IP_AGEN_1C, IP_EXEC_1C,
|
||
|
|
DISP_1C, DISP_1C, DISP_1C, DISP_1C, DISP_1C],
|
||
|
|
(instrs
|
||
|
|
LFDU,
|
||
|
|
LFDUX
|
||
|
|
)>;
|
||
|
|
|