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llvm-project/clang/lib/Headers/avx2intrin.h

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Begin adding AVX2 intrinsics. Necessitated increasing the number of bits used to store builtinID when serializing identifier table. llvm-svn: 146855
2011-12-19 13:04:33 +08:00
/*===---- avx2intrin.h - AVX2 intrinsics -----------------------------------===
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*
*===-----------------------------------------------------------------------===
*/
#ifndef __IMMINTRIN_H
#error "Never use <avx2intrin.h> directly; include <immintrin.h> instead."
#endif
Add missing include guards into headers in lib/Headers. While it may appear that these headers should not be included more than once, they are in fact included twice when building our builtins module (in order for it to generate submodules for them), and without this, any modular build enabling AVX and including any builtin header fails. Testing this is tricky because including any of these headers in a modular build is liable to fail, due to unrelated builtin headers in the same module including headers which might not be available on the system running the tests. Suggestion on that front are welcome (but we're getting close to being able to run a buildbot that has modules enabled for all tests, which would nicely solve the testing problem). llvm-svn: 186275
2013-07-14 13:41:45 +08:00
#ifndef __AVX2INTRIN_H
#define __AVX2INTRIN_H
Use a define for per-file function attributes for the Intel intrinsic headers. This is a precursor to changing them to use the new target attribute code. llvm-svn: 239882
2015-06-17 15:09:20 +08:00
/* Define the default attributes for the functions in this file. */
[X86] Rename DEFAULT_FN_ATTR macro to __DEFAULT_FN_ATTR llvm-svn: 241065
2015-06-30 21:36:19 +08:00
#define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__, __target__("avx2")))
Use a define for per-file function attributes for the Intel intrinsic headers. This is a precursor to changing them to use the new target attribute code. llvm-svn: 239882
2015-06-17 15:09:20 +08:00
Begin adding AVX2 intrinsics. Necessitated increasing the number of bits used to store builtinID when serializing identifier table. llvm-svn: 146855
2011-12-19 13:04:33 +08:00
/* SSE4 Multiple Packed Sums of Absolute Difference. */
[X86] Add a few missing typecasts to intrinsics. Found by playing with -fno-lax-vector-conversions on the builtin tests. llvm-svn: 269734
2016-05-17 11:42:31 +08:00
#define _mm256_mpsadbw_epu8(X, Y, M) \
(__m256i)__builtin_ia32_mpsadbw256((__v32qi)(__m256i)(X), \
(__v32qi)(__m256i)(Y), (int)(M))
Begin adding AVX2 intrinsics. Necessitated increasing the number of bits used to store builtinID when serializing identifier table. llvm-svn: 146855
2011-12-19 13:04:33 +08:00
[X86] Rename DEFAULT_FN_ATTR macro to __DEFAULT_FN_ATTR llvm-svn: 241065
2015-06-30 21:36:19 +08:00
static __inline__ __m256i __DEFAULT_FN_ATTRS
PR14964: intrinsic headers using non-reserved identifiers Several of the intrinsic headers were using plain non-reserved identifiers. C++11 17.6.4.3.2 [global.names] p1 reservers names containing a double begining with an underscore followed by an uppercase letter for any use. I think I got them all, but open to being corrected. For the most part I didn't bother updating function-like macro parameter names because I don't believe they're subject to any such collission - though some function-like macros already follow this convention (I didn't update them in part because the churn was more significant as several function-like macros use the double underscore prefixed version of the same name as a parameter in their implementation) llvm-svn: 172666
2013-01-17 07:08:36 +08:00
_mm256_abs_epi8(__m256i __a)
Begin adding AVX2 intrinsics. Necessitated increasing the number of bits used to store builtinID when serializing identifier table. llvm-svn: 146855
2011-12-19 13:04:33 +08:00
{
PR14964: intrinsic headers using non-reserved identifiers Several of the intrinsic headers were using plain non-reserved identifiers. C++11 17.6.4.3.2 [global.names] p1 reservers names containing a double begining with an underscore followed by an uppercase letter for any use. I think I got them all, but open to being corrected. For the most part I didn't bother updating function-like macro parameter names because I don't believe they're subject to any such collission - though some function-like macros already follow this convention (I didn't update them in part because the churn was more significant as several function-like macros use the double underscore prefixed version of the same name as a parameter in their implementation) llvm-svn: 172666
2013-01-17 07:08:36 +08:00
return (__m256i)__builtin_ia32_pabsb256((__v32qi)__a);
Begin adding AVX2 intrinsics. Necessitated increasing the number of bits used to store builtinID when serializing identifier table. llvm-svn: 146855
2011-12-19 13:04:33 +08:00
}
[X86] Rename DEFAULT_FN_ATTR macro to __DEFAULT_FN_ATTR llvm-svn: 241065
2015-06-30 21:36:19 +08:00
static __inline__ __m256i __DEFAULT_FN_ATTRS
PR14964: intrinsic headers using non-reserved identifiers Several of the intrinsic headers were using plain non-reserved identifiers. C++11 17.6.4.3.2 [global.names] p1 reservers names containing a double begining with an underscore followed by an uppercase letter for any use. I think I got them all, but open to being corrected. For the most part I didn't bother updating function-like macro parameter names because I don't believe they're subject to any such collission - though some function-like macros already follow this convention (I didn't update them in part because the churn was more significant as several function-like macros use the double underscore prefixed version of the same name as a parameter in their implementation) llvm-svn: 172666
2013-01-17 07:08:36 +08:00
_mm256_abs_epi16(__m256i __a)
Begin adding AVX2 intrinsics. Necessitated increasing the number of bits used to store builtinID when serializing identifier table. llvm-svn: 146855
2011-12-19 13:04:33 +08:00
{
PR14964: intrinsic headers using non-reserved identifiers Several of the intrinsic headers were using plain non-reserved identifiers. C++11 17.6.4.3.2 [global.names] p1 reservers names containing a double begining with an underscore followed by an uppercase letter for any use. I think I got them all, but open to being corrected. For the most part I didn't bother updating function-like macro parameter names because I don't believe they're subject to any such collission - though some function-like macros already follow this convention (I didn't update them in part because the churn was more significant as several function-like macros use the double underscore prefixed version of the same name as a parameter in their implementation) llvm-svn: 172666
2013-01-17 07:08:36 +08:00
return (__m256i)__builtin_ia32_pabsw256((__v16hi)__a);
Begin adding AVX2 intrinsics. Necessitated increasing the number of bits used to store builtinID when serializing identifier table. llvm-svn: 146855
2011-12-19 13:04:33 +08:00
}
[X86] Rename DEFAULT_FN_ATTR macro to __DEFAULT_FN_ATTR llvm-svn: 241065
2015-06-30 21:36:19 +08:00
static __inline__ __m256i __DEFAULT_FN_ATTRS
PR14964: intrinsic headers using non-reserved identifiers Several of the intrinsic headers were using plain non-reserved identifiers. C++11 17.6.4.3.2 [global.names] p1 reservers names containing a double begining with an underscore followed by an uppercase letter for any use. I think I got them all, but open to being corrected. For the most part I didn't bother updating function-like macro parameter names because I don't believe they're subject to any such collission - though some function-like macros already follow this convention (I didn't update them in part because the churn was more significant as several function-like macros use the double underscore prefixed version of the same name as a parameter in their implementation) llvm-svn: 172666
2013-01-17 07:08:36 +08:00
_mm256_abs_epi32(__m256i __a)
Begin adding AVX2 intrinsics. Necessitated increasing the number of bits used to store builtinID when serializing identifier table. llvm-svn: 146855
2011-12-19 13:04:33 +08:00
{
PR14964: intrinsic headers using non-reserved identifiers Several of the intrinsic headers were using plain non-reserved identifiers. C++11 17.6.4.3.2 [global.names] p1 reservers names containing a double begining with an underscore followed by an uppercase letter for any use. I think I got them all, but open to being corrected. For the most part I didn't bother updating function-like macro parameter names because I don't believe they're subject to any such collission - though some function-like macros already follow this convention (I didn't update them in part because the churn was more significant as several function-like macros use the double underscore prefixed version of the same name as a parameter in their implementation) llvm-svn: 172666
2013-01-17 07:08:36 +08:00
return (__m256i)__builtin_ia32_pabsd256((__v8si)__a);
Begin adding AVX2 intrinsics. Necessitated increasing the number of bits used to store builtinID when serializing identifier table. llvm-svn: 146855
2011-12-19 13:04:33 +08:00
}
[X86] Rename DEFAULT_FN_ATTR macro to __DEFAULT_FN_ATTR llvm-svn: 241065
2015-06-30 21:36:19 +08:00
static __inline__ __m256i __DEFAULT_FN_ATTRS
PR14964: intrinsic headers using non-reserved identifiers Several of the intrinsic headers were using plain non-reserved identifiers. C++11 17.6.4.3.2 [global.names] p1 reservers names containing a double begining with an underscore followed by an uppercase letter for any use. I think I got them all, but open to being corrected. For the most part I didn't bother updating function-like macro parameter names because I don't believe they're subject to any such collission - though some function-like macros already follow this convention (I didn't update them in part because the churn was more significant as several function-like macros use the double underscore prefixed version of the same name as a parameter in their implementation) llvm-svn: 172666
2013-01-17 07:08:36 +08:00
_mm256_packs_epi16(__m256i __a, __m256i __b)
Begin adding AVX2 intrinsics. Necessitated increasing the number of bits used to store builtinID when serializing identifier table. llvm-svn: 146855
2011-12-19 13:04:33 +08:00
{
PR14964: intrinsic headers using non-reserved identifiers Several of the intrinsic headers were using plain non-reserved identifiers. C++11 17.6.4.3.2 [global.names] p1 reservers names containing a double begining with an underscore followed by an uppercase letter for any use. I think I got them all, but open to being corrected. For the most part I didn't bother updating function-like macro parameter names because I don't believe they're subject to any such collission - though some function-like macros already follow this convention (I didn't update them in part because the churn was more significant as several function-like macros use the double underscore prefixed version of the same name as a parameter in their implementation) llvm-svn: 172666
2013-01-17 07:08:36 +08:00
return (__m256i)__builtin_ia32_packsswb256((__v16hi)__a, (__v16hi)__b);
Begin adding AVX2 intrinsics. Necessitated increasing the number of bits used to store builtinID when serializing identifier table. llvm-svn: 146855
2011-12-19 13:04:33 +08:00
}
[X86] Rename DEFAULT_FN_ATTR macro to __DEFAULT_FN_ATTR llvm-svn: 241065
2015-06-30 21:36:19 +08:00
static __inline__ __m256i __DEFAULT_FN_ATTRS
PR14964: intrinsic headers using non-reserved identifiers Several of the intrinsic headers were using plain non-reserved identifiers. C++11 17.6.4.3.2 [global.names] p1 reservers names containing a double begining with an underscore followed by an uppercase letter for any use. I think I got them all, but open to being corrected. For the most part I didn't bother updating function-like macro parameter names because I don't believe they're subject to any such collission - though some function-like macros already follow this convention (I didn't update them in part because the churn was more significant as several function-like macros use the double underscore prefixed version of the same name as a parameter in their implementation) llvm-svn: 172666
2013-01-17 07:08:36 +08:00
_mm256_packs_epi32(__m256i __a, __m256i __b)
Begin adding AVX2 intrinsics. Necessitated increasing the number of bits used to store builtinID when serializing identifier table. llvm-svn: 146855
2011-12-19 13:04:33 +08:00
{
PR14964: intrinsic headers using non-reserved identifiers Several of the intrinsic headers were using plain non-reserved identifiers. C++11 17.6.4.3.2 [global.names] p1 reservers names containing a double begining with an underscore followed by an uppercase letter for any use. I think I got them all, but open to being corrected. For the most part I didn't bother updating function-like macro parameter names because I don't believe they're subject to any such collission - though some function-like macros already follow this convention (I didn't update them in part because the churn was more significant as several function-like macros use the double underscore prefixed version of the same name as a parameter in their implementation) llvm-svn: 172666
2013-01-17 07:08:36 +08:00
return (__m256i)__builtin_ia32_packssdw256((__v8si)__a, (__v8si)__b);
Begin adding AVX2 intrinsics. Necessitated increasing the number of bits used to store builtinID when serializing identifier table. llvm-svn: 146855
2011-12-19 13:04:33 +08:00
}
[X86] Rename DEFAULT_FN_ATTR macro to __DEFAULT_FN_ATTR llvm-svn: 241065
2015-06-30 21:36:19 +08:00
static __inline__ __m256i __DEFAULT_FN_ATTRS
PR14964: intrinsic headers using non-reserved identifiers Several of the intrinsic headers were using plain non-reserved identifiers. C++11 17.6.4.3.2 [global.names] p1 reservers names containing a double begining with an underscore followed by an uppercase letter for any use. I think I got them all, but open to being corrected. For the most part I didn't bother updating function-like macro parameter names because I don't believe they're subject to any such collission - though some function-like macros already follow this convention (I didn't update them in part because the churn was more significant as several function-like macros use the double underscore prefixed version of the same name as a parameter in their implementation) llvm-svn: 172666
2013-01-17 07:08:36 +08:00
_mm256_packus_epi16(__m256i __a, __m256i __b)
Begin adding AVX2 intrinsics. Necessitated increasing the number of bits used to store builtinID when serializing identifier table. llvm-svn: 146855
2011-12-19 13:04:33 +08:00
{
PR14964: intrinsic headers using non-reserved identifiers Several of the intrinsic headers were using plain non-reserved identifiers. C++11 17.6.4.3.2 [global.names] p1 reservers names containing a double begining with an underscore followed by an uppercase letter for any use. I think I got them all, but open to being corrected. For the most part I didn't bother updating function-like macro parameter names because I don't believe they're subject to any such collission - though some function-like macros already follow this convention (I didn't update them in part because the churn was more significant as several function-like macros use the double underscore prefixed version of the same name as a parameter in their implementation) llvm-svn: 172666
2013-01-17 07:08:36 +08:00
return (__m256i)__builtin_ia32_packuswb256((__v16hi)__a, (__v16hi)__b);
Begin adding AVX2 intrinsics. Necessitated increasing the number of bits used to store builtinID when serializing identifier table. llvm-svn: 146855
2011-12-19 13:04:33 +08:00
}
[X86] Rename DEFAULT_FN_ATTR macro to __DEFAULT_FN_ATTR llvm-svn: 241065
2015-06-30 21:36:19 +08:00
static __inline__ __m256i __DEFAULT_FN_ATTRS
Begin adding AVX2 intrinsics. Necessitated increasing the number of bits used to store builtinID when serializing identifier table. llvm-svn: 146855
2011-12-19 13:04:33 +08:00
_mm256_packus_epi32(__m256i __V1, __m256i __V2)
{
return (__m256i) __builtin_ia32_packusdw256((__v8si)__V1, (__v8si)__V2);
}
[X86] Rename DEFAULT_FN_ATTR macro to __DEFAULT_FN_ATTR llvm-svn: 241065
2015-06-30 21:36:19 +08:00
static __inline__ __m256i __DEFAULT_FN_ATTRS
PR14964: intrinsic headers using non-reserved identifiers Several of the intrinsic headers were using plain non-reserved identifiers. C++11 17.6.4.3.2 [global.names] p1 reservers names containing a double begining with an underscore followed by an uppercase letter for any use. I think I got them all, but open to being corrected. For the most part I didn't bother updating function-like macro parameter names because I don't believe they're subject to any such collission - though some function-like macros already follow this convention (I didn't update them in part because the churn was more significant as several function-like macros use the double underscore prefixed version of the same name as a parameter in their implementation) llvm-svn: 172666
2013-01-17 07:08:36 +08:00
_mm256_add_epi8(__m256i __a, __m256i __b)
Begin adding AVX2 intrinsics. Necessitated increasing the number of bits used to store builtinID when serializing identifier table. llvm-svn: 146855
2011-12-19 13:04:33 +08:00
{
[X86] Use unsigned types for vector arithmetic in intrinsics to avoid undefined behavior for signed integer overflow. This is really only needed for addition, subtraction, and multiplication, but I did the bitwise ops too for overall consistency. Clang currently doesn't set NSW for signed vector operations so the undefined behavior shouldn't happen today. llvm-svn: 271778
2016-06-04 13:43:41 +08:00
return (__m256i)((__v32qu)__a + (__v32qu)__b);
Begin adding AVX2 intrinsics. Necessitated increasing the number of bits used to store builtinID when serializing identifier table. llvm-svn: 146855
2011-12-19 13:04:33 +08:00
}
[X86] Rename DEFAULT_FN_ATTR macro to __DEFAULT_FN_ATTR llvm-svn: 241065
2015-06-30 21:36:19 +08:00
static __inline__ __m256i __DEFAULT_FN_ATTRS
PR14964: intrinsic headers using non-reserved identifiers Several of the intrinsic headers were using plain non-reserved identifiers. C++11 17.6.4.3.2 [global.names] p1 reservers names containing a double begining with an underscore followed by an uppercase letter for any use. I think I got them all, but open to being corrected. For the most part I didn't bother updating function-like macro parameter names because I don't believe they're subject to any such collission - though some function-like macros already follow this convention (I didn't update them in part because the churn was more significant as several function-like macros use the double underscore prefixed version of the same name as a parameter in their implementation) llvm-svn: 172666
2013-01-17 07:08:36 +08:00
_mm256_add_epi16(__m256i __a, __m256i __b)
Begin adding AVX2 intrinsics. Necessitated increasing the number of bits used to store builtinID when serializing identifier table. llvm-svn: 146855
2011-12-19 13:04:33 +08:00
{
[X86] Use unsigned types for vector arithmetic in intrinsics to avoid undefined behavior for signed integer overflow. This is really only needed for addition, subtraction, and multiplication, but I did the bitwise ops too for overall consistency. Clang currently doesn't set NSW for signed vector operations so the undefined behavior shouldn't happen today. llvm-svn: 271778
2016-06-04 13:43:41 +08:00
return (__m256i)((__v16hu)__a + (__v16hu)__b);
Begin adding AVX2 intrinsics. Necessitated increasing the number of bits used to store builtinID when serializing identifier table. llvm-svn: 146855
2011-12-19 13:04:33 +08:00
}
[X86] Rename DEFAULT_FN_ATTR macro to __DEFAULT_FN_ATTR llvm-svn: 241065
2015-06-30 21:36:19 +08:00
static __inline__ __m256i __DEFAULT_FN_ATTRS
PR14964: intrinsic headers using non-reserved identifiers Several of the intrinsic headers were using plain non-reserved identifiers. C++11 17.6.4.3.2 [global.names] p1 reservers names containing a double begining with an underscore followed by an uppercase letter for any use. I think I got them all, but open to being corrected. For the most part I didn't bother updating function-like macro parameter names because I don't believe they're subject to any such collission - though some function-like macros already follow this convention (I didn't update them in part because the churn was more significant as several function-like macros use the double underscore prefixed version of the same name as a parameter in their implementation) llvm-svn: 172666
2013-01-17 07:08:36 +08:00
_mm256_add_epi32(__m256i __a, __m256i __b)
Begin adding AVX2 intrinsics. Necessitated increasing the number of bits used to store builtinID when serializing identifier table. llvm-svn: 146855
2011-12-19 13:04:33 +08:00
{
[X86] Use unsigned types for vector arithmetic in intrinsics to avoid undefined behavior for signed integer overflow. This is really only needed for addition, subtraction, and multiplication, but I did the bitwise ops too for overall consistency. Clang currently doesn't set NSW for signed vector operations so the undefined behavior shouldn't happen today. llvm-svn: 271778
2016-06-04 13:43:41 +08:00
return (__m256i)((__v8su)__a + (__v8su)__b);
Begin adding AVX2 intrinsics. Necessitated increasing the number of bits used to store builtinID when serializing identifier table. llvm-svn: 146855
2011-12-19 13:04:33 +08:00
}
[X86] Rename DEFAULT_FN_ATTR macro to __DEFAULT_FN_ATTR llvm-svn: 241065
2015-06-30 21:36:19 +08:00
static __inline__ __m256i __DEFAULT_FN_ATTRS
PR14964: intrinsic headers using non-reserved identifiers Several of the intrinsic headers were using plain non-reserved identifiers. C++11 17.6.4.3.2 [global.names] p1 reservers names containing a double begining with an underscore followed by an uppercase letter for any use. I think I got them all, but open to being corrected. For the most part I didn't bother updating function-like macro parameter names because I don't believe they're subject to any such collission - though some function-like macros already follow this convention (I didn't update them in part because the churn was more significant as several function-like macros use the double underscore prefixed version of the same name as a parameter in their implementation) llvm-svn: 172666
2013-01-17 07:08:36 +08:00
_mm256_add_epi64(__m256i __a, __m256i __b)
Begin adding AVX2 intrinsics. Necessitated increasing the number of bits used to store builtinID when serializing identifier table. llvm-svn: 146855
2011-12-19 13:04:33 +08:00
{
[X86] Use unsigned types for vector arithmetic in intrinsics to avoid undefined behavior for signed integer overflow. This is really only needed for addition, subtraction, and multiplication, but I did the bitwise ops too for overall consistency. Clang currently doesn't set NSW for signed vector operations so the undefined behavior shouldn't happen today. llvm-svn: 271778
2016-06-04 13:43:41 +08:00
return (__m256i)((__v4du)__a + (__v4du)__b);
Begin adding AVX2 intrinsics. Necessitated increasing the number of bits used to store builtinID when serializing identifier table. llvm-svn: 146855
2011-12-19 13:04:33 +08:00
}
[X86] Rename DEFAULT_FN_ATTR macro to __DEFAULT_FN_ATTR llvm-svn: 241065
2015-06-30 21:36:19 +08:00
static __inline__ __m256i __DEFAULT_FN_ATTRS
PR14964: intrinsic headers using non-reserved identifiers Several of the intrinsic headers were using plain non-reserved identifiers. C++11 17.6.4.3.2 [global.names] p1 reservers names containing a double begining with an underscore followed by an uppercase letter for any use. I think I got them all, but open to being corrected. For the most part I didn't bother updating function-like macro parameter names because I don't believe they're subject to any such collission - though some function-like macros already follow this convention (I didn't update them in part because the churn was more significant as several function-like macros use the double underscore prefixed version of the same name as a parameter in their implementation) llvm-svn: 172666
2013-01-17 07:08:36 +08:00
_mm256_adds_epi8(__m256i __a, __m256i __b)
More AVX2 intrinsic support including saturating add/sub and palignr. llvm-svn: 146857
2011-12-19 15:03:25 +08:00
{
PR14964: intrinsic headers using non-reserved identifiers Several of the intrinsic headers were using plain non-reserved identifiers. C++11 17.6.4.3.2 [global.names] p1 reservers names containing a double begining with an underscore followed by an uppercase letter for any use. I think I got them all, but open to being corrected. For the most part I didn't bother updating function-like macro parameter names because I don't believe they're subject to any such collission - though some function-like macros already follow this convention (I didn't update them in part because the churn was more significant as several function-like macros use the double underscore prefixed version of the same name as a parameter in their implementation) llvm-svn: 172666
2013-01-17 07:08:36 +08:00
return (__m256i)__builtin_ia32_paddsb256((__v32qi)__a, (__v32qi)__b);
More AVX2 intrinsic support including saturating add/sub and palignr. llvm-svn: 146857
2011-12-19 15:03:25 +08:00
}
[X86] Rename DEFAULT_FN_ATTR macro to __DEFAULT_FN_ATTR llvm-svn: 241065
2015-06-30 21:36:19 +08:00
static __inline__ __m256i __DEFAULT_FN_ATTRS
PR14964: intrinsic headers using non-reserved identifiers Several of the intrinsic headers were using plain non-reserved identifiers. C++11 17.6.4.3.2 [global.names] p1 reservers names containing a double begining with an underscore followed by an uppercase letter for any use. I think I got them all, but open to being corrected. For the most part I didn't bother updating function-like macro parameter names because I don't believe they're subject to any such collission - though some function-like macros already follow this convention (I didn't update them in part because the churn was more significant as several function-like macros use the double underscore prefixed version of the same name as a parameter in their implementation) llvm-svn: 172666
2013-01-17 07:08:36 +08:00
_mm256_adds_epi16(__m256i __a, __m256i __b)
More AVX2 intrinsic support including saturating add/sub and palignr. llvm-svn: 146857
2011-12-19 15:03:25 +08:00
{
PR14964: intrinsic headers using non-reserved identifiers Several of the intrinsic headers were using plain non-reserved identifiers. C++11 17.6.4.3.2 [global.names] p1 reservers names containing a double begining with an underscore followed by an uppercase letter for any use. I think I got them all, but open to being corrected. For the most part I didn't bother updating function-like macro parameter names because I don't believe they're subject to any such collission - though some function-like macros already follow this convention (I didn't update them in part because the churn was more significant as several function-like macros use the double underscore prefixed version of the same name as a parameter in their implementation) llvm-svn: 172666
2013-01-17 07:08:36 +08:00
return (__m256i)__builtin_ia32_paddsw256((__v16hi)__a, (__v16hi)__b);
More AVX2 intrinsic support including saturating add/sub and palignr. llvm-svn: 146857
2011-12-19 15:03:25 +08:00
}
[X86] Rename DEFAULT_FN_ATTR macro to __DEFAULT_FN_ATTR llvm-svn: 241065
2015-06-30 21:36:19 +08:00
static __inline__ __m256i __DEFAULT_FN_ATTRS
PR14964: intrinsic headers using non-reserved identifiers Several of the intrinsic headers were using plain non-reserved identifiers. C++11 17.6.4.3.2 [global.names] p1 reservers names containing a double begining with an underscore followed by an uppercase letter for any use. I think I got them all, but open to being corrected. For the most part I didn't bother updating function-like macro parameter names because I don't believe they're subject to any such collission - though some function-like macros already follow this convention (I didn't update them in part because the churn was more significant as several function-like macros use the double underscore prefixed version of the same name as a parameter in their implementation) llvm-svn: 172666
2013-01-17 07:08:36 +08:00
_mm256_adds_epu8(__m256i __a, __m256i __b)
More AVX2 intrinsic support including saturating add/sub and palignr. llvm-svn: 146857
2011-12-19 15:03:25 +08:00
{
PR14964: intrinsic headers using non-reserved identifiers Several of the intrinsic headers were using plain non-reserved identifiers. C++11 17.6.4.3.2 [global.names] p1 reservers names containing a double begining with an underscore followed by an uppercase letter for any use. I think I got them all, but open to being corrected. For the most part I didn't bother updating function-like macro parameter names because I don't believe they're subject to any such collission - though some function-like macros already follow this convention (I didn't update them in part because the churn was more significant as several function-like macros use the double underscore prefixed version of the same name as a parameter in their implementation) llvm-svn: 172666
2013-01-17 07:08:36 +08:00
return (__m256i)__builtin_ia32_paddusb256((__v32qi)__a, (__v32qi)__b);
More AVX2 intrinsic support including saturating add/sub and palignr. llvm-svn: 146857
2011-12-19 15:03:25 +08:00
}
[X86] Rename DEFAULT_FN_ATTR macro to __DEFAULT_FN_ATTR llvm-svn: 241065
2015-06-30 21:36:19 +08:00
static __inline__ __m256i __DEFAULT_FN_ATTRS
PR14964: intrinsic headers using non-reserved identifiers Several of the intrinsic headers were using plain non-reserved identifiers. C++11 17.6.4.3.2 [global.names] p1 reservers names containing a double begining with an underscore followed by an uppercase letter for any use. I think I got them all, but open to being corrected. For the most part I didn't bother updating function-like macro parameter names because I don't believe they're subject to any such collission - though some function-like macros already follow this convention (I didn't update them in part because the churn was more significant as several function-like macros use the double underscore prefixed version of the same name as a parameter in their implementation) llvm-svn: 172666
2013-01-17 07:08:36 +08:00
_mm256_adds_epu16(__m256i __a, __m256i __b)
More AVX2 intrinsic support including saturating add/sub and palignr. llvm-svn: 146857
2011-12-19 15:03:25 +08:00
{
PR14964: intrinsic headers using non-reserved identifiers Several of the intrinsic headers were using plain non-reserved identifiers. C++11 17.6.4.3.2 [global.names] p1 reservers names containing a double begining with an underscore followed by an uppercase letter for any use. I think I got them all, but open to being corrected. For the most part I didn't bother updating function-like macro parameter names because I don't believe they're subject to any such collission - though some function-like macros already follow this convention (I didn't update them in part because the churn was more significant as several function-like macros use the double underscore prefixed version of the same name as a parameter in their implementation) llvm-svn: 172666
2013-01-17 07:08:36 +08:00
return (__m256i)__builtin_ia32_paddusw256((__v16hi)__a, (__v16hi)__b);
More AVX2 intrinsic support including saturating add/sub and palignr. llvm-svn: 146857
2011-12-19 15:03:25 +08:00
}
[X86] Remove temporary variables from macros in x86 intrinsic headers. Prevents duplicate names appearing from multiple macro expansions. NFC llvm-svn: 252586
2015-11-10 13:08:05 +08:00
#define _mm256_alignr_epi8(a, b, n) __extension__ ({ \
(__m256i)__builtin_ia32_palignr256((__v32qi)(__m256i)(a), \
(__v32qi)(__m256i)(b), (n)); })
More AVX2 intrinsic support including saturating add/sub and palignr. llvm-svn: 146857
2011-12-19 15:03:25 +08:00
[X86] Rename DEFAULT_FN_ATTR macro to __DEFAULT_FN_ATTR llvm-svn: 241065
2015-06-30 21:36:19 +08:00
static __inline__ __m256i __DEFAULT_FN_ATTRS
PR14964: intrinsic headers using non-reserved identifiers Several of the intrinsic headers were using plain non-reserved identifiers. C++11 17.6.4.3.2 [global.names] p1 reservers names containing a double begining with an underscore followed by an uppercase letter for any use. I think I got them all, but open to being corrected. For the most part I didn't bother updating function-like macro parameter names because I don't believe they're subject to any such collission - though some function-like macros already follow this convention (I didn't update them in part because the churn was more significant as several function-like macros use the double underscore prefixed version of the same name as a parameter in their implementation) llvm-svn: 172666
2013-01-17 07:08:36 +08:00
_mm256_and_si256(__m256i __a, __m256i __b)
Add AVX2 intrinsics for and, andn, or, and xor. llvm-svn: 146862
2011-12-19 17:03:48 +08:00
{
[X86] Use unsigned types for vector arithmetic in intrinsics to avoid undefined behavior for signed integer overflow. This is really only needed for addition, subtraction, and multiplication, but I did the bitwise ops too for overall consistency. Clang currently doesn't set NSW for signed vector operations so the undefined behavior shouldn't happen today. llvm-svn: 271778
2016-06-04 13:43:41 +08:00
return (__m256i)((__v4du)__a & (__v4du)__b);
Add AVX2 intrinsics for and, andn, or, and xor. llvm-svn: 146862
2011-12-19 17:03:48 +08:00
}
[X86] Rename DEFAULT_FN_ATTR macro to __DEFAULT_FN_ATTR llvm-svn: 241065
2015-06-30 21:36:19 +08:00
static __inline__ __m256i __DEFAULT_FN_ATTRS
PR14964: intrinsic headers using non-reserved identifiers Several of the intrinsic headers were using plain non-reserved identifiers. C++11 17.6.4.3.2 [global.names] p1 reservers names containing a double begining with an underscore followed by an uppercase letter for any use. I think I got them all, but open to being corrected. For the most part I didn't bother updating function-like macro parameter names because I don't believe they're subject to any such collission - though some function-like macros already follow this convention (I didn't update them in part because the churn was more significant as several function-like macros use the double underscore prefixed version of the same name as a parameter in their implementation) llvm-svn: 172666
2013-01-17 07:08:36 +08:00
_mm256_andnot_si256(__m256i __a, __m256i __b)
Add AVX2 intrinsics for and, andn, or, and xor. llvm-svn: 146862
2011-12-19 17:03:48 +08:00
{
[X86] Use unsigned types for vector arithmetic in intrinsics to avoid undefined behavior for signed integer overflow. This is really only needed for addition, subtraction, and multiplication, but I did the bitwise ops too for overall consistency. Clang currently doesn't set NSW for signed vector operations so the undefined behavior shouldn't happen today. llvm-svn: 271778
2016-06-04 13:43:41 +08:00
return (__m256i)(~(__v4du)__a & (__v4du)__b);
Add AVX2 intrinsics for and, andn, or, and xor. llvm-svn: 146862
2011-12-19 17:03:48 +08:00
}
[X86] Rename DEFAULT_FN_ATTR macro to __DEFAULT_FN_ATTR llvm-svn: 241065
2015-06-30 21:36:19 +08:00
static __inline__ __m256i __DEFAULT_FN_ATTRS
PR14964: intrinsic headers using non-reserved identifiers Several of the intrinsic headers were using plain non-reserved identifiers. C++11 17.6.4.3.2 [global.names] p1 reservers names containing a double begining with an underscore followed by an uppercase letter for any use. I think I got them all, but open to being corrected. For the most part I didn't bother updating function-like macro parameter names because I don't believe they're subject to any such collission - though some function-like macros already follow this convention (I didn't update them in part because the churn was more significant as several function-like macros use the double underscore prefixed version of the same name as a parameter in their implementation) llvm-svn: 172666
2013-01-17 07:08:36 +08:00
_mm256_avg_epu8(__m256i __a, __m256i __b)
Add AVX2 intrinsics for pavg, pblend, and pcmp instructions. Also remove unneeded builtins for SSE pcmp. Change SSE pcmpeqq and pcmpgtq to not use builtins and just use vector == and >. llvm-svn: 146969
2011-12-20 17:55:26 +08:00
{
PR14964: intrinsic headers using non-reserved identifiers Several of the intrinsic headers were using plain non-reserved identifiers. C++11 17.6.4.3.2 [global.names] p1 reservers names containing a double begining with an underscore followed by an uppercase letter for any use. I think I got them all, but open to being corrected. For the most part I didn't bother updating function-like macro parameter names because I don't believe they're subject to any such collission - though some function-like macros already follow this convention (I didn't update them in part because the churn was more significant as several function-like macros use the double underscore prefixed version of the same name as a parameter in their implementation) llvm-svn: 172666
2013-01-17 07:08:36 +08:00
return (__m256i)__builtin_ia32_pavgb256((__v32qi)__a, (__v32qi)__b);
Add AVX2 intrinsics for pavg, pblend, and pcmp instructions. Also remove unneeded builtins for SSE pcmp. Change SSE pcmpeqq and pcmpgtq to not use builtins and just use vector == and >. llvm-svn: 146969
2011-12-20 17:55:26 +08:00
}
[X86] Rename DEFAULT_FN_ATTR macro to __DEFAULT_FN_ATTR llvm-svn: 241065
2015-06-30 21:36:19 +08:00
static __inline__ __m256i __DEFAULT_FN_ATTRS
PR14964: intrinsic headers using non-reserved identifiers Several of the intrinsic headers were using plain non-reserved identifiers. C++11 17.6.4.3.2 [global.names] p1 reservers names containing a double begining with an underscore followed by an uppercase letter for any use. I think I got them all, but open to being corrected. For the most part I didn't bother updating function-like macro parameter names because I don't believe they're subject to any such collission - though some function-like macros already follow this convention (I didn't update them in part because the churn was more significant as several function-like macros use the double underscore prefixed version of the same name as a parameter in their implementation) llvm-svn: 172666
2013-01-17 07:08:36 +08:00
_mm256_avg_epu16(__m256i __a, __m256i __b)
Add AVX2 intrinsics for pavg, pblend, and pcmp instructions. Also remove unneeded builtins for SSE pcmp. Change SSE pcmpeqq and pcmpgtq to not use builtins and just use vector == and >. llvm-svn: 146969
2011-12-20 17:55:26 +08:00
{
PR14964: intrinsic headers using non-reserved identifiers Several of the intrinsic headers were using plain non-reserved identifiers. C++11 17.6.4.3.2 [global.names] p1 reservers names containing a double begining with an underscore followed by an uppercase letter for any use. I think I got them all, but open to being corrected. For the most part I didn't bother updating function-like macro parameter names because I don't believe they're subject to any such collission - though some function-like macros already follow this convention (I didn't update them in part because the churn was more significant as several function-like macros use the double underscore prefixed version of the same name as a parameter in their implementation) llvm-svn: 172666
2013-01-17 07:08:36 +08:00
return (__m256i)__builtin_ia32_pavgw256((__v16hi)__a, (__v16hi)__b);
Add AVX2 intrinsics for pavg, pblend, and pcmp instructions. Also remove unneeded builtins for SSE pcmp. Change SSE pcmpeqq and pcmpgtq to not use builtins and just use vector == and >. llvm-svn: 146969
2011-12-20 17:55:26 +08:00
}
[X86] Rename DEFAULT_FN_ATTR macro to __DEFAULT_FN_ATTR llvm-svn: 241065
2015-06-30 21:36:19 +08:00
static __inline__ __m256i __DEFAULT_FN_ATTRS
Add AVX2 intrinsics for pavg, pblend, and pcmp instructions. Also remove unneeded builtins for SSE pcmp. Change SSE pcmpeqq and pcmpgtq to not use builtins and just use vector == and >. llvm-svn: 146969
2011-12-20 17:55:26 +08:00
_mm256_blendv_epi8(__m256i __V1, __m256i __V2, __m256i __M)
{
return (__m256i)__builtin_ia32_pblendvb256((__v32qi)__V1, (__v32qi)__V2,
(__v32qi)__M);
}
[X86] Remove temporary variables from macros in x86 intrinsic headers. Prevents duplicate names appearing from multiple macro expansions. NFC llvm-svn: 252586
2015-11-10 13:08:05 +08:00
#define _mm256_blend_epi16(V1, V2, M) __extension__ ({ \
(__m256i)__builtin_shufflevector((__v16hi)(__m256i)(V1), \
(__v16hi)(__m256i)(V2), \
(((M) & 0x01) ? 16 : 0), \
(((M) & 0x02) ? 17 : 1), \
(((M) & 0x04) ? 18 : 2), \
(((M) & 0x08) ? 19 : 3), \
(((M) & 0x10) ? 20 : 4), \
(((M) & 0x20) ? 21 : 5), \
(((M) & 0x40) ? 22 : 6), \
(((M) & 0x80) ? 23 : 7), \
(((M) & 0x01) ? 24 : 8), \
(((M) & 0x02) ? 25 : 9), \
Patched clang to emit x86 blends as shufflevectors. Summary: Most of the clang header patch by Simon Pilgrim @ SCEE. Also fixed (or added) clang tests for these intrinsics. LLVM tests to make sure we get the blend instruction out of these shufflevectors are at http://reviews.llvm.org/D3600 Reviewers: eli.friedman, craig.topper, rafael Subscribers: cfe-commits Differential Revision: http://reviews.llvm.org/D3601 llvm-svn: 208664
2014-05-13 10:37:02 +08:00
(((M) & 0x04) ? 26 : 10), \
(((M) & 0x08) ? 27 : 11), \
(((M) & 0x10) ? 28 : 12), \
(((M) & 0x20) ? 29 : 13), \
(((M) & 0x40) ? 30 : 14), \
(((M) & 0x80) ? 31 : 15)); })
Add AVX2 intrinsics for pavg, pblend, and pcmp instructions. Also remove unneeded builtins for SSE pcmp. Change SSE pcmpeqq and pcmpgtq to not use builtins and just use vector == and >. llvm-svn: 146969
2011-12-20 17:55:26 +08:00
[X86] Rename DEFAULT_FN_ATTR macro to __DEFAULT_FN_ATTR llvm-svn: 241065
2015-06-30 21:36:19 +08:00
static __inline__ __m256i __DEFAULT_FN_ATTRS
PR14964: intrinsic headers using non-reserved identifiers Several of the intrinsic headers were using plain non-reserved identifiers. C++11 17.6.4.3.2 [global.names] p1 reservers names containing a double begining with an underscore followed by an uppercase letter for any use. I think I got them all, but open to being corrected. For the most part I didn't bother updating function-like macro parameter names because I don't believe they're subject to any such collission - though some function-like macros already follow this convention (I didn't update them in part because the churn was more significant as several function-like macros use the double underscore prefixed version of the same name as a parameter in their implementation) llvm-svn: 172666
2013-01-17 07:08:36 +08:00
_mm256_cmpeq_epi8(__m256i __a, __m256i __b)
Add AVX2 intrinsics for pavg, pblend, and pcmp instructions. Also remove unneeded builtins for SSE pcmp. Change SSE pcmpeqq and pcmpgtq to not use builtins and just use vector == and >. llvm-svn: 146969
2011-12-20 17:55:26 +08:00
{
PR14964: intrinsic headers using non-reserved identifiers Several of the intrinsic headers were using plain non-reserved identifiers. C++11 17.6.4.3.2 [global.names] p1 reservers names containing a double begining with an underscore followed by an uppercase letter for any use. I think I got them all, but open to being corrected. For the most part I didn't bother updating function-like macro parameter names because I don't believe they're subject to any such collission - though some function-like macros already follow this convention (I didn't update them in part because the churn was more significant as several function-like macros use the double underscore prefixed version of the same name as a parameter in their implementation) llvm-svn: 172666
2013-01-17 07:08:36 +08:00
return (__m256i)((__v32qi)__a == (__v32qi)__b);
Add AVX2 intrinsics for pavg, pblend, and pcmp instructions. Also remove unneeded builtins for SSE pcmp. Change SSE pcmpeqq and pcmpgtq to not use builtins and just use vector == and >. llvm-svn: 146969
2011-12-20 17:55:26 +08:00
}
[X86] Rename DEFAULT_FN_ATTR macro to __DEFAULT_FN_ATTR llvm-svn: 241065
2015-06-30 21:36:19 +08:00
static __inline__ __m256i __DEFAULT_FN_ATTRS
PR14964: intrinsic headers using non-reserved identifiers Several of the intrinsic headers were using plain non-reserved identifiers. C++11 17.6.4.3.2 [global.names] p1 reservers names containing a double begining with an underscore followed by an uppercase letter for any use. I think I got them all, but open to being corrected. For the most part I didn't bother updating function-like macro parameter names because I don't believe they're subject to any such collission - though some function-like macros already follow this convention (I didn't update them in part because the churn was more significant as several function-like macros use the double underscore prefixed version of the same name as a parameter in their implementation) llvm-svn: 172666
2013-01-17 07:08:36 +08:00
_mm256_cmpeq_epi16(__m256i __a, __m256i __b)
Add AVX2 intrinsics for pavg, pblend, and pcmp instructions. Also remove unneeded builtins for SSE pcmp. Change SSE pcmpeqq and pcmpgtq to not use builtins and just use vector == and >. llvm-svn: 146969
2011-12-20 17:55:26 +08:00
{
PR14964: intrinsic headers using non-reserved identifiers Several of the intrinsic headers were using plain non-reserved identifiers. C++11 17.6.4.3.2 [global.names] p1 reservers names containing a double begining with an underscore followed by an uppercase letter for any use. I think I got them all, but open to being corrected. For the most part I didn't bother updating function-like macro parameter names because I don't believe they're subject to any such collission - though some function-like macros already follow this convention (I didn't update them in part because the churn was more significant as several function-like macros use the double underscore prefixed version of the same name as a parameter in their implementation) llvm-svn: 172666
2013-01-17 07:08:36 +08:00
return (__m256i)((__v16hi)__a == (__v16hi)__b);
Add AVX2 intrinsics for pavg, pblend, and pcmp instructions. Also remove unneeded builtins for SSE pcmp. Change SSE pcmpeqq and pcmpgtq to not use builtins and just use vector == and >. llvm-svn: 146969
2011-12-20 17:55:26 +08:00
}
[X86] Rename DEFAULT_FN_ATTR macro to __DEFAULT_FN_ATTR llvm-svn: 241065
2015-06-30 21:36:19 +08:00
static __inline__ __m256i __DEFAULT_FN_ATTRS
PR14964: intrinsic headers using non-reserved identifiers Several of the intrinsic headers were using plain non-reserved identifiers. C++11 17.6.4.3.2 [global.names] p1 reservers names containing a double begining with an underscore followed by an uppercase letter for any use. I think I got them all, but open to being corrected. For the most part I didn't bother updating function-like macro parameter names because I don't believe they're subject to any such collission - though some function-like macros already follow this convention (I didn't update them in part because the churn was more significant as several function-like macros use the double underscore prefixed version of the same name as a parameter in their implementation) llvm-svn: 172666
2013-01-17 07:08:36 +08:00
_mm256_cmpeq_epi32(__m256i __a, __m256i __b)
Add AVX2 intrinsics for pavg, pblend, and pcmp instructions. Also remove unneeded builtins for SSE pcmp. Change SSE pcmpeqq and pcmpgtq to not use builtins and just use vector == and >. llvm-svn: 146969
2011-12-20 17:55:26 +08:00
{
PR14964: intrinsic headers using non-reserved identifiers Several of the intrinsic headers were using plain non-reserved identifiers. C++11 17.6.4.3.2 [global.names] p1 reservers names containing a double begining with an underscore followed by an uppercase letter for any use. I think I got them all, but open to being corrected. For the most part I didn't bother updating function-like macro parameter names because I don't believe they're subject to any such collission - though some function-like macros already follow this convention (I didn't update them in part because the churn was more significant as several function-like macros use the double underscore prefixed version of the same name as a parameter in their implementation) llvm-svn: 172666
2013-01-17 07:08:36 +08:00
return (__m256i)((__v8si)__a == (__v8si)__b);
Add AVX2 intrinsics for pavg, pblend, and pcmp instructions. Also remove unneeded builtins for SSE pcmp. Change SSE pcmpeqq and pcmpgtq to not use builtins and just use vector == and >. llvm-svn: 146969
2011-12-20 17:55:26 +08:00
}
[X86] Rename DEFAULT_FN_ATTR macro to __DEFAULT_FN_ATTR llvm-svn: 241065
2015-06-30 21:36:19 +08:00
static __inline__ __m256i __DEFAULT_FN_ATTRS
PR14964: intrinsic headers using non-reserved identifiers Several of the intrinsic headers were using plain non-reserved identifiers. C++11 17.6.4.3.2 [global.names] p1 reservers names containing a double begining with an underscore followed by an uppercase letter for any use. I think I got them all, but open to being corrected. For the most part I didn't bother updating function-like macro parameter names because I don't believe they're subject to any such collission - though some function-like macros already follow this convention (I didn't update them in part because the churn was more significant as several function-like macros use the double underscore prefixed version of the same name as a parameter in their implementation) llvm-svn: 172666
2013-01-17 07:08:36 +08:00
_mm256_cmpeq_epi64(__m256i __a, __m256i __b)
Add AVX2 intrinsics for pavg, pblend, and pcmp instructions. Also remove unneeded builtins for SSE pcmp. Change SSE pcmpeqq and pcmpgtq to not use builtins and just use vector == and >. llvm-svn: 146969
2011-12-20 17:55:26 +08:00
{
[X86] Add typecasts to remove most assumptions about what __m128i/__m256i is defined as. Add similar typecasts for the fp types as well. llvm-svn: 269632
2016-05-16 14:38:42 +08:00
return (__m256i)((__v4di)__a == (__v4di)__b);
Add AVX2 intrinsics for pavg, pblend, and pcmp instructions. Also remove unneeded builtins for SSE pcmp. Change SSE pcmpeqq and pcmpgtq to not use builtins and just use vector == and >. llvm-svn: 146969
2011-12-20 17:55:26 +08:00
}
[X86] Rename DEFAULT_FN_ATTR macro to __DEFAULT_FN_ATTR llvm-svn: 241065
2015-06-30 21:36:19 +08:00
static __inline__ __m256i __DEFAULT_FN_ATTRS
PR14964: intrinsic headers using non-reserved identifiers Several of the intrinsic headers were using plain non-reserved identifiers. C++11 17.6.4.3.2 [global.names] p1 reservers names containing a double begining with an underscore followed by an uppercase letter for any use. I think I got them all, but open to being corrected. For the most part I didn't bother updating function-like macro parameter names because I don't believe they're subject to any such collission - though some function-like macros already follow this convention (I didn't update them in part because the churn was more significant as several function-like macros use the double underscore prefixed version of the same name as a parameter in their implementation) llvm-svn: 172666
2013-01-17 07:08:36 +08:00
_mm256_cmpgt_epi8(__m256i __a, __m256i __b)
Add AVX2 intrinsics for pavg, pblend, and pcmp instructions. Also remove unneeded builtins for SSE pcmp. Change SSE pcmpeqq and pcmpgtq to not use builtins and just use vector == and >. llvm-svn: 146969
2011-12-20 17:55:26 +08:00
{
Fix the SSE4 byte sign extension in a cleaner way, and more thoroughly test that our intrinsics behave the same under -fsigned-char and -funsigned-char. This further testing uncovered that AVX-2 has a broken cmpgt for 8-bit elements, and has for a long time. This is fixed in the same way as SSE4 handles the case. The other ISA extensions currently work correctly because they use specific instruction intrinsics. As soon as they are rewritten in terms of generic IR, they will need to add these special casts. I've added the necessary testing to catch this however, so we shouldn't have to chase it down again. I considered changing the core typedef to be signed, but that seems like a bad idea. Notably, it would be an ABI break if anyone is reaching into the innards of the intrinsic headers and passing __v16qi on an API boundary. I can't be completely confident that this wouldn't happen due to a macro expanding in a lambda, etc., so it seems much better to leave it alone. It also matches GCC's behavior exactly. A fun side note is that for both GCC and Clang, -funsigned-char really does change the semantics of __v16qi. To observe this, consider: % cat x.cc #include <smmintrin.h> #include <iostream> int main() { __v16qi a = { 1, -1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}; __v16qi b = _mm_set1_epi8(-1); std::cout << (int)(a / b)[0] << ", " << (int)(a / b)[1] << '\n'; } % clang++ -o x x.cc && ./x -1, 1 % clang++ -funsigned-char -o x x.cc && ./x 0, 1 However, while this may be surprising, both Clang and GCC agree. Differential Revision: http://reviews.llvm.org/D13324 llvm-svn: 249097
2015-10-02 07:40:12 +08:00
/* This function always performs a signed comparison, but __v32qi is a char
which may be signed or unsigned, so use __v32qs. */
return (__m256i)((__v32qs)__a > (__v32qs)__b);
Add AVX2 intrinsics for pavg, pblend, and pcmp instructions. Also remove unneeded builtins for SSE pcmp. Change SSE pcmpeqq and pcmpgtq to not use builtins and just use vector == and >. llvm-svn: 146969
2011-12-20 17:55:26 +08:00
}
[X86] Rename DEFAULT_FN_ATTR macro to __DEFAULT_FN_ATTR llvm-svn: 241065
2015-06-30 21:36:19 +08:00
static __inline__ __m256i __DEFAULT_FN_ATTRS
PR14964: intrinsic headers using non-reserved identifiers Several of the intrinsic headers were using plain non-reserved identifiers. C++11 17.6.4.3.2 [global.names] p1 reservers names containing a double begining with an underscore followed by an uppercase letter for any use. I think I got them all, but open to being corrected. For the most part I didn't bother updating function-like macro parameter names because I don't believe they're subject to any such collission - though some function-like macros already follow this convention (I didn't update them in part because the churn was more significant as several function-like macros use the double underscore prefixed version of the same name as a parameter in their implementation) llvm-svn: 172666
2013-01-17 07:08:36 +08:00
_mm256_cmpgt_epi16(__m256i __a, __m256i __b)
Add AVX2 intrinsics for pavg, pblend, and pcmp instructions. Also remove unneeded builtins for SSE pcmp. Change SSE pcmpeqq and pcmpgtq to not use builtins and just use vector == and >. llvm-svn: 146969
2011-12-20 17:55:26 +08:00
{
PR14964: intrinsic headers using non-reserved identifiers Several of the intrinsic headers were using plain non-reserved identifiers. C++11 17.6.4.3.2 [global.names] p1 reservers names containing a double begining with an underscore followed by an uppercase letter for any use. I think I got them all, but open to being corrected. For the most part I didn't bother updating function-like macro parameter names because I don't believe they're subject to any such collission - though some function-like macros already follow this convention (I didn't update them in part because the churn was more significant as several function-like macros use the double underscore prefixed version of the same name as a parameter in their implementation) llvm-svn: 172666
2013-01-17 07:08:36 +08:00
return (__m256i)((__v16hi)__a > (__v16hi)__b);
Add AVX2 intrinsics for pavg, pblend, and pcmp instructions. Also remove unneeded builtins for SSE pcmp. Change SSE pcmpeqq and pcmpgtq to not use builtins and just use vector == and >. llvm-svn: 146969
2011-12-20 17:55:26 +08:00
}
[X86] Rename DEFAULT_FN_ATTR macro to __DEFAULT_FN_ATTR llvm-svn: 241065
2015-06-30 21:36:19 +08:00
static __inline__ __m256i __DEFAULT_FN_ATTRS
PR14964: intrinsic headers using non-reserved identifiers Several of the intrinsic headers were using plain non-reserved identifiers. C++11 17.6.4.3.2 [global.names] p1 reservers names containing a double begining with an underscore followed by an uppercase letter for any use. I think I got them all, but open to being corrected. For the most part I didn't bother updating function-like macro parameter names because I don't believe they're subject to any such collission - though some function-like macros already follow this convention (I didn't update them in part because the churn was more significant as several function-like macros use the double underscore prefixed version of the same name as a parameter in their implementation) llvm-svn: 172666
2013-01-17 07:08:36 +08:00
_mm256_cmpgt_epi32(__m256i __a, __m256i __b)
Add AVX2 intrinsics for pavg, pblend, and pcmp instructions. Also remove unneeded builtins for SSE pcmp. Change SSE pcmpeqq and pcmpgtq to not use builtins and just use vector == and >. llvm-svn: 146969
2011-12-20 17:55:26 +08:00
{
PR14964: intrinsic headers using non-reserved identifiers Several of the intrinsic headers were using plain non-reserved identifiers. C++11 17.6.4.3.2 [global.names] p1 reservers names containing a double begining with an underscore followed by an uppercase letter for any use. I think I got them all, but open to being corrected. For the most part I didn't bother updating function-like macro parameter names because I don't believe they're subject to any such collission - though some function-like macros already follow this convention (I didn't update them in part because the churn was more significant as several function-like macros use the double underscore prefixed version of the same name as a parameter in their implementation) llvm-svn: 172666
2013-01-17 07:08:36 +08:00
return (__m256i)((__v8si)__a > (__v8si)__b);
Add AVX2 intrinsics for pavg, pblend, and pcmp instructions. Also remove unneeded builtins for SSE pcmp. Change SSE pcmpeqq and pcmpgtq to not use builtins and just use vector == and >. llvm-svn: 146969
2011-12-20 17:55:26 +08:00
}
[X86] Rename DEFAULT_FN_ATTR macro to __DEFAULT_FN_ATTR llvm-svn: 241065
2015-06-30 21:36:19 +08:00
static __inline__ __m256i __DEFAULT_FN_ATTRS
PR14964: intrinsic headers using non-reserved identifiers Several of the intrinsic headers were using plain non-reserved identifiers. C++11 17.6.4.3.2 [global.names] p1 reservers names containing a double begining with an underscore followed by an uppercase letter for any use. I think I got them all, but open to being corrected. For the most part I didn't bother updating function-like macro parameter names because I don't believe they're subject to any such collission - though some function-like macros already follow this convention (I didn't update them in part because the churn was more significant as several function-like macros use the double underscore prefixed version of the same name as a parameter in their implementation) llvm-svn: 172666
2013-01-17 07:08:36 +08:00
_mm256_cmpgt_epi64(__m256i __a, __m256i __b)
Add AVX2 intrinsics for pavg, pblend, and pcmp instructions. Also remove unneeded builtins for SSE pcmp. Change SSE pcmpeqq and pcmpgtq to not use builtins and just use vector == and >. llvm-svn: 146969
2011-12-20 17:55:26 +08:00
{
[X86] Add typecasts to remove most assumptions about what __m128i/__m256i is defined as. Add similar typecasts for the fp types as well. llvm-svn: 269632
2016-05-16 14:38:42 +08:00
return (__m256i)((__v4di)__a > (__v4di)__b);
Add AVX2 intrinsics for pavg, pblend, and pcmp instructions. Also remove unneeded builtins for SSE pcmp. Change SSE pcmpeqq and pcmpgtq to not use builtins and just use vector == and >. llvm-svn: 146969
2011-12-20 17:55:26 +08:00
}
[X86] Rename DEFAULT_FN_ATTR macro to __DEFAULT_FN_ATTR llvm-svn: 241065
2015-06-30 21:36:19 +08:00
static __inline__ __m256i __DEFAULT_FN_ATTRS
PR14964: intrinsic headers using non-reserved identifiers Several of the intrinsic headers were using plain non-reserved identifiers. C++11 17.6.4.3.2 [global.names] p1 reservers names containing a double begining with an underscore followed by an uppercase letter for any use. I think I got them all, but open to being corrected. For the most part I didn't bother updating function-like macro parameter names because I don't believe they're subject to any such collission - though some function-like macros already follow this convention (I didn't update them in part because the churn was more significant as several function-like macros use the double underscore prefixed version of the same name as a parameter in their implementation) llvm-svn: 172666
2013-01-17 07:08:36 +08:00
_mm256_hadd_epi16(__m256i __a, __m256i __b)
Add AVX2 horizontal add/sub intrinsics. llvm-svn: 147047
2011-12-21 16:17:40 +08:00
{
PR14964: intrinsic headers using non-reserved identifiers Several of the intrinsic headers were using plain non-reserved identifiers. C++11 17.6.4.3.2 [global.names] p1 reservers names containing a double begining with an underscore followed by an uppercase letter for any use. I think I got them all, but open to being corrected. For the most part I didn't bother updating function-like macro parameter names because I don't believe they're subject to any such collission - though some function-like macros already follow this convention (I didn't update them in part because the churn was more significant as several function-like macros use the double underscore prefixed version of the same name as a parameter in their implementation) llvm-svn: 172666
2013-01-17 07:08:36 +08:00
return (__m256i)__builtin_ia32_phaddw256((__v16hi)__a, (__v16hi)__b);
Add AVX2 horizontal add/sub intrinsics. llvm-svn: 147047
2011-12-21 16:17:40 +08:00
}
[X86] Rename DEFAULT_FN_ATTR macro to __DEFAULT_FN_ATTR llvm-svn: 241065
2015-06-30 21:36:19 +08:00
static __inline__ __m256i __DEFAULT_FN_ATTRS
PR14964: intrinsic headers using non-reserved identifiers Several of the intrinsic headers were using plain non-reserved identifiers. C++11 17.6.4.3.2 [global.names] p1 reservers names containing a double begining with an underscore followed by an uppercase letter for any use. I think I got them all, but open to being corrected. For the most part I didn't bother updating function-like macro parameter names because I don't believe they're subject to any such collission - though some function-like macros already follow this convention (I didn't update them in part because the churn was more significant as several function-like macros use the double underscore prefixed version of the same name as a parameter in their implementation) llvm-svn: 172666
2013-01-17 07:08:36 +08:00
_mm256_hadd_epi32(__m256i __a, __m256i __b)
Add AVX2 horizontal add/sub intrinsics. llvm-svn: 147047
2011-12-21 16:17:40 +08:00
{
PR14964: intrinsic headers using non-reserved identifiers Several of the intrinsic headers were using plain non-reserved identifiers. C++11 17.6.4.3.2 [global.names] p1 reservers names containing a double begining with an underscore followed by an uppercase letter for any use. I think I got them all, but open to being corrected. For the most part I didn't bother updating function-like macro parameter names because I don't believe they're subject to any such collission - though some function-like macros already follow this convention (I didn't update them in part because the churn was more significant as several function-like macros use the double underscore prefixed version of the same name as a parameter in their implementation) llvm-svn: 172666
2013-01-17 07:08:36 +08:00
return (__m256i)__builtin_ia32_phaddd256((__v8si)__a, (__v8si)__b);
Add AVX2 horizontal add/sub intrinsics. llvm-svn: 147047
2011-12-21 16:17:40 +08:00
}
[X86] Rename DEFAULT_FN_ATTR macro to __DEFAULT_FN_ATTR llvm-svn: 241065
2015-06-30 21:36:19 +08:00
static __inline__ __m256i __DEFAULT_FN_ATTRS
PR14964: intrinsic headers using non-reserved identifiers Several of the intrinsic headers were using plain non-reserved identifiers. C++11 17.6.4.3.2 [global.names] p1 reservers names containing a double begining with an underscore followed by an uppercase letter for any use. I think I got them all, but open to being corrected. For the most part I didn't bother updating function-like macro parameter names because I don't believe they're subject to any such collission - though some function-like macros already follow this convention (I didn't update them in part because the churn was more significant as several function-like macros use the double underscore prefixed version of the same name as a parameter in their implementation) llvm-svn: 172666
2013-01-17 07:08:36 +08:00
_mm256_hadds_epi16(__m256i __a, __m256i __b)
Add AVX2 horizontal add/sub intrinsics. llvm-svn: 147047
2011-12-21 16:17:40 +08:00
{
PR14964: intrinsic headers using non-reserved identifiers Several of the intrinsic headers were using plain non-reserved identifiers. C++11 17.6.4.3.2 [global.names] p1 reservers names containing a double begining with an underscore followed by an uppercase letter for any use. I think I got them all, but open to being corrected. For the most part I didn't bother updating function-like macro parameter names because I don't believe they're subject to any such collission - though some function-like macros already follow this convention (I didn't update them in part because the churn was more significant as several function-like macros use the double underscore prefixed version of the same name as a parameter in their implementation) llvm-svn: 172666
2013-01-17 07:08:36 +08:00
return (__m256i)__builtin_ia32_phaddsw256((__v16hi)__a, (__v16hi)__b);
Add AVX2 horizontal add/sub intrinsics. llvm-svn: 147047
2011-12-21 16:17:40 +08:00
}
[X86] Rename DEFAULT_FN_ATTR macro to __DEFAULT_FN_ATTR llvm-svn: 241065
2015-06-30 21:36:19 +08:00
static __inline__ __m256i __DEFAULT_FN_ATTRS
PR14964: intrinsic headers using non-reserved identifiers Several of the intrinsic headers were using plain non-reserved identifiers. C++11 17.6.4.3.2 [global.names] p1 reservers names containing a double begining with an underscore followed by an uppercase letter for any use. I think I got them all, but open to being corrected. For the most part I didn't bother updating function-like macro parameter names because I don't believe they're subject to any such collission - though some function-like macros already follow this convention (I didn't update them in part because the churn was more significant as several function-like macros use the double underscore prefixed version of the same name as a parameter in their implementation) llvm-svn: 172666
2013-01-17 07:08:36 +08:00
_mm256_hsub_epi16(__m256i __a, __m256i __b)
Add AVX2 horizontal add/sub intrinsics. llvm-svn: 147047
2011-12-21 16:17:40 +08:00
{
PR14964: intrinsic headers using non-reserved identifiers Several of the intrinsic headers were using plain non-reserved identifiers. C++11 17.6.4.3.2 [global.names] p1 reservers names containing a double begining with an underscore followed by an uppercase letter for any use. I think I got them all, but open to being corrected. For the most part I didn't bother updating function-like macro parameter names because I don't believe they're subject to any such collission - though some function-like macros already follow this convention (I didn't update them in part because the churn was more significant as several function-like macros use the double underscore prefixed version of the same name as a parameter in their implementation) llvm-svn: 172666
2013-01-17 07:08:36 +08:00
return (__m256i)__builtin_ia32_phsubw256((__v16hi)__a, (__v16hi)__b);
Add AVX2 horizontal add/sub intrinsics. llvm-svn: 147047
2011-12-21 16:17:40 +08:00
}
[X86] Rename DEFAULT_FN_ATTR macro to __DEFAULT_FN_ATTR llvm-svn: 241065
2015-06-30 21:36:19 +08:00
static __inline__ __m256i __DEFAULT_FN_ATTRS
PR14964: intrinsic headers using non-reserved identifiers Several of the intrinsic headers were using plain non-reserved identifiers. C++11 17.6.4.3.2 [global.names] p1 reservers names containing a double begining with an underscore followed by an uppercase letter for any use. I think I got them all, but open to being corrected. For the most part I didn't bother updating function-like macro parameter names because I don't believe they're subject to any such collission - though some function-like macros already follow this convention (I didn't update them in part because the churn was more significant as several function-like macros use the double underscore prefixed version of the same name as a parameter in their implementation) llvm-svn: 172666
2013-01-17 07:08:36 +08:00
_mm256_hsub_epi32(__m256i __a, __m256i __b)
Add AVX2 horizontal add/sub intrinsics. llvm-svn: 147047
2011-12-21 16:17:40 +08:00
{
PR14964: intrinsic headers using non-reserved identifiers Several of the intrinsic headers were using plain non-reserved identifiers. C++11 17.6.4.3.2 [global.names] p1 reservers names containing a double begining with an underscore followed by an uppercase letter for any use. I think I got them all, but open to being corrected. For the most part I didn't bother updating function-like macro parameter names because I don't believe they're subject to any such collission - though some function-like macros already follow this convention (I didn't update them in part because the churn was more significant as several function-like macros use the double underscore prefixed version of the same name as a parameter in their implementation) llvm-svn: 172666
2013-01-17 07:08:36 +08:00
return (__m256i)__builtin_ia32_phsubd256((__v8si)__a, (__v8si)__b);
Add AVX2 horizontal add/sub intrinsics. llvm-svn: 147047
2011-12-21 16:17:40 +08:00
}
[X86] Rename DEFAULT_FN_ATTR macro to __DEFAULT_FN_ATTR llvm-svn: 241065
2015-06-30 21:36:19 +08:00
static __inline__ __m256i __DEFAULT_FN_ATTRS
PR14964: intrinsic headers using non-reserved identifiers Several of the intrinsic headers were using plain non-reserved identifiers. C++11 17.6.4.3.2 [global.names] p1 reservers names containing a double begining with an underscore followed by an uppercase letter for any use. I think I got them all, but open to being corrected. For the most part I didn't bother updating function-like macro parameter names because I don't believe they're subject to any such collission - though some function-like macros already follow this convention (I didn't update them in part because the churn was more significant as several function-like macros use the double underscore prefixed version of the same name as a parameter in their implementation) llvm-svn: 172666
2013-01-17 07:08:36 +08:00
_mm256_hsubs_epi16(__m256i __a, __m256i __b)
Add AVX2 horizontal add/sub intrinsics. llvm-svn: 147047
2011-12-21 16:17:40 +08:00
{
PR14964: intrinsic headers using non-reserved identifiers Several of the intrinsic headers were using plain non-reserved identifiers. C++11 17.6.4.3.2 [global.names] p1 reservers names containing a double begining with an underscore followed by an uppercase letter for any use. I think I got them all, but open to being corrected. For the most part I didn't bother updating function-like macro parameter names because I don't believe they're subject to any such collission - though some function-like macros already follow this convention (I didn't update them in part because the churn was more significant as several function-like macros use the double underscore prefixed version of the same name as a parameter in their implementation) llvm-svn: 172666
2013-01-17 07:08:36 +08:00
return (__m256i)__builtin_ia32_phsubsw256((__v16hi)__a, (__v16hi)__b);
Add AVX2 horizontal add/sub intrinsics. llvm-svn: 147047
2011-12-21 16:17:40 +08:00
}
[X86] Rename DEFAULT_FN_ATTR macro to __DEFAULT_FN_ATTR llvm-svn: 241065
2015-06-30 21:36:19 +08:00
static __inline__ __m256i __DEFAULT_FN_ATTRS
PR14964: intrinsic headers using non-reserved identifiers Several of the intrinsic headers were using plain non-reserved identifiers. C++11 17.6.4.3.2 [global.names] p1 reservers names containing a double begining with an underscore followed by an uppercase letter for any use. I think I got them all, but open to being corrected. For the most part I didn't bother updating function-like macro parameter names because I don't believe they're subject to any such collission - though some function-like macros already follow this convention (I didn't update them in part because the churn was more significant as several function-like macros use the double underscore prefixed version of the same name as a parameter in their implementation) llvm-svn: 172666
2013-01-17 07:08:36 +08:00
_mm256_maddubs_epi16(__m256i __a, __m256i __b)
Add a few more AVX2 intrinsics and fix the type strings on a couple SSE intrinsics. llvm-svn: 147048
2011-12-21 16:35:05 +08:00
{
PR14964: intrinsic headers using non-reserved identifiers Several of the intrinsic headers were using plain non-reserved identifiers. C++11 17.6.4.3.2 [global.names] p1 reservers names containing a double begining with an underscore followed by an uppercase letter for any use. I think I got them all, but open to being corrected. For the most part I didn't bother updating function-like macro parameter names because I don't believe they're subject to any such collission - though some function-like macros already follow this convention (I didn't update them in part because the churn was more significant as several function-like macros use the double underscore prefixed version of the same name as a parameter in their implementation) llvm-svn: 172666
2013-01-17 07:08:36 +08:00
return (__m256i)__builtin_ia32_pmaddubsw256((__v32qi)__a, (__v32qi)__b);
Add a few more AVX2 intrinsics and fix the type strings on a couple SSE intrinsics. llvm-svn: 147048
2011-12-21 16:35:05 +08:00
}
[X86] Rename DEFAULT_FN_ATTR macro to __DEFAULT_FN_ATTR llvm-svn: 241065
2015-06-30 21:36:19 +08:00
static __inline__ __m256i __DEFAULT_FN_ATTRS
PR14964: intrinsic headers using non-reserved identifiers Several of the intrinsic headers were using plain non-reserved identifiers. C++11 17.6.4.3.2 [global.names] p1 reservers names containing a double begining with an underscore followed by an uppercase letter for any use. I think I got them all, but open to being corrected. For the most part I didn't bother updating function-like macro parameter names because I don't believe they're subject to any such collission - though some function-like macros already follow this convention (I didn't update them in part because the churn was more significant as several function-like macros use the double underscore prefixed version of the same name as a parameter in their implementation) llvm-svn: 172666
2013-01-17 07:08:36 +08:00
_mm256_madd_epi16(__m256i __a, __m256i __b)
Add a few more AVX2 intrinsics and fix the type strings on a couple SSE intrinsics. llvm-svn: 147048
2011-12-21 16:35:05 +08:00
{
PR14964: intrinsic headers using non-reserved identifiers Several of the intrinsic headers were using plain non-reserved identifiers. C++11 17.6.4.3.2 [global.names] p1 reservers names containing a double begining with an underscore followed by an uppercase letter for any use. I think I got them all, but open to being corrected. For the most part I didn't bother updating function-like macro parameter names because I don't believe they're subject to any such collission - though some function-like macros already follow this convention (I didn't update them in part because the churn was more significant as several function-like macros use the double underscore prefixed version of the same name as a parameter in their implementation) llvm-svn: 172666
2013-01-17 07:08:36 +08:00
return (__m256i)__builtin_ia32_pmaddwd256((__v16hi)__a, (__v16hi)__b);
Add a few more AVX2 intrinsics and fix the type strings on a couple SSE intrinsics. llvm-svn: 147048
2011-12-21 16:35:05 +08:00
}
[X86] Rename DEFAULT_FN_ATTR macro to __DEFAULT_FN_ATTR llvm-svn: 241065
2015-06-30 21:36:19 +08:00
static __inline__ __m256i __DEFAULT_FN_ATTRS
PR14964: intrinsic headers using non-reserved identifiers Several of the intrinsic headers were using plain non-reserved identifiers. C++11 17.6.4.3.2 [global.names] p1 reservers names containing a double begining with an underscore followed by an uppercase letter for any use. I think I got them all, but open to being corrected. For the most part I didn't bother updating function-like macro parameter names because I don't believe they're subject to any such collission - though some function-like macros already follow this convention (I didn't update them in part because the churn was more significant as several function-like macros use the double underscore prefixed version of the same name as a parameter in their implementation) llvm-svn: 172666
2013-01-17 07:08:36 +08:00
_mm256_max_epi8(__m256i __a, __m256i __b)
Add AVX2 intrinsics for max, min, sign extend, and zero extend. llvm-svn: 147141
2011-12-22 17:18:58 +08:00
{
PR14964: intrinsic headers using non-reserved identifiers Several of the intrinsic headers were using plain non-reserved identifiers. C++11 17.6.4.3.2 [global.names] p1 reservers names containing a double begining with an underscore followed by an uppercase letter for any use. I think I got them all, but open to being corrected. For the most part I didn't bother updating function-like macro parameter names because I don't believe they're subject to any such collission - though some function-like macros already follow this convention (I didn't update them in part because the churn was more significant as several function-like macros use the double underscore prefixed version of the same name as a parameter in their implementation) llvm-svn: 172666
2013-01-17 07:08:36 +08:00
return (__m256i)__builtin_ia32_pmaxsb256((__v32qi)__a, (__v32qi)__b);
Add AVX2 intrinsics for max, min, sign extend, and zero extend. llvm-svn: 147141
2011-12-22 17:18:58 +08:00
}
[X86] Rename DEFAULT_FN_ATTR macro to __DEFAULT_FN_ATTR llvm-svn: 241065
2015-06-30 21:36:19 +08:00
static __inline__ __m256i __DEFAULT_FN_ATTRS
PR14964: intrinsic headers using non-reserved identifiers Several of the intrinsic headers were using plain non-reserved identifiers. C++11 17.6.4.3.2 [global.names] p1 reservers names containing a double begining with an underscore followed by an uppercase letter for any use. I think I got them all, but open to being corrected. For the most part I didn't bother updating function-like macro parameter names because I don't believe they're subject to any such collission - though some function-like macros already follow this convention (I didn't update them in part because the churn was more significant as several function-like macros use the double underscore prefixed version of the same name as a parameter in their implementation) llvm-svn: 172666
2013-01-17 07:08:36 +08:00
_mm256_max_epi16(__m256i __a, __m256i __b)
Add AVX2 intrinsics for max, min, sign extend, and zero extend. llvm-svn: 147141
2011-12-22 17:18:58 +08:00
{
PR14964: intrinsic headers using non-reserved identifiers Several of the intrinsic headers were using plain non-reserved identifiers. C++11 17.6.4.3.2 [global.names] p1 reservers names containing a double begining with an underscore followed by an uppercase letter for any use. I think I got them all, but open to being corrected. For the most part I didn't bother updating function-like macro parameter names because I don't believe they're subject to any such collission - though some function-like macros already follow this convention (I didn't update them in part because the churn was more significant as several function-like macros use the double underscore prefixed version of the same name as a parameter in their implementation) llvm-svn: 172666
2013-01-17 07:08:36 +08:00
return (__m256i)__builtin_ia32_pmaxsw256((__v16hi)__a, (__v16hi)__b);
Add AVX2 intrinsics for max, min, sign extend, and zero extend. llvm-svn: 147141
2011-12-22 17:18:58 +08:00
}
[X86] Rename DEFAULT_FN_ATTR macro to __DEFAULT_FN_ATTR llvm-svn: 241065
2015-06-30 21:36:19 +08:00
static __inline__ __m256i __DEFAULT_FN_ATTRS
PR14964: intrinsic headers using non-reserved identifiers Several of the intrinsic headers were using plain non-reserved identifiers. C++11 17.6.4.3.2 [global.names] p1 reservers names containing a double begining with an underscore followed by an uppercase letter for any use. I think I got them all, but open to being corrected. For the most part I didn't bother updating function-like macro parameter names because I don't believe they're subject to any such collission - though some function-like macros already follow this convention (I didn't update them in part because the churn was more significant as several function-like macros use the double underscore prefixed version of the same name as a parameter in their implementation) llvm-svn: 172666
2013-01-17 07:08:36 +08:00
_mm256_max_epi32(__m256i __a, __m256i __b)
Add AVX2 intrinsics for max, min, sign extend, and zero extend. llvm-svn: 147141
2011-12-22 17:18:58 +08:00
{
PR14964: intrinsic headers using non-reserved identifiers Several of the intrinsic headers were using plain non-reserved identifiers. C++11 17.6.4.3.2 [global.names] p1 reservers names containing a double begining with an underscore followed by an uppercase letter for any use. I think I got them all, but open to being corrected. For the most part I didn't bother updating function-like macro parameter names because I don't believe they're subject to any such collission - though some function-like macros already follow this convention (I didn't update them in part because the churn was more significant as several function-like macros use the double underscore prefixed version of the same name as a parameter in their implementation) llvm-svn: 172666
2013-01-17 07:08:36 +08:00
return (__m256i)__builtin_ia32_pmaxsd256((__v8si)__a, (__v8si)__b);
Add AVX2 intrinsics for max, min, sign extend, and zero extend. llvm-svn: 147141
2011-12-22 17:18:58 +08:00
}
[X86] Rename DEFAULT_FN_ATTR macro to __DEFAULT_FN_ATTR llvm-svn: 241065
2015-06-30 21:36:19 +08:00
static __inline__ __m256i __DEFAULT_FN_ATTRS
PR14964: intrinsic headers using non-reserved identifiers Several of the intrinsic headers were using plain non-reserved identifiers. C++11 17.6.4.3.2 [global.names] p1 reservers names containing a double begining with an underscore followed by an uppercase letter for any use. I think I got them all, but open to being corrected. For the most part I didn't bother updating function-like macro parameter names because I don't believe they're subject to any such collission - though some function-like macros already follow this convention (I didn't update them in part because the churn was more significant as several function-like macros use the double underscore prefixed version of the same name as a parameter in their implementation) llvm-svn: 172666
2013-01-17 07:08:36 +08:00
_mm256_max_epu8(__m256i __a, __m256i __b)
Add AVX2 intrinsics for max, min, sign extend, and zero extend. llvm-svn: 147141
2011-12-22 17:18:58 +08:00
{
PR14964: intrinsic headers using non-reserved identifiers Several of the intrinsic headers were using plain non-reserved identifiers. C++11 17.6.4.3.2 [global.names] p1 reservers names containing a double begining with an underscore followed by an uppercase letter for any use. I think I got them all, but open to being corrected. For the most part I didn't bother updating function-like macro parameter names because I don't believe they're subject to any such collission - though some function-like macros already follow this convention (I didn't update them in part because the churn was more significant as several function-like macros use the double underscore prefixed version of the same name as a parameter in their implementation) llvm-svn: 172666
2013-01-17 07:08:36 +08:00
return (__m256i)__builtin_ia32_pmaxub256((__v32qi)__a, (__v32qi)__b);
Add AVX2 intrinsics for max, min, sign extend, and zero extend. llvm-svn: 147141
2011-12-22 17:18:58 +08:00
}
[X86] Rename DEFAULT_FN_ATTR macro to __DEFAULT_FN_ATTR llvm-svn: 241065
2015-06-30 21:36:19 +08:00
static __inline__ __m256i __DEFAULT_FN_ATTRS
PR14964: intrinsic headers using non-reserved identifiers Several of the intrinsic headers were using plain non-reserved identifiers. C++11 17.6.4.3.2 [global.names] p1 reservers names containing a double begining with an underscore followed by an uppercase letter for any use. I think I got them all, but open to being corrected. For the most part I didn't bother updating function-like macro parameter names because I don't believe they're subject to any such collission - though some function-like macros already follow this convention (I didn't update them in part because the churn was more significant as several function-like macros use the double underscore prefixed version of the same name as a parameter in their implementation) llvm-svn: 172666
2013-01-17 07:08:36 +08:00
_mm256_max_epu16(__m256i __a, __m256i __b)
Add AVX2 intrinsics for max, min, sign extend, and zero extend. llvm-svn: 147141
2011-12-22 17:18:58 +08:00
{
PR14964: intrinsic headers using non-reserved identifiers Several of the intrinsic headers were using plain non-reserved identifiers. C++11 17.6.4.3.2 [global.names] p1 reservers names containing a double begining with an underscore followed by an uppercase letter for any use. I think I got them all, but open to being corrected. For the most part I didn't bother updating function-like macro parameter names because I don't believe they're subject to any such collission - though some function-like macros already follow this convention (I didn't update them in part because the churn was more significant as several function-like macros use the double underscore prefixed version of the same name as a parameter in their implementation) llvm-svn: 172666
2013-01-17 07:08:36 +08:00
return (__m256i)__builtin_ia32_pmaxuw256((__v16hi)__a, (__v16hi)__b);
Add AVX2 intrinsics for max, min, sign extend, and zero extend. llvm-svn: 147141
2011-12-22 17:18:58 +08:00
}
[X86] Rename DEFAULT_FN_ATTR macro to __DEFAULT_FN_ATTR llvm-svn: 241065
2015-06-30 21:36:19 +08:00
static __inline__ __m256i __DEFAULT_FN_ATTRS
PR14964: intrinsic headers using non-reserved identifiers Several of the intrinsic headers were using plain non-reserved identifiers. C++11 17.6.4.3.2 [global.names] p1 reservers names containing a double begining with an underscore followed by an uppercase letter for any use. I think I got them all, but open to being corrected. For the most part I didn't bother updating function-like macro parameter names because I don't believe they're subject to any such collission - though some function-like macros already follow this convention (I didn't update them in part because the churn was more significant as several function-like macros use the double underscore prefixed version of the same name as a parameter in their implementation) llvm-svn: 172666
2013-01-17 07:08:36 +08:00
_mm256_max_epu32(__m256i __a, __m256i __b)
Add AVX2 intrinsics for max, min, sign extend, and zero extend. llvm-svn: 147141
2011-12-22 17:18:58 +08:00
{
PR14964: intrinsic headers using non-reserved identifiers Several of the intrinsic headers were using plain non-reserved identifiers. C++11 17.6.4.3.2 [global.names] p1 reservers names containing a double begining with an underscore followed by an uppercase letter for any use. I think I got them all, but open to being corrected. For the most part I didn't bother updating function-like macro parameter names because I don't believe they're subject to any such collission - though some function-like macros already follow this convention (I didn't update them in part because the churn was more significant as several function-like macros use the double underscore prefixed version of the same name as a parameter in their implementation) llvm-svn: 172666
2013-01-17 07:08:36 +08:00
return (__m256i)__builtin_ia32_pmaxud256((__v8si)__a, (__v8si)__b);
Add AVX2 intrinsics for max, min, sign extend, and zero extend. llvm-svn: 147141
2011-12-22 17:18:58 +08:00
}
[X86] Rename DEFAULT_FN_ATTR macro to __DEFAULT_FN_ATTR llvm-svn: 241065
2015-06-30 21:36:19 +08:00
static __inline__ __m256i __DEFAULT_FN_ATTRS
PR14964: intrinsic headers using non-reserved identifiers Several of the intrinsic headers were using plain non-reserved identifiers. C++11 17.6.4.3.2 [global.names] p1 reservers names containing a double begining with an underscore followed by an uppercase letter for any use. I think I got them all, but open to being corrected. For the most part I didn't bother updating function-like macro parameter names because I don't believe they're subject to any such collission - though some function-like macros already follow this convention (I didn't update them in part because the churn was more significant as several function-like macros use the double underscore prefixed version of the same name as a parameter in their implementation) llvm-svn: 172666
2013-01-17 07:08:36 +08:00
_mm256_min_epi8(__m256i __a, __m256i __b)
Add AVX2 intrinsics for max, min, sign extend, and zero extend. llvm-svn: 147141
2011-12-22 17:18:58 +08:00
{
PR14964: intrinsic headers using non-reserved identifiers Several of the intrinsic headers were using plain non-reserved identifiers. C++11 17.6.4.3.2 [global.names] p1 reservers names containing a double begining with an underscore followed by an uppercase letter for any use. I think I got them all, but open to being corrected. For the most part I didn't bother updating function-like macro parameter names because I don't believe they're subject to any such collission - though some function-like macros already follow this convention (I didn't update them in part because the churn was more significant as several function-like macros use the double underscore prefixed version of the same name as a parameter in their implementation) llvm-svn: 172666
2013-01-17 07:08:36 +08:00
return (__m256i)__builtin_ia32_pminsb256((__v32qi)__a, (__v32qi)__b);
Add AVX2 intrinsics for max, min, sign extend, and zero extend. llvm-svn: 147141
2011-12-22 17:18:58 +08:00
}
[X86] Rename DEFAULT_FN_ATTR macro to __DEFAULT_FN_ATTR llvm-svn: 241065
2015-06-30 21:36:19 +08:00
static __inline__ __m256i __DEFAULT_FN_ATTRS
PR14964: intrinsic headers using non-reserved identifiers Several of the intrinsic headers were using plain non-reserved identifiers. C++11 17.6.4.3.2 [global.names] p1 reservers names containing a double begining with an underscore followed by an uppercase letter for any use. I think I got them all, but open to being corrected. For the most part I didn't bother updating function-like macro parameter names because I don't believe they're subject to any such collission - though some function-like macros already follow this convention (I didn't update them in part because the churn was more significant as several function-like macros use the double underscore prefixed version of the same name as a parameter in their implementation) llvm-svn: 172666
2013-01-17 07:08:36 +08:00
_mm256_min_epi16(__m256i __a, __m256i __b)
Add AVX2 intrinsics for max, min, sign extend, and zero extend. llvm-svn: 147141
2011-12-22 17:18:58 +08:00
{
PR14964: intrinsic headers using non-reserved identifiers Several of the intrinsic headers were using plain non-reserved identifiers. C++11 17.6.4.3.2 [global.names] p1 reservers names containing a double begining with an underscore followed by an uppercase letter for any use. I think I got them all, but open to being corrected. For the most part I didn't bother updating function-like macro parameter names because I don't believe they're subject to any such collission - though some function-like macros already follow this convention (I didn't update them in part because the churn was more significant as several function-like macros use the double underscore prefixed version of the same name as a parameter in their implementation) llvm-svn: 172666
2013-01-17 07:08:36 +08:00
return (__m256i)__builtin_ia32_pminsw256((__v16hi)__a, (__v16hi)__b);
Add AVX2 intrinsics for max, min, sign extend, and zero extend. llvm-svn: 147141
2011-12-22 17:18:58 +08:00
}
[X86] Rename DEFAULT_FN_ATTR macro to __DEFAULT_FN_ATTR llvm-svn: 241065
2015-06-30 21:36:19 +08:00
static __inline__ __m256i __DEFAULT_FN_ATTRS
PR14964: intrinsic headers using non-reserved identifiers Several of the intrinsic headers were using plain non-reserved identifiers. C++11 17.6.4.3.2 [global.names] p1 reservers names containing a double begining with an underscore followed by an uppercase letter for any use. I think I got them all, but open to being corrected. For the most part I didn't bother updating function-like macro parameter names because I don't believe they're subject to any such collission - though some function-like macros already follow this convention (I didn't update them in part because the churn was more significant as several function-like macros use the double underscore prefixed version of the same name as a parameter in their implementation) llvm-svn: 172666
2013-01-17 07:08:36 +08:00
_mm256_min_epi32(__m256i __a, __m256i __b)
Add AVX2 intrinsics for max, min, sign extend, and zero extend. llvm-svn: 147141
2011-12-22 17:18:58 +08:00
{
PR14964: intrinsic headers using non-reserved identifiers Several of the intrinsic headers were using plain non-reserved identifiers. C++11 17.6.4.3.2 [global.names] p1 reservers names containing a double begining with an underscore followed by an uppercase letter for any use. I think I got them all, but open to being corrected. For the most part I didn't bother updating function-like macro parameter names because I don't believe they're subject to any such collission - though some function-like macros already follow this convention (I didn't update them in part because the churn was more significant as several function-like macros use the double underscore prefixed version of the same name as a parameter in their implementation) llvm-svn: 172666
2013-01-17 07:08:36 +08:00
return (__m256i)__builtin_ia32_pminsd256((__v8si)__a, (__v8si)__b);
Add AVX2 intrinsics for max, min, sign extend, and zero extend. llvm-svn: 147141
2011-12-22 17:18:58 +08:00
}
[X86] Rename DEFAULT_FN_ATTR macro to __DEFAULT_FN_ATTR llvm-svn: 241065
2015-06-30 21:36:19 +08:00
static __inline__ __m256i __DEFAULT_FN_ATTRS
PR14964: intrinsic headers using non-reserved identifiers Several of the intrinsic headers were using plain non-reserved identifiers. C++11 17.6.4.3.2 [global.names] p1 reservers names containing a double begining with an underscore followed by an uppercase letter for any use. I think I got them all, but open to being corrected. For the most part I didn't bother updating function-like macro parameter names because I don't believe they're subject to any such collission - though some function-like macros already follow this convention (I didn't update them in part because the churn was more significant as several function-like macros use the double underscore prefixed version of the same name as a parameter in their implementation) llvm-svn: 172666
2013-01-17 07:08:36 +08:00
_mm256_min_epu8(__m256i __a, __m256i __b)
Add AVX2 intrinsics for max, min, sign extend, and zero extend. llvm-svn: 147141
2011-12-22 17:18:58 +08:00
{
PR14964: intrinsic headers using non-reserved identifiers Several of the intrinsic headers were using plain non-reserved identifiers. C++11 17.6.4.3.2 [global.names] p1 reservers names containing a double begining with an underscore followed by an uppercase letter for any use. I think I got them all, but open to being corrected. For the most part I didn't bother updating function-like macro parameter names because I don't believe they're subject to any such collission - though some function-like macros already follow this convention (I didn't update them in part because the churn was more significant as several function-like macros use the double underscore prefixed version of the same name as a parameter in their implementation) llvm-svn: 172666
2013-01-17 07:08:36 +08:00
return (__m256i)__builtin_ia32_pminub256((__v32qi)__a, (__v32qi)__b);
Add AVX2 intrinsics for max, min, sign extend, and zero extend. llvm-svn: 147141
2011-12-22 17:18:58 +08:00
}
[X86] Rename DEFAULT_FN_ATTR macro to __DEFAULT_FN_ATTR llvm-svn: 241065
2015-06-30 21:36:19 +08:00
static __inline__ __m256i __DEFAULT_FN_ATTRS
PR14964: intrinsic headers using non-reserved identifiers Several of the intrinsic headers were using plain non-reserved identifiers. C++11 17.6.4.3.2 [global.names] p1 reservers names containing a double begining with an underscore followed by an uppercase letter for any use. I think I got them all, but open to being corrected. For the most part I didn't bother updating function-like macro parameter names because I don't believe they're subject to any such collission - though some function-like macros already follow this convention (I didn't update them in part because the churn was more significant as several function-like macros use the double underscore prefixed version of the same name as a parameter in their implementation) llvm-svn: 172666
2013-01-17 07:08:36 +08:00
_mm256_min_epu16(__m256i __a, __m256i __b)
Add AVX2 intrinsics for max, min, sign extend, and zero extend. llvm-svn: 147141
2011-12-22 17:18:58 +08:00
{
PR14964: intrinsic headers using non-reserved identifiers Several of the intrinsic headers were using plain non-reserved identifiers. C++11 17.6.4.3.2 [global.names] p1 reservers names containing a double begining with an underscore followed by an uppercase letter for any use. I think I got them all, but open to being corrected. For the most part I didn't bother updating function-like macro parameter names because I don't believe they're subject to any such collission - though some function-like macros already follow this convention (I didn't update them in part because the churn was more significant as several function-like macros use the double underscore prefixed version of the same name as a parameter in their implementation) llvm-svn: 172666
2013-01-17 07:08:36 +08:00
return (__m256i)__builtin_ia32_pminuw256 ((__v16hi)__a, (__v16hi)__b);
Add AVX2 intrinsics for max, min, sign extend, and zero extend. llvm-svn: 147141
2011-12-22 17:18:58 +08:00
}
[X86] Rename DEFAULT_FN_ATTR macro to __DEFAULT_FN_ATTR llvm-svn: 241065
2015-06-30 21:36:19 +08:00
static __inline__ __m256i __DEFAULT_FN_ATTRS
PR14964: intrinsic headers using non-reserved identifiers Several of the intrinsic headers were using plain non-reserved identifiers. C++11 17.6.4.3.2 [global.names] p1 reservers names containing a double begining with an underscore followed by an uppercase letter for any use. I think I got them all, but open to being corrected. For the most part I didn't bother updating function-like macro parameter names because I don't believe they're subject to any such collission - though some function-like macros already follow this convention (I didn't update them in part because the churn was more significant as several function-like macros use the double underscore prefixed version of the same name as a parameter in their implementation) llvm-svn: 172666
2013-01-17 07:08:36 +08:00
_mm256_min_epu32(__m256i __a, __m256i __b)
Add AVX2 intrinsics for max, min, sign extend, and zero extend. llvm-svn: 147141
2011-12-22 17:18:58 +08:00
{
PR14964: intrinsic headers using non-reserved identifiers Several of the intrinsic headers were using plain non-reserved identifiers. C++11 17.6.4.3.2 [global.names] p1 reservers names containing a double begining with an underscore followed by an uppercase letter for any use. I think I got them all, but open to being corrected. For the most part I didn't bother updating function-like macro parameter names because I don't believe they're subject to any such collission - though some function-like macros already follow this convention (I didn't update them in part because the churn was more significant as several function-like macros use the double underscore prefixed version of the same name as a parameter in their implementation) llvm-svn: 172666
2013-01-17 07:08:36 +08:00
return (__m256i)__builtin_ia32_pminud256((__v8si)__a, (__v8si)__b);
Add AVX2 intrinsics for max, min, sign extend, and zero extend. llvm-svn: 147141
2011-12-22 17:18:58 +08:00
}
[X86] Rename DEFAULT_FN_ATTR macro to __DEFAULT_FN_ATTR llvm-svn: 241065
2015-06-30 21:36:19 +08:00
static __inline__ int __DEFAULT_FN_ATTRS
PR14964: intrinsic headers using non-reserved identifiers Several of the intrinsic headers were using plain non-reserved identifiers. C++11 17.6.4.3.2 [global.names] p1 reservers names containing a double begining with an underscore followed by an uppercase letter for any use. I think I got them all, but open to being corrected. For the most part I didn't bother updating function-like macro parameter names because I don't believe they're subject to any such collission - though some function-like macros already follow this convention (I didn't update them in part because the churn was more significant as several function-like macros use the double underscore prefixed version of the same name as a parameter in their implementation) llvm-svn: 172666
2013-01-17 07:08:36 +08:00
_mm256_movemask_epi8(__m256i __a)
Add AVX2 intrinsics for max, min, sign extend, and zero extend. llvm-svn: 147141
2011-12-22 17:18:58 +08:00
{
PR14964: intrinsic headers using non-reserved identifiers Several of the intrinsic headers were using plain non-reserved identifiers. C++11 17.6.4.3.2 [global.names] p1 reservers names containing a double begining with an underscore followed by an uppercase letter for any use. I think I got them all, but open to being corrected. For the most part I didn't bother updating function-like macro parameter names because I don't believe they're subject to any such collission - though some function-like macros already follow this convention (I didn't update them in part because the churn was more significant as several function-like macros use the double underscore prefixed version of the same name as a parameter in their implementation) llvm-svn: 172666
2013-01-17 07:08:36 +08:00
return __builtin_ia32_pmovmskb256((__v32qi)__a);
Add AVX2 intrinsics for max, min, sign extend, and zero extend. llvm-svn: 147141
2011-12-22 17:18:58 +08:00
}
[X86] Rename DEFAULT_FN_ATTR macro to __DEFAULT_FN_ATTR llvm-svn: 241065
2015-06-30 21:36:19 +08:00
static __inline__ __m256i __DEFAULT_FN_ATTRS
Add AVX2 intrinsics for max, min, sign extend, and zero extend. llvm-svn: 147141
2011-12-22 17:18:58 +08:00
_mm256_cvtepi8_epi16(__m128i __V)
{
[X86][SSE] Replace VPMOVSX and (V)PMOVZX integer extension intrinsics with generic IR (clang) The VPMOVSX and (V)PMOVZX sign/zero extension intrinsics can be safely represented as generic __builtin_convertvector calls instead of x86 intrinsics. This patch removes the clang builtins and their use in the sse2/avx headers - a companion patch will remove/auto-upgrade the llvm intrinsics. Note: We already did this for SSE41 PMOVSX sometime ago. Differential Revision: http://reviews.llvm.org/D20684 llvm-svn: 271106
2016-05-28 16:12:45 +08:00
/* This function always performs a signed extension, but __v16qi is a char
which may be signed or unsigned, so use __v16qs. */
return (__m256i)__builtin_convertvector((__v16qs)__V, __v16hi);
Add AVX2 intrinsics for max, min, sign extend, and zero extend. llvm-svn: 147141
2011-12-22 17:18:58 +08:00
}
[X86] Rename DEFAULT_FN_ATTR macro to __DEFAULT_FN_ATTR llvm-svn: 241065
2015-06-30 21:36:19 +08:00
static __inline__ __m256i __DEFAULT_FN_ATTRS
Add AVX2 intrinsics for max, min, sign extend, and zero extend. llvm-svn: 147141
2011-12-22 17:18:58 +08:00
_mm256_cvtepi8_epi32(__m128i __V)
{
[X86][SSE] Replace VPMOVSX and (V)PMOVZX integer extension intrinsics with generic IR (clang) The VPMOVSX and (V)PMOVZX sign/zero extension intrinsics can be safely represented as generic __builtin_convertvector calls instead of x86 intrinsics. This patch removes the clang builtins and their use in the sse2/avx headers - a companion patch will remove/auto-upgrade the llvm intrinsics. Note: We already did this for SSE41 PMOVSX sometime ago. Differential Revision: http://reviews.llvm.org/D20684 llvm-svn: 271106
2016-05-28 16:12:45 +08:00
/* This function always performs a signed extension, but __v16qi is a char
which may be signed or unsigned, so use __v16qs. */
return (__m256i)__builtin_convertvector(__builtin_shufflevector((__v16qs)__V, (__v16qs)__V, 0, 1, 2, 3, 4, 5, 6, 7), __v8si);
Add AVX2 intrinsics for max, min, sign extend, and zero extend. llvm-svn: 147141
2011-12-22 17:18:58 +08:00
}
[X86] Rename DEFAULT_FN_ATTR macro to __DEFAULT_FN_ATTR llvm-svn: 241065
2015-06-30 21:36:19 +08:00
static __inline__ __m256i __DEFAULT_FN_ATTRS
Add AVX2 intrinsics for max, min, sign extend, and zero extend. llvm-svn: 147141
2011-12-22 17:18:58 +08:00
_mm256_cvtepi8_epi64(__m128i __V)
{
[X86][SSE] Replace VPMOVSX and (V)PMOVZX integer extension intrinsics with generic IR (clang) The VPMOVSX and (V)PMOVZX sign/zero extension intrinsics can be safely represented as generic __builtin_convertvector calls instead of x86 intrinsics. This patch removes the clang builtins and their use in the sse2/avx headers - a companion patch will remove/auto-upgrade the llvm intrinsics. Note: We already did this for SSE41 PMOVSX sometime ago. Differential Revision: http://reviews.llvm.org/D20684 llvm-svn: 271106
2016-05-28 16:12:45 +08:00
/* This function always performs a signed extension, but __v16qi is a char
which may be signed or unsigned, so use __v16qs. */
return (__m256i)__builtin_convertvector(__builtin_shufflevector((__v16qs)__V, (__v16qs)__V, 0, 1, 2, 3), __v4di);
Add AVX2 intrinsics for max, min, sign extend, and zero extend. llvm-svn: 147141
2011-12-22 17:18:58 +08:00
}
[X86] Rename DEFAULT_FN_ATTR macro to __DEFAULT_FN_ATTR llvm-svn: 241065
2015-06-30 21:36:19 +08:00
static __inline__ __m256i __DEFAULT_FN_ATTRS
Add AVX2 intrinsics for max, min, sign extend, and zero extend. llvm-svn: 147141
2011-12-22 17:18:58 +08:00
_mm256_cvtepi16_epi32(__m128i __V)
{
[X86][SSE] Replace VPMOVSX and (V)PMOVZX integer extension intrinsics with generic IR (clang) The VPMOVSX and (V)PMOVZX sign/zero extension intrinsics can be safely represented as generic __builtin_convertvector calls instead of x86 intrinsics. This patch removes the clang builtins and their use in the sse2/avx headers - a companion patch will remove/auto-upgrade the llvm intrinsics. Note: We already did this for SSE41 PMOVSX sometime ago. Differential Revision: http://reviews.llvm.org/D20684 llvm-svn: 271106
2016-05-28 16:12:45 +08:00
return (__m256i)__builtin_convertvector((__v8hi)__V, __v8si);
Add AVX2 intrinsics for max, min, sign extend, and zero extend. llvm-svn: 147141
2011-12-22 17:18:58 +08:00
}
[X86] Rename DEFAULT_FN_ATTR macro to __DEFAULT_FN_ATTR llvm-svn: 241065
2015-06-30 21:36:19 +08:00
static __inline__ __m256i __DEFAULT_FN_ATTRS
Add AVX2 intrinsics for max, min, sign extend, and zero extend. llvm-svn: 147141
2011-12-22 17:18:58 +08:00
_mm256_cvtepi16_epi64(__m128i __V)
{
[X86][SSE] Replace VPMOVSX and (V)PMOVZX integer extension intrinsics with generic IR (clang) The VPMOVSX and (V)PMOVZX sign/zero extension intrinsics can be safely represented as generic __builtin_convertvector calls instead of x86 intrinsics. This patch removes the clang builtins and their use in the sse2/avx headers - a companion patch will remove/auto-upgrade the llvm intrinsics. Note: We already did this for SSE41 PMOVSX sometime ago. Differential Revision: http://reviews.llvm.org/D20684 llvm-svn: 271106
2016-05-28 16:12:45 +08:00
return (__m256i)__builtin_convertvector(__builtin_shufflevector((__v8hi)__V, (__v8hi)__V, 0, 1, 2, 3), __v4di);
Add AVX2 intrinsics for max, min, sign extend, and zero extend. llvm-svn: 147141
2011-12-22 17:18:58 +08:00
}
[X86] Rename DEFAULT_FN_ATTR macro to __DEFAULT_FN_ATTR llvm-svn: 241065
2015-06-30 21:36:19 +08:00
static __inline__ __m256i __DEFAULT_FN_ATTRS
Add AVX2 intrinsics for max, min, sign extend, and zero extend. llvm-svn: 147141
2011-12-22 17:18:58 +08:00
_mm256_cvtepi32_epi64(__m128i __V)
{
[X86][SSE] Replace VPMOVSX and (V)PMOVZX integer extension intrinsics with generic IR (clang) The VPMOVSX and (V)PMOVZX sign/zero extension intrinsics can be safely represented as generic __builtin_convertvector calls instead of x86 intrinsics. This patch removes the clang builtins and their use in the sse2/avx headers - a companion patch will remove/auto-upgrade the llvm intrinsics. Note: We already did this for SSE41 PMOVSX sometime ago. Differential Revision: http://reviews.llvm.org/D20684 llvm-svn: 271106
2016-05-28 16:12:45 +08:00
return (__m256i)__builtin_convertvector((__v4si)__V, __v4di);
Add AVX2 intrinsics for max, min, sign extend, and zero extend. llvm-svn: 147141
2011-12-22 17:18:58 +08:00
}
[X86] Rename DEFAULT_FN_ATTR macro to __DEFAULT_FN_ATTR llvm-svn: 241065
2015-06-30 21:36:19 +08:00
static __inline__ __m256i __DEFAULT_FN_ATTRS
Add AVX2 intrinsics for max, min, sign extend, and zero extend. llvm-svn: 147141
2011-12-22 17:18:58 +08:00
_mm256_cvtepu8_epi16(__m128i __V)
{
[X86][SSE] Replace VPMOVSX and (V)PMOVZX integer extension intrinsics with generic IR (clang) The VPMOVSX and (V)PMOVZX sign/zero extension intrinsics can be safely represented as generic __builtin_convertvector calls instead of x86 intrinsics. This patch removes the clang builtins and their use in the sse2/avx headers - a companion patch will remove/auto-upgrade the llvm intrinsics. Note: We already did this for SSE41 PMOVSX sometime ago. Differential Revision: http://reviews.llvm.org/D20684 llvm-svn: 271106
2016-05-28 16:12:45 +08:00
return (__m256i)__builtin_convertvector((__v16qu)__V, __v16hi);
Add AVX2 intrinsics for max, min, sign extend, and zero extend. llvm-svn: 147141
2011-12-22 17:18:58 +08:00
}
[X86] Rename DEFAULT_FN_ATTR macro to __DEFAULT_FN_ATTR llvm-svn: 241065
2015-06-30 21:36:19 +08:00
static __inline__ __m256i __DEFAULT_FN_ATTRS
Add AVX2 intrinsics for max, min, sign extend, and zero extend. llvm-svn: 147141
2011-12-22 17:18:58 +08:00
_mm256_cvtepu8_epi32(__m128i __V)
{
[X86][SSE] Replace VPMOVSX and (V)PMOVZX integer extension intrinsics with generic IR (clang) The VPMOVSX and (V)PMOVZX sign/zero extension intrinsics can be safely represented as generic __builtin_convertvector calls instead of x86 intrinsics. This patch removes the clang builtins and their use in the sse2/avx headers - a companion patch will remove/auto-upgrade the llvm intrinsics. Note: We already did this for SSE41 PMOVSX sometime ago. Differential Revision: http://reviews.llvm.org/D20684 llvm-svn: 271106
2016-05-28 16:12:45 +08:00
return (__m256i)__builtin_convertvector(__builtin_shufflevector((__v16qu)__V, (__v16qu)__V, 0, 1, 2, 3, 4, 5, 6, 7), __v8si);
Add AVX2 intrinsics for max, min, sign extend, and zero extend. llvm-svn: 147141
2011-12-22 17:18:58 +08:00
}
[X86] Rename DEFAULT_FN_ATTR macro to __DEFAULT_FN_ATTR llvm-svn: 241065
2015-06-30 21:36:19 +08:00
static __inline__ __m256i __DEFAULT_FN_ATTRS
Add AVX2 intrinsics for max, min, sign extend, and zero extend. llvm-svn: 147141
2011-12-22 17:18:58 +08:00
_mm256_cvtepu8_epi64(__m128i __V)
{
[X86][SSE] Replace VPMOVSX and (V)PMOVZX integer extension intrinsics with generic IR (clang) The VPMOVSX and (V)PMOVZX sign/zero extension intrinsics can be safely represented as generic __builtin_convertvector calls instead of x86 intrinsics. This patch removes the clang builtins and their use in the sse2/avx headers - a companion patch will remove/auto-upgrade the llvm intrinsics. Note: We already did this for SSE41 PMOVSX sometime ago. Differential Revision: http://reviews.llvm.org/D20684 llvm-svn: 271106
2016-05-28 16:12:45 +08:00
return (__m256i)__builtin_convertvector(__builtin_shufflevector((__v16qu)__V, (__v16qu)__V, 0, 1, 2, 3), __v4di);
Add AVX2 intrinsics for max, min, sign extend, and zero extend. llvm-svn: 147141
2011-12-22 17:18:58 +08:00
}
[X86] Rename DEFAULT_FN_ATTR macro to __DEFAULT_FN_ATTR llvm-svn: 241065
2015-06-30 21:36:19 +08:00
static __inline__ __m256i __DEFAULT_FN_ATTRS
Add AVX2 intrinsics for max, min, sign extend, and zero extend. llvm-svn: 147141
2011-12-22 17:18:58 +08:00
_mm256_cvtepu16_epi32(__m128i __V)
{
[X86][SSE] Replace VPMOVSX and (V)PMOVZX integer extension intrinsics with generic IR (clang) The VPMOVSX and (V)PMOVZX sign/zero extension intrinsics can be safely represented as generic __builtin_convertvector calls instead of x86 intrinsics. This patch removes the clang builtins and their use in the sse2/avx headers - a companion patch will remove/auto-upgrade the llvm intrinsics. Note: We already did this for SSE41 PMOVSX sometime ago. Differential Revision: http://reviews.llvm.org/D20684 llvm-svn: 271106
2016-05-28 16:12:45 +08:00
return (__m256i)__builtin_convertvector((__v8hu)__V, __v8si);
Add AVX2 intrinsics for max, min, sign extend, and zero extend. llvm-svn: 147141
2011-12-22 17:18:58 +08:00
}
[X86] Rename DEFAULT_FN_ATTR macro to __DEFAULT_FN_ATTR llvm-svn: 241065
2015-06-30 21:36:19 +08:00
static __inline__ __m256i __DEFAULT_FN_ATTRS
Add AVX2 intrinsics for max, min, sign extend, and zero extend. llvm-svn: 147141
2011-12-22 17:18:58 +08:00
_mm256_cvtepu16_epi64(__m128i __V)
{
[X86][SSE] Replace VPMOVSX and (V)PMOVZX integer extension intrinsics with generic IR (clang) The VPMOVSX and (V)PMOVZX sign/zero extension intrinsics can be safely represented as generic __builtin_convertvector calls instead of x86 intrinsics. This patch removes the clang builtins and their use in the sse2/avx headers - a companion patch will remove/auto-upgrade the llvm intrinsics. Note: We already did this for SSE41 PMOVSX sometime ago. Differential Revision: http://reviews.llvm.org/D20684 llvm-svn: 271106
2016-05-28 16:12:45 +08:00
return (__m256i)__builtin_convertvector(__builtin_shufflevector((__v8hu)__V, (__v8hu)__V, 0, 1, 2, 3), __v4di);
Add AVX2 intrinsics for max, min, sign extend, and zero extend. llvm-svn: 147141
2011-12-22 17:18:58 +08:00
}
[X86] Rename DEFAULT_FN_ATTR macro to __DEFAULT_FN_ATTR llvm-svn: 241065
2015-06-30 21:36:19 +08:00
static __inline__ __m256i __DEFAULT_FN_ATTRS
Add AVX2 intrinsics for max, min, sign extend, and zero extend. llvm-svn: 147141
2011-12-22 17:18:58 +08:00
_mm256_cvtepu32_epi64(__m128i __V)
{
[X86][SSE] Replace VPMOVSX and (V)PMOVZX integer extension intrinsics with generic IR (clang) The VPMOVSX and (V)PMOVZX sign/zero extension intrinsics can be safely represented as generic __builtin_convertvector calls instead of x86 intrinsics. This patch removes the clang builtins and their use in the sse2/avx headers - a companion patch will remove/auto-upgrade the llvm intrinsics. Note: We already did this for SSE41 PMOVSX sometime ago. Differential Revision: http://reviews.llvm.org/D20684 llvm-svn: 271106
2016-05-28 16:12:45 +08:00
return (__m256i)__builtin_convertvector((__v4su)__V, __v4di);
Add AVX2 intrinsics for max, min, sign extend, and zero extend. llvm-svn: 147141
2011-12-22 17:18:58 +08:00
}
[X86] Rename DEFAULT_FN_ATTR macro to __DEFAULT_FN_ATTR llvm-svn: 241065
2015-06-30 21:36:19 +08:00
static __inline__ __m256i __DEFAULT_FN_ATTRS
PR14964: intrinsic headers using non-reserved identifiers Several of the intrinsic headers were using plain non-reserved identifiers. C++11 17.6.4.3.2 [global.names] p1 reservers names containing a double begining with an underscore followed by an uppercase letter for any use. I think I got them all, but open to being corrected. For the most part I didn't bother updating function-like macro parameter names because I don't believe they're subject to any such collission - though some function-like macros already follow this convention (I didn't update them in part because the churn was more significant as several function-like macros use the double underscore prefixed version of the same name as a parameter in their implementation) llvm-svn: 172666
2013-01-17 07:08:36 +08:00
_mm256_mul_epi32(__m256i __a, __m256i __b)
Add AVX2 multiply intrinsics. llvm-svn: 147219
2011-12-23 16:31:16 +08:00
{
PR14964: intrinsic headers using non-reserved identifiers Several of the intrinsic headers were using plain non-reserved identifiers. C++11 17.6.4.3.2 [global.names] p1 reservers names containing a double begining with an underscore followed by an uppercase letter for any use. I think I got them all, but open to being corrected. For the most part I didn't bother updating function-like macro parameter names because I don't believe they're subject to any such collission - though some function-like macros already follow this convention (I didn't update them in part because the churn was more significant as several function-like macros use the double underscore prefixed version of the same name as a parameter in their implementation) llvm-svn: 172666
2013-01-17 07:08:36 +08:00
return (__m256i)__builtin_ia32_pmuldq256((__v8si)__a, (__v8si)__b);
Add AVX2 multiply intrinsics. llvm-svn: 147219
2011-12-23 16:31:16 +08:00
}
[X86] Rename DEFAULT_FN_ATTR macro to __DEFAULT_FN_ATTR llvm-svn: 241065
2015-06-30 21:36:19 +08:00
static __inline__ __m256i __DEFAULT_FN_ATTRS
PR14964: intrinsic headers using non-reserved identifiers Several of the intrinsic headers were using plain non-reserved identifiers. C++11 17.6.4.3.2 [global.names] p1 reservers names containing a double begining with an underscore followed by an uppercase letter for any use. I think I got them all, but open to being corrected. For the most part I didn't bother updating function-like macro parameter names because I don't believe they're subject to any such collission - though some function-like macros already follow this convention (I didn't update them in part because the churn was more significant as several function-like macros use the double underscore prefixed version of the same name as a parameter in their implementation) llvm-svn: 172666
2013-01-17 07:08:36 +08:00
_mm256_mulhrs_epi16(__m256i __a, __m256i __b)
Add AVX2 multiply intrinsics. llvm-svn: 147219
2011-12-23 16:31:16 +08:00
{
PR14964: intrinsic headers using non-reserved identifiers Several of the intrinsic headers were using plain non-reserved identifiers. C++11 17.6.4.3.2 [global.names] p1 reservers names containing a double begining with an underscore followed by an uppercase letter for any use. I think I got them all, but open to being corrected. For the most part I didn't bother updating function-like macro parameter names because I don't believe they're subject to any such collission - though some function-like macros already follow this convention (I didn't update them in part because the churn was more significant as several function-like macros use the double underscore prefixed version of the same name as a parameter in their implementation) llvm-svn: 172666
2013-01-17 07:08:36 +08:00
return (__m256i)__builtin_ia32_pmulhrsw256((__v16hi)__a, (__v16hi)__b);
Add AVX2 multiply intrinsics. llvm-svn: 147219
2011-12-23 16:31:16 +08:00
}
[X86] Rename DEFAULT_FN_ATTR macro to __DEFAULT_FN_ATTR llvm-svn: 241065
2015-06-30 21:36:19 +08:00
static __inline__ __m256i __DEFAULT_FN_ATTRS
PR14964: intrinsic headers using non-reserved identifiers Several of the intrinsic headers were using plain non-reserved identifiers. C++11 17.6.4.3.2 [global.names] p1 reservers names containing a double begining with an underscore followed by an uppercase letter for any use. I think I got them all, but open to being corrected. For the most part I didn't bother updating function-like macro parameter names because I don't believe they're subject to any such collission - though some function-like macros already follow this convention (I didn't update them in part because the churn was more significant as several function-like macros use the double underscore prefixed version of the same name as a parameter in their implementation) llvm-svn: 172666
2013-01-17 07:08:36 +08:00
_mm256_mulhi_epu16(__m256i __a, __m256i __b)
Add AVX2 multiply intrinsics. llvm-svn: 147219
2011-12-23 16:31:16 +08:00
{
PR14964: intrinsic headers using non-reserved identifiers Several of the intrinsic headers were using plain non-reserved identifiers. C++11 17.6.4.3.2 [global.names] p1 reservers names containing a double begining with an underscore followed by an uppercase letter for any use. I think I got them all, but open to being corrected. For the most part I didn't bother updating function-like macro parameter names because I don't believe they're subject to any such collission - though some function-like macros already follow this convention (I didn't update them in part because the churn was more significant as several function-like macros use the double underscore prefixed version of the same name as a parameter in their implementation) llvm-svn: 172666
2013-01-17 07:08:36 +08:00
return (__m256i)__builtin_ia32_pmulhuw256((__v16hi)__a, (__v16hi)__b);
Add AVX2 multiply intrinsics. llvm-svn: 147219
2011-12-23 16:31:16 +08:00
}
[X86] Rename DEFAULT_FN_ATTR macro to __DEFAULT_FN_ATTR llvm-svn: 241065
2015-06-30 21:36:19 +08:00
static __inline__ __m256i __DEFAULT_FN_ATTRS
PR14964: intrinsic headers using non-reserved identifiers Several of the intrinsic headers were using plain non-reserved identifiers. C++11 17.6.4.3.2 [global.names] p1 reservers names containing a double begining with an underscore followed by an uppercase letter for any use. I think I got them all, but open to being corrected. For the most part I didn't bother updating function-like macro parameter names because I don't believe they're subject to any such collission - though some function-like macros already follow this convention (I didn't update them in part because the churn was more significant as several function-like macros use the double underscore prefixed version of the same name as a parameter in their implementation) llvm-svn: 172666
2013-01-17 07:08:36 +08:00
_mm256_mulhi_epi16(__m256i __a, __m256i __b)
Add AVX2 multiply intrinsics. llvm-svn: 147219
2011-12-23 16:31:16 +08:00
{
PR14964: intrinsic headers using non-reserved identifiers Several of the intrinsic headers were using plain non-reserved identifiers. C++11 17.6.4.3.2 [global.names] p1 reservers names containing a double begining with an underscore followed by an uppercase letter for any use. I think I got them all, but open to being corrected. For the most part I didn't bother updating function-like macro parameter names because I don't believe they're subject to any such collission - though some function-like macros already follow this convention (I didn't update them in part because the churn was more significant as several function-like macros use the double underscore prefixed version of the same name as a parameter in their implementation) llvm-svn: 172666
2013-01-17 07:08:36 +08:00
return (__m256i)__builtin_ia32_pmulhw256((__v16hi)__a, (__v16hi)__b);
Add AVX2 multiply intrinsics. llvm-svn: 147219
2011-12-23 16:31:16 +08:00
}
[X86] Rename DEFAULT_FN_ATTR macro to __DEFAULT_FN_ATTR llvm-svn: 241065
2015-06-30 21:36:19 +08:00
static __inline__ __m256i __DEFAULT_FN_ATTRS
PR14964: intrinsic headers using non-reserved identifiers Several of the intrinsic headers were using plain non-reserved identifiers. C++11 17.6.4.3.2 [global.names] p1 reservers names containing a double begining with an underscore followed by an uppercase letter for any use. I think I got them all, but open to being corrected. For the most part I didn't bother updating function-like macro parameter names because I don't believe they're subject to any such collission - though some function-like macros already follow this convention (I didn't update them in part because the churn was more significant as several function-like macros use the double underscore prefixed version of the same name as a parameter in their implementation) llvm-svn: 172666
2013-01-17 07:08:36 +08:00
_mm256_mullo_epi16(__m256i __a, __m256i __b)
Add AVX2 multiply intrinsics. llvm-svn: 147219
2011-12-23 16:31:16 +08:00
{
[X86] Use unsigned types for vector arithmetic in intrinsics to avoid undefined behavior for signed integer overflow. This is really only needed for addition, subtraction, and multiplication, but I did the bitwise ops too for overall consistency. Clang currently doesn't set NSW for signed vector operations so the undefined behavior shouldn't happen today. llvm-svn: 271778
2016-06-04 13:43:41 +08:00
return (__m256i)((__v16hu)__a * (__v16hu)__b);
Add AVX2 multiply intrinsics. llvm-svn: 147219
2011-12-23 16:31:16 +08:00
}
[X86] Rename DEFAULT_FN_ATTR macro to __DEFAULT_FN_ATTR llvm-svn: 241065
2015-06-30 21:36:19 +08:00
static __inline__ __m256i __DEFAULT_FN_ATTRS
PR14964: intrinsic headers using non-reserved identifiers Several of the intrinsic headers were using plain non-reserved identifiers. C++11 17.6.4.3.2 [global.names] p1 reservers names containing a double begining with an underscore followed by an uppercase letter for any use. I think I got them all, but open to being corrected. For the most part I didn't bother updating function-like macro parameter names because I don't believe they're subject to any such collission - though some function-like macros already follow this convention (I didn't update them in part because the churn was more significant as several function-like macros use the double underscore prefixed version of the same name as a parameter in their implementation) llvm-svn: 172666
2013-01-17 07:08:36 +08:00
_mm256_mullo_epi32 (__m256i __a, __m256i __b)
Add AVX2 multiply intrinsics. llvm-svn: 147219
2011-12-23 16:31:16 +08:00
{
[X86] Use unsigned types for vector arithmetic in intrinsics to avoid undefined behavior for signed integer overflow. This is really only needed for addition, subtraction, and multiplication, but I did the bitwise ops too for overall consistency. Clang currently doesn't set NSW for signed vector operations so the undefined behavior shouldn't happen today. llvm-svn: 271778
2016-06-04 13:43:41 +08:00
return (__m256i)((__v8su)__a * (__v8su)__b);
Add AVX2 multiply intrinsics. llvm-svn: 147219
2011-12-23 16:31:16 +08:00
}
[X86] Rename DEFAULT_FN_ATTR macro to __DEFAULT_FN_ATTR llvm-svn: 241065
2015-06-30 21:36:19 +08:00
static __inline__ __m256i __DEFAULT_FN_ATTRS
PR14964: intrinsic headers using non-reserved identifiers Several of the intrinsic headers were using plain non-reserved identifiers. C++11 17.6.4.3.2 [global.names] p1 reservers names containing a double begining with an underscore followed by an uppercase letter for any use. I think I got them all, but open to being corrected. For the most part I didn't bother updating function-like macro parameter names because I don't believe they're subject to any such collission - though some function-like macros already follow this convention (I didn't update them in part because the churn was more significant as several function-like macros use the double underscore prefixed version of the same name as a parameter in their implementation) llvm-svn: 172666
2013-01-17 07:08:36 +08:00
_mm256_mul_epu32(__m256i __a, __m256i __b)
Add AVX2 multiply intrinsics. llvm-svn: 147219
2011-12-23 16:31:16 +08:00
{
PR14964: intrinsic headers using non-reserved identifiers Several of the intrinsic headers were using plain non-reserved identifiers. C++11 17.6.4.3.2 [global.names] p1 reservers names containing a double begining with an underscore followed by an uppercase letter for any use. I think I got them all, but open to being corrected. For the most part I didn't bother updating function-like macro parameter names because I don't believe they're subject to any such collission - though some function-like macros already follow this convention (I didn't update them in part because the churn was more significant as several function-like macros use the double underscore prefixed version of the same name as a parameter in their implementation) llvm-svn: 172666
2013-01-17 07:08:36 +08:00
return __builtin_ia32_pmuludq256((__v8si)__a, (__v8si)__b);
Add AVX2 multiply intrinsics. llvm-svn: 147219
2011-12-23 16:31:16 +08:00
}
[X86] Rename DEFAULT_FN_ATTR macro to __DEFAULT_FN_ATTR llvm-svn: 241065
2015-06-30 21:36:19 +08:00
static __inline__ __m256i __DEFAULT_FN_ATTRS
PR14964: intrinsic headers using non-reserved identifiers Several of the intrinsic headers were using plain non-reserved identifiers. C++11 17.6.4.3.2 [global.names] p1 reservers names containing a double begining with an underscore followed by an uppercase letter for any use. I think I got them all, but open to being corrected. For the most part I didn't bother updating function-like macro parameter names because I don't believe they're subject to any such collission - though some function-like macros already follow this convention (I didn't update them in part because the churn was more significant as several function-like macros use the double underscore prefixed version of the same name as a parameter in their implementation) llvm-svn: 172666
2013-01-17 07:08:36 +08:00
_mm256_or_si256(__m256i __a, __m256i __b)
Add AVX2 intrinsics for and, andn, or, and xor. llvm-svn: 146862
2011-12-19 17:03:48 +08:00
{
[X86] Use unsigned types for vector arithmetic in intrinsics to avoid undefined behavior for signed integer overflow. This is really only needed for addition, subtraction, and multiplication, but I did the bitwise ops too for overall consistency. Clang currently doesn't set NSW for signed vector operations so the undefined behavior shouldn't happen today. llvm-svn: 271778
2016-06-04 13:43:41 +08:00
return (__m256i)((__v4du)__a | (__v4du)__b);
Add AVX2 intrinsics for and, andn, or, and xor. llvm-svn: 146862
2011-12-19 17:03:48 +08:00
}
[X86] Rename DEFAULT_FN_ATTR macro to __DEFAULT_FN_ATTR llvm-svn: 241065
2015-06-30 21:36:19 +08:00
static __inline__ __m256i __DEFAULT_FN_ATTRS
PR14964: intrinsic headers using non-reserved identifiers Several of the intrinsic headers were using plain non-reserved identifiers. C++11 17.6.4.3.2 [global.names] p1 reservers names containing a double begining with an underscore followed by an uppercase letter for any use. I think I got them all, but open to being corrected. For the most part I didn't bother updating function-like macro parameter names because I don't believe they're subject to any such collission - though some function-like macros already follow this convention (I didn't update them in part because the churn was more significant as several function-like macros use the double underscore prefixed version of the same name as a parameter in their implementation) llvm-svn: 172666
2013-01-17 07:08:36 +08:00
_mm256_sad_epu8(__m256i __a, __m256i __b)
More AVX2 intrinsics for shift, psign, some shuffles, and psadbw. llvm-svn: 147236
2011-12-24 11:28:57 +08:00
{
PR14964: intrinsic headers using non-reserved identifiers Several of the intrinsic headers were using plain non-reserved identifiers. C++11 17.6.4.3.2 [global.names] p1 reservers names containing a double begining with an underscore followed by an uppercase letter for any use. I think I got them all, but open to being corrected. For the most part I didn't bother updating function-like macro parameter names because I don't believe they're subject to any such collission - though some function-like macros already follow this convention (I didn't update them in part because the churn was more significant as several function-like macros use the double underscore prefixed version of the same name as a parameter in their implementation) llvm-svn: 172666
2013-01-17 07:08:36 +08:00
return __builtin_ia32_psadbw256((__v32qi)__a, (__v32qi)__b);
More AVX2 intrinsics for shift, psign, some shuffles, and psadbw. llvm-svn: 147236
2011-12-24 11:28:57 +08:00
}
[X86] Rename DEFAULT_FN_ATTR macro to __DEFAULT_FN_ATTR llvm-svn: 241065
2015-06-30 21:36:19 +08:00
static __inline__ __m256i __DEFAULT_FN_ATTRS
PR14964: intrinsic headers using non-reserved identifiers Several of the intrinsic headers were using plain non-reserved identifiers. C++11 17.6.4.3.2 [global.names] p1 reservers names containing a double begining with an underscore followed by an uppercase letter for any use. I think I got them all, but open to being corrected. For the most part I didn't bother updating function-like macro parameter names because I don't believe they're subject to any such collission - though some function-like macros already follow this convention (I didn't update them in part because the churn was more significant as several function-like macros use the double underscore prefixed version of the same name as a parameter in their implementation) llvm-svn: 172666
2013-01-17 07:08:36 +08:00
_mm256_shuffle_epi8(__m256i __a, __m256i __b)
More AVX2 intrinsics for shift, psign, some shuffles, and psadbw. llvm-svn: 147236
2011-12-24 11:28:57 +08:00
{
PR14964: intrinsic headers using non-reserved identifiers Several of the intrinsic headers were using plain non-reserved identifiers. C++11 17.6.4.3.2 [global.names] p1 reservers names containing a double begining with an underscore followed by an uppercase letter for any use. I think I got them all, but open to being corrected. For the most part I didn't bother updating function-like macro parameter names because I don't believe they're subject to any such collission - though some function-like macros already follow this convention (I didn't update them in part because the churn was more significant as several function-like macros use the double underscore prefixed version of the same name as a parameter in their implementation) llvm-svn: 172666
2013-01-17 07:08:36 +08:00
return (__m256i)__builtin_ia32_pshufb256((__v32qi)__a, (__v32qi)__b);
More AVX2 intrinsics for shift, psign, some shuffles, and psadbw. llvm-svn: 147236
2011-12-24 11:28:57 +08:00
}
#define _mm256_shuffle_epi32(a, imm) __extension__ ({ \
[X86] Remove temporary variables from macros in x86 intrinsic headers. Prevents duplicate names appearing from multiple macro expansions. NFC llvm-svn: 252586
2015-11-10 13:08:05 +08:00
(__m256i)__builtin_shufflevector((__v8si)(__m256i)(a), \
[X86] Use undefined instead of setzero in shufflevector based intrinsics when the second source is unused. Rewrite immediate extractions in shuffle intrinsics to be in ((c >> x) & y) form instead of ((c & z) >> x). This way only x varies between each use instead of having to vary x and z. llvm-svn: 274525
2016-07-05 06:18:01 +08:00
(__v8si)_mm256_undefined_si256(), \
0 + (((imm) >> 0) & 0x3), \
0 + (((imm) >> 2) & 0x3), \
0 + (((imm) >> 4) & 0x3), \
0 + (((imm) >> 6) & 0x3), \
4 + (((imm) >> 0) & 0x3), \
4 + (((imm) >> 2) & 0x3), \
4 + (((imm) >> 4) & 0x3), \
4 + (((imm) >> 6) & 0x3)); })
More AVX2 intrinsics for shift, psign, some shuffles, and psadbw. llvm-svn: 147236
2011-12-24 11:28:57 +08:00
#define _mm256_shufflehi_epi16(a, imm) __extension__ ({ \
[X86] Remove temporary variables from macros in x86 intrinsic headers. Prevents duplicate names appearing from multiple macro expansions. NFC llvm-svn: 252586
2015-11-10 13:08:05 +08:00
(__m256i)__builtin_shufflevector((__v16hi)(__m256i)(a), \
[X86] Use undefined instead of setzero in shufflevector based intrinsics when the second source is unused. Rewrite immediate extractions in shuffle intrinsics to be in ((c >> x) & y) form instead of ((c & z) >> x). This way only x varies between each use instead of having to vary x and z. llvm-svn: 274525
2016-07-05 06:18:01 +08:00
(__v16hi)_mm256_undefined_si256(), \
More AVX2 intrinsics for shift, psign, some shuffles, and psadbw. llvm-svn: 147236
2011-12-24 11:28:57 +08:00
0, 1, 2, 3, \
[X86] Use undefined instead of setzero in shufflevector based intrinsics when the second source is unused. Rewrite immediate extractions in shuffle intrinsics to be in ((c >> x) & y) form instead of ((c & z) >> x). This way only x varies between each use instead of having to vary x and z. llvm-svn: 274525
2016-07-05 06:18:01 +08:00
4 + (((imm) >> 0) & 0x3), \
4 + (((imm) >> 2) & 0x3), \
4 + (((imm) >> 4) & 0x3), \
4 + (((imm) >> 6) & 0x3), \
More AVX2 intrinsics for shift, psign, some shuffles, and psadbw. llvm-svn: 147236
2011-12-24 11:28:57 +08:00
8, 9, 10, 11, \
[X86] Use undefined instead of setzero in shufflevector based intrinsics when the second source is unused. Rewrite immediate extractions in shuffle intrinsics to be in ((c >> x) & y) form instead of ((c & z) >> x). This way only x varies between each use instead of having to vary x and z. llvm-svn: 274525
2016-07-05 06:18:01 +08:00
12 + (((imm) >> 0) & 0x3), \
12 + (((imm) >> 2) & 0x3), \
12 + (((imm) >> 4) & 0x3), \
12 + (((imm) >> 6) & 0x3)); })
More AVX2 intrinsics for shift, psign, some shuffles, and psadbw. llvm-svn: 147236
2011-12-24 11:28:57 +08:00
#define _mm256_shufflelo_epi16(a, imm) __extension__ ({ \
[X86] Remove temporary variables from macros in x86 intrinsic headers. Prevents duplicate names appearing from multiple macro expansions. NFC llvm-svn: 252586
2015-11-10 13:08:05 +08:00
(__m256i)__builtin_shufflevector((__v16hi)(__m256i)(a), \
[X86] Use undefined instead of setzero in shufflevector based intrinsics when the second source is unused. Rewrite immediate extractions in shuffle intrinsics to be in ((c >> x) & y) form instead of ((c & z) >> x). This way only x varies between each use instead of having to vary x and z. llvm-svn: 274525
2016-07-05 06:18:01 +08:00
(__v16hi)_mm256_undefined_si256(), \
0 + (((imm) >> 0) & 0x3), \
0 + (((imm) >> 2) & 0x3), \
0 + (((imm) >> 4) & 0x3), \
0 + (((imm) >> 6) & 0x3), \
More AVX2 intrinsics for shift, psign, some shuffles, and psadbw. llvm-svn: 147236
2011-12-24 11:28:57 +08:00
4, 5, 6, 7, \
[X86] Use undefined instead of setzero in shufflevector based intrinsics when the second source is unused. Rewrite immediate extractions in shuffle intrinsics to be in ((c >> x) & y) form instead of ((c & z) >> x). This way only x varies between each use instead of having to vary x and z. llvm-svn: 274525
2016-07-05 06:18:01 +08:00
8 + (((imm) >> 0) & 0x3), \
8 + (((imm) >> 2) & 0x3), \
8 + (((imm) >> 4) & 0x3), \
8 + (((imm) >> 6) & 0x3), \
More AVX2 intrinsics for shift, psign, some shuffles, and psadbw. llvm-svn: 147236
2011-12-24 11:28:57 +08:00
12, 13, 14, 15); })
[X86] Rename DEFAULT_FN_ATTR macro to __DEFAULT_FN_ATTR llvm-svn: 241065
2015-06-30 21:36:19 +08:00
static __inline__ __m256i __DEFAULT_FN_ATTRS
PR14964: intrinsic headers using non-reserved identifiers Several of the intrinsic headers were using plain non-reserved identifiers. C++11 17.6.4.3.2 [global.names] p1 reservers names containing a double begining with an underscore followed by an uppercase letter for any use. I think I got them all, but open to being corrected. For the most part I didn't bother updating function-like macro parameter names because I don't believe they're subject to any such collission - though some function-like macros already follow this convention (I didn't update them in part because the churn was more significant as several function-like macros use the double underscore prefixed version of the same name as a parameter in their implementation) llvm-svn: 172666
2013-01-17 07:08:36 +08:00
_mm256_sign_epi8(__m256i __a, __m256i __b)
More AVX2 intrinsics for shift, psign, some shuffles, and psadbw. llvm-svn: 147236
2011-12-24 11:28:57 +08:00
{
PR14964: intrinsic headers using non-reserved identifiers Several of the intrinsic headers were using plain non-reserved identifiers. C++11 17.6.4.3.2 [global.names] p1 reservers names containing a double begining with an underscore followed by an uppercase letter for any use. I think I got them all, but open to being corrected. For the most part I didn't bother updating function-like macro parameter names because I don't believe they're subject to any such collission - though some function-like macros already follow this convention (I didn't update them in part because the churn was more significant as several function-like macros use the double underscore prefixed version of the same name as a parameter in their implementation) llvm-svn: 172666
2013-01-17 07:08:36 +08:00
return (__m256i)__builtin_ia32_psignb256((__v32qi)__a, (__v32qi)__b);
More AVX2 intrinsics for shift, psign, some shuffles, and psadbw. llvm-svn: 147236
2011-12-24 11:28:57 +08:00
}
[X86] Rename DEFAULT_FN_ATTR macro to __DEFAULT_FN_ATTR llvm-svn: 241065
2015-06-30 21:36:19 +08:00
static __inline__ __m256i __DEFAULT_FN_ATTRS
PR14964: intrinsic headers using non-reserved identifiers Several of the intrinsic headers were using plain non-reserved identifiers. C++11 17.6.4.3.2 [global.names] p1 reservers names containing a double begining with an underscore followed by an uppercase letter for any use. I think I got them all, but open to being corrected. For the most part I didn't bother updating function-like macro parameter names because I don't believe they're subject to any such collission - though some function-like macros already follow this convention (I didn't update them in part because the churn was more significant as several function-like macros use the double underscore prefixed version of the same name as a parameter in their implementation) llvm-svn: 172666
2013-01-17 07:08:36 +08:00
_mm256_sign_epi16(__m256i __a, __m256i __b)
More AVX2 intrinsics for shift, psign, some shuffles, and psadbw. llvm-svn: 147236
2011-12-24 11:28:57 +08:00
{
PR14964: intrinsic headers using non-reserved identifiers Several of the intrinsic headers were using plain non-reserved identifiers. C++11 17.6.4.3.2 [global.names] p1 reservers names containing a double begining with an underscore followed by an uppercase letter for any use. I think I got them all, but open to being corrected. For the most part I didn't bother updating function-like macro parameter names because I don't believe they're subject to any such collission - though some function-like macros already follow this convention (I didn't update them in part because the churn was more significant as several function-like macros use the double underscore prefixed version of the same name as a parameter in their implementation) llvm-svn: 172666
2013-01-17 07:08:36 +08:00
return (__m256i)__builtin_ia32_psignw256((__v16hi)__a, (__v16hi)__b);
More AVX2 intrinsics for shift, psign, some shuffles, and psadbw. llvm-svn: 147236
2011-12-24 11:28:57 +08:00
}
[X86] Rename DEFAULT_FN_ATTR macro to __DEFAULT_FN_ATTR llvm-svn: 241065
2015-06-30 21:36:19 +08:00
static __inline__ __m256i __DEFAULT_FN_ATTRS
PR14964: intrinsic headers using non-reserved identifiers Several of the intrinsic headers were using plain non-reserved identifiers. C++11 17.6.4.3.2 [global.names] p1 reservers names containing a double begining with an underscore followed by an uppercase letter for any use. I think I got them all, but open to being corrected. For the most part I didn't bother updating function-like macro parameter names because I don't believe they're subject to any such collission - though some function-like macros already follow this convention (I didn't update them in part because the churn was more significant as several function-like macros use the double underscore prefixed version of the same name as a parameter in their implementation) llvm-svn: 172666
2013-01-17 07:08:36 +08:00
_mm256_sign_epi32(__m256i __a, __m256i __b)
More AVX2 intrinsics for shift, psign, some shuffles, and psadbw. llvm-svn: 147236
2011-12-24 11:28:57 +08:00
{
PR14964: intrinsic headers using non-reserved identifiers Several of the intrinsic headers were using plain non-reserved identifiers. C++11 17.6.4.3.2 [global.names] p1 reservers names containing a double begining with an underscore followed by an uppercase letter for any use. I think I got them all, but open to being corrected. For the most part I didn't bother updating function-like macro parameter names because I don't believe they're subject to any such collission - though some function-like macros already follow this convention (I didn't update them in part because the churn was more significant as several function-like macros use the double underscore prefixed version of the same name as a parameter in their implementation) llvm-svn: 172666
2013-01-17 07:08:36 +08:00
return (__m256i)__builtin_ia32_psignd256((__v8si)__a, (__v8si)__b);
More AVX2 intrinsics for shift, psign, some shuffles, and psadbw. llvm-svn: 147236
2011-12-24 11:28:57 +08:00
}
[X86] Handle AVX2 pslldqi and psrldqi intrinsics shufflevector creation directly in the header file instead of in CGBuiltin.cpp. Simplify the sse2 equivalents as well. llvm-svn: 272246
2016-06-09 13:15:12 +08:00
#define _mm256_slli_si256(a, imm) __extension__ ({ \
[X86] Fix pslldq/psrldq intrinsics to not fail compilation with immediates larger than 16. This was accidentally broken in r272246. llvm-svn: 273775
2016-06-25 15:31:14 +08:00
(__m256i)__builtin_shufflevector( \
(__v32qi)_mm256_setzero_si256(), \
(__v32qi)(__m256i)(a), \
((char)(imm)&0xF0) ? 0 : ((char)(imm)>0x0 ? 16 : 32) - (char)(imm), \
((char)(imm)&0xF0) ? 1 : ((char)(imm)>0x1 ? 17 : 33) - (char)(imm), \
((char)(imm)&0xF0) ? 2 : ((char)(imm)>0x2 ? 18 : 34) - (char)(imm), \
((char)(imm)&0xF0) ? 3 : ((char)(imm)>0x3 ? 19 : 35) - (char)(imm), \
((char)(imm)&0xF0) ? 4 : ((char)(imm)>0x4 ? 20 : 36) - (char)(imm), \
((char)(imm)&0xF0) ? 5 : ((char)(imm)>0x5 ? 21 : 37) - (char)(imm), \
((char)(imm)&0xF0) ? 6 : ((char)(imm)>0x6 ? 22 : 38) - (char)(imm), \
((char)(imm)&0xF0) ? 7 : ((char)(imm)>0x7 ? 23 : 39) - (char)(imm), \
((char)(imm)&0xF0) ? 8 : ((char)(imm)>0x8 ? 24 : 40) - (char)(imm), \
((char)(imm)&0xF0) ? 9 : ((char)(imm)>0x9 ? 25 : 41) - (char)(imm), \
((char)(imm)&0xF0) ? 10 : ((char)(imm)>0xA ? 26 : 42) - (char)(imm), \
((char)(imm)&0xF0) ? 11 : ((char)(imm)>0xB ? 27 : 43) - (char)(imm), \
((char)(imm)&0xF0) ? 12 : ((char)(imm)>0xC ? 28 : 44) - (char)(imm), \
((char)(imm)&0xF0) ? 13 : ((char)(imm)>0xD ? 29 : 45) - (char)(imm), \
((char)(imm)&0xF0) ? 14 : ((char)(imm)>0xE ? 30 : 46) - (char)(imm), \
((char)(imm)&0xF0) ? 15 : ((char)(imm)>0xF ? 31 : 47) - (char)(imm), \
((char)(imm)&0xF0) ? 16 : ((char)(imm)>0x0 ? 32 : 48) - (char)(imm), \
((char)(imm)&0xF0) ? 17 : ((char)(imm)>0x1 ? 33 : 49) - (char)(imm), \
((char)(imm)&0xF0) ? 18 : ((char)(imm)>0x2 ? 34 : 50) - (char)(imm), \
((char)(imm)&0xF0) ? 19 : ((char)(imm)>0x3 ? 35 : 51) - (char)(imm), \
((char)(imm)&0xF0) ? 20 : ((char)(imm)>0x4 ? 36 : 52) - (char)(imm), \
((char)(imm)&0xF0) ? 21 : ((char)(imm)>0x5 ? 37 : 53) - (char)(imm), \
((char)(imm)&0xF0) ? 22 : ((char)(imm)>0x6 ? 38 : 54) - (char)(imm), \
((char)(imm)&0xF0) ? 23 : ((char)(imm)>0x7 ? 39 : 55) - (char)(imm), \
((char)(imm)&0xF0) ? 24 : ((char)(imm)>0x8 ? 40 : 56) - (char)(imm), \
((char)(imm)&0xF0) ? 25 : ((char)(imm)>0x9 ? 41 : 57) - (char)(imm), \
((char)(imm)&0xF0) ? 26 : ((char)(imm)>0xA ? 42 : 58) - (char)(imm), \
((char)(imm)&0xF0) ? 27 : ((char)(imm)>0xB ? 43 : 59) - (char)(imm), \
((char)(imm)&0xF0) ? 28 : ((char)(imm)>0xC ? 44 : 60) - (char)(imm), \
((char)(imm)&0xF0) ? 29 : ((char)(imm)>0xD ? 45 : 61) - (char)(imm), \
((char)(imm)&0xF0) ? 30 : ((char)(imm)>0xE ? 46 : 62) - (char)(imm), \
((char)(imm)&0xF0) ? 31 : ((char)(imm)>0xF ? 47 : 63) - (char)(imm)); })
More AVX2 intrinsics for shift, psign, some shuffles, and psadbw. llvm-svn: 147236
2011-12-24 11:28:57 +08:00
[X86] Added _mm256_bslli_epi128 and _mm256_bsrli_epi128. These two intrinsics are alternative names for _mm256_slli_si256 and _mm256_srli_si256, respectively. llvm-svn: 237693
2015-05-19 21:05:46 +08:00
#define _mm256_bslli_epi128(a, count) _mm256_slli_si256((a), (count))
[X86] Rename DEFAULT_FN_ATTR macro to __DEFAULT_FN_ATTR llvm-svn: 241065
2015-06-30 21:36:19 +08:00
static __inline__ __m256i __DEFAULT_FN_ATTRS
PR14964: intrinsic headers using non-reserved identifiers Several of the intrinsic headers were using plain non-reserved identifiers. C++11 17.6.4.3.2 [global.names] p1 reservers names containing a double begining with an underscore followed by an uppercase letter for any use. I think I got them all, but open to being corrected. For the most part I didn't bother updating function-like macro parameter names because I don't believe they're subject to any such collission - though some function-like macros already follow this convention (I didn't update them in part because the churn was more significant as several function-like macros use the double underscore prefixed version of the same name as a parameter in their implementation) llvm-svn: 172666
2013-01-17 07:08:36 +08:00
_mm256_slli_epi16(__m256i __a, int __count)
More AVX2 intrinsics for shift, psign, some shuffles, and psadbw. llvm-svn: 147236
2011-12-24 11:28:57 +08:00
{
PR14964: intrinsic headers using non-reserved identifiers Several of the intrinsic headers were using plain non-reserved identifiers. C++11 17.6.4.3.2 [global.names] p1 reservers names containing a double begining with an underscore followed by an uppercase letter for any use. I think I got them all, but open to being corrected. For the most part I didn't bother updating function-like macro parameter names because I don't believe they're subject to any such collission - though some function-like macros already follow this convention (I didn't update them in part because the churn was more significant as several function-like macros use the double underscore prefixed version of the same name as a parameter in their implementation) llvm-svn: 172666
2013-01-17 07:08:36 +08:00
return (__m256i)__builtin_ia32_psllwi256((__v16hi)__a, __count);
More AVX2 intrinsics for shift, psign, some shuffles, and psadbw. llvm-svn: 147236
2011-12-24 11:28:57 +08:00
}
[X86] Rename DEFAULT_FN_ATTR macro to __DEFAULT_FN_ATTR llvm-svn: 241065
2015-06-30 21:36:19 +08:00
static __inline__ __m256i __DEFAULT_FN_ATTRS
PR14964: intrinsic headers using non-reserved identifiers Several of the intrinsic headers were using plain non-reserved identifiers. C++11 17.6.4.3.2 [global.names] p1 reservers names containing a double begining with an underscore followed by an uppercase letter for any use. I think I got them all, but open to being corrected. For the most part I didn't bother updating function-like macro parameter names because I don't believe they're subject to any such collission - though some function-like macros already follow this convention (I didn't update them in part because the churn was more significant as several function-like macros use the double underscore prefixed version of the same name as a parameter in their implementation) llvm-svn: 172666
2013-01-17 07:08:36 +08:00
_mm256_sll_epi16(__m256i __a, __m128i __count)
More AVX2 intrinsics for shift, psign, some shuffles, and psadbw. llvm-svn: 147236
2011-12-24 11:28:57 +08:00
{
PR14964: intrinsic headers using non-reserved identifiers Several of the intrinsic headers were using plain non-reserved identifiers. C++11 17.6.4.3.2 [global.names] p1 reservers names containing a double begining with an underscore followed by an uppercase letter for any use. I think I got them all, but open to being corrected. For the most part I didn't bother updating function-like macro parameter names because I don't believe they're subject to any such collission - though some function-like macros already follow this convention (I didn't update them in part because the churn was more significant as several function-like macros use the double underscore prefixed version of the same name as a parameter in their implementation) llvm-svn: 172666
2013-01-17 07:08:36 +08:00
return (__m256i)__builtin_ia32_psllw256((__v16hi)__a, (__v8hi)__count);
More AVX2 intrinsics for shift, psign, some shuffles, and psadbw. llvm-svn: 147236
2011-12-24 11:28:57 +08:00
}
[X86] Rename DEFAULT_FN_ATTR macro to __DEFAULT_FN_ATTR llvm-svn: 241065
2015-06-30 21:36:19 +08:00
static __inline__ __m256i __DEFAULT_FN_ATTRS
PR14964: intrinsic headers using non-reserved identifiers Several of the intrinsic headers were using plain non-reserved identifiers. C++11 17.6.4.3.2 [global.names] p1 reservers names containing a double begining with an underscore followed by an uppercase letter for any use. I think I got them all, but open to being corrected. For the most part I didn't bother updating function-like macro parameter names because I don't believe they're subject to any such collission - though some function-like macros already follow this convention (I didn't update them in part because the churn was more significant as several function-like macros use the double underscore prefixed version of the same name as a parameter in their implementation) llvm-svn: 172666
2013-01-17 07:08:36 +08:00
_mm256_slli_epi32(__m256i __a, int __count)
More AVX2 intrinsics for shift, psign, some shuffles, and psadbw. llvm-svn: 147236
2011-12-24 11:28:57 +08:00
{
PR14964: intrinsic headers using non-reserved identifiers Several of the intrinsic headers were using plain non-reserved identifiers. C++11 17.6.4.3.2 [global.names] p1 reservers names containing a double begining with an underscore followed by an uppercase letter for any use. I think I got them all, but open to being corrected. For the most part I didn't bother updating function-like macro parameter names because I don't believe they're subject to any such collission - though some function-like macros already follow this convention (I didn't update them in part because the churn was more significant as several function-like macros use the double underscore prefixed version of the same name as a parameter in their implementation) llvm-svn: 172666
2013-01-17 07:08:36 +08:00
return (__m256i)__builtin_ia32_pslldi256((__v8si)__a, __count);
More AVX2 intrinsics for shift, psign, some shuffles, and psadbw. llvm-svn: 147236
2011-12-24 11:28:57 +08:00
}
[X86] Rename DEFAULT_FN_ATTR macro to __DEFAULT_FN_ATTR llvm-svn: 241065
2015-06-30 21:36:19 +08:00
static __inline__ __m256i __DEFAULT_FN_ATTRS
PR14964: intrinsic headers using non-reserved identifiers Several of the intrinsic headers were using plain non-reserved identifiers. C++11 17.6.4.3.2 [global.names] p1 reservers names containing a double begining with an underscore followed by an uppercase letter for any use. I think I got them all, but open to being corrected. For the most part I didn't bother updating function-like macro parameter names because I don't believe they're subject to any such collission - though some function-like macros already follow this convention (I didn't update them in part because the churn was more significant as several function-like macros use the double underscore prefixed version of the same name as a parameter in their implementation) llvm-svn: 172666
2013-01-17 07:08:36 +08:00
_mm256_sll_epi32(__m256i __a, __m128i __count)
More AVX2 intrinsics for shift, psign, some shuffles, and psadbw. llvm-svn: 147236
2011-12-24 11:28:57 +08:00
{
PR14964: intrinsic headers using non-reserved identifiers Several of the intrinsic headers were using plain non-reserved identifiers. C++11 17.6.4.3.2 [global.names] p1 reservers names containing a double begining with an underscore followed by an uppercase letter for any use. I think I got them all, but open to being corrected. For the most part I didn't bother updating function-like macro parameter names because I don't believe they're subject to any such collission - though some function-like macros already follow this convention (I didn't update them in part because the churn was more significant as several function-like macros use the double underscore prefixed version of the same name as a parameter in their implementation) llvm-svn: 172666
2013-01-17 07:08:36 +08:00
return (__m256i)__builtin_ia32_pslld256((__v8si)__a, (__v4si)__count);
More AVX2 intrinsics for shift, psign, some shuffles, and psadbw. llvm-svn: 147236
2011-12-24 11:28:57 +08:00
}
[X86] Rename DEFAULT_FN_ATTR macro to __DEFAULT_FN_ATTR llvm-svn: 241065
2015-06-30 21:36:19 +08:00
static __inline__ __m256i __DEFAULT_FN_ATTRS
PR14964: intrinsic headers using non-reserved identifiers Several of the intrinsic headers were using plain non-reserved identifiers. C++11 17.6.4.3.2 [global.names] p1 reservers names containing a double begining with an underscore followed by an uppercase letter for any use. I think I got them all, but open to being corrected. For the most part I didn't bother updating function-like macro parameter names because I don't believe they're subject to any such collission - though some function-like macros already follow this convention (I didn't update them in part because the churn was more significant as several function-like macros use the double underscore prefixed version of the same name as a parameter in their implementation) llvm-svn: 172666
2013-01-17 07:08:36 +08:00
_mm256_slli_epi64(__m256i __a, int __count)
More AVX2 intrinsics for shift, psign, some shuffles, and psadbw. llvm-svn: 147236
2011-12-24 11:28:57 +08:00
{
[X86] Add typecasts to remove most assumptions about what __m128i/__m256i is defined as. Add similar typecasts for the fp types as well. llvm-svn: 269632
2016-05-16 14:38:42 +08:00
return __builtin_ia32_psllqi256((__v4di)__a, __count);
More AVX2 intrinsics for shift, psign, some shuffles, and psadbw. llvm-svn: 147236
2011-12-24 11:28:57 +08:00
}
[X86] Rename DEFAULT_FN_ATTR macro to __DEFAULT_FN_ATTR llvm-svn: 241065
2015-06-30 21:36:19 +08:00
static __inline__ __m256i __DEFAULT_FN_ATTRS
PR14964: intrinsic headers using non-reserved identifiers Several of the intrinsic headers were using plain non-reserved identifiers. C++11 17.6.4.3.2 [global.names] p1 reservers names containing a double begining with an underscore followed by an uppercase letter for any use. I think I got them all, but open to being corrected. For the most part I didn't bother updating function-like macro parameter names because I don't believe they're subject to any such collission - though some function-like macros already follow this convention (I didn't update them in part because the churn was more significant as several function-like macros use the double underscore prefixed version of the same name as a parameter in their implementation) llvm-svn: 172666
2013-01-17 07:08:36 +08:00
_mm256_sll_epi64(__m256i __a, __m128i __count)
More AVX2 intrinsics for shift, psign, some shuffles, and psadbw. llvm-svn: 147236
2011-12-24 11:28:57 +08:00
{
[X86] Add typecasts to remove most assumptions about what __m128i/__m256i is defined as. Add similar typecasts for the fp types as well. llvm-svn: 269632
2016-05-16 14:38:42 +08:00
return __builtin_ia32_psllq256((__v4di)__a, __count);
More AVX2 intrinsics for shift, psign, some shuffles, and psadbw. llvm-svn: 147236
2011-12-24 11:28:57 +08:00
}
[X86] Rename DEFAULT_FN_ATTR macro to __DEFAULT_FN_ATTR llvm-svn: 241065
2015-06-30 21:36:19 +08:00
static __inline__ __m256i __DEFAULT_FN_ATTRS
PR14964: intrinsic headers using non-reserved identifiers Several of the intrinsic headers were using plain non-reserved identifiers. C++11 17.6.4.3.2 [global.names] p1 reservers names containing a double begining with an underscore followed by an uppercase letter for any use. I think I got them all, but open to being corrected. For the most part I didn't bother updating function-like macro parameter names because I don't believe they're subject to any such collission - though some function-like macros already follow this convention (I didn't update them in part because the churn was more significant as several function-like macros use the double underscore prefixed version of the same name as a parameter in their implementation) llvm-svn: 172666
2013-01-17 07:08:36 +08:00
_mm256_srai_epi16(__m256i __a, int __count)
More AVX2 intrinsics for shift, psign, some shuffles, and psadbw. llvm-svn: 147236
2011-12-24 11:28:57 +08:00
{
PR14964: intrinsic headers using non-reserved identifiers Several of the intrinsic headers were using plain non-reserved identifiers. C++11 17.6.4.3.2 [global.names] p1 reservers names containing a double begining with an underscore followed by an uppercase letter for any use. I think I got them all, but open to being corrected. For the most part I didn't bother updating function-like macro parameter names because I don't believe they're subject to any such collission - though some function-like macros already follow this convention (I didn't update them in part because the churn was more significant as several function-like macros use the double underscore prefixed version of the same name as a parameter in their implementation) llvm-svn: 172666
2013-01-17 07:08:36 +08:00
return (__m256i)__builtin_ia32_psrawi256((__v16hi)__a, __count);
More AVX2 intrinsics for shift, psign, some shuffles, and psadbw. llvm-svn: 147236
2011-12-24 11:28:57 +08:00
}
[X86] Rename DEFAULT_FN_ATTR macro to __DEFAULT_FN_ATTR llvm-svn: 241065
2015-06-30 21:36:19 +08:00
static __inline__ __m256i __DEFAULT_FN_ATTRS
PR14964: intrinsic headers using non-reserved identifiers Several of the intrinsic headers were using plain non-reserved identifiers. C++11 17.6.4.3.2 [global.names] p1 reservers names containing a double begining with an underscore followed by an uppercase letter for any use. I think I got them all, but open to being corrected. For the most part I didn't bother updating function-like macro parameter names because I don't believe they're subject to any such collission - though some function-like macros already follow this convention (I didn't update them in part because the churn was more significant as several function-like macros use the double underscore prefixed version of the same name as a parameter in their implementation) llvm-svn: 172666
2013-01-17 07:08:36 +08:00
_mm256_sra_epi16(__m256i __a, __m128i __count)
More AVX2 intrinsics for shift, psign, some shuffles, and psadbw. llvm-svn: 147236
2011-12-24 11:28:57 +08:00
{
PR14964: intrinsic headers using non-reserved identifiers Several of the intrinsic headers were using plain non-reserved identifiers. C++11 17.6.4.3.2 [global.names] p1 reservers names containing a double begining with an underscore followed by an uppercase letter for any use. I think I got them all, but open to being corrected. For the most part I didn't bother updating function-like macro parameter names because I don't believe they're subject to any such collission - though some function-like macros already follow this convention (I didn't update them in part because the churn was more significant as several function-like macros use the double underscore prefixed version of the same name as a parameter in their implementation) llvm-svn: 172666
2013-01-17 07:08:36 +08:00
return (__m256i)__builtin_ia32_psraw256((__v16hi)__a, (__v8hi)__count);
More AVX2 intrinsics for shift, psign, some shuffles, and psadbw. llvm-svn: 147236
2011-12-24 11:28:57 +08:00
}
[X86] Rename DEFAULT_FN_ATTR macro to __DEFAULT_FN_ATTR llvm-svn: 241065
2015-06-30 21:36:19 +08:00
static __inline__ __m256i __DEFAULT_FN_ATTRS
PR14964: intrinsic headers using non-reserved identifiers Several of the intrinsic headers were using plain non-reserved identifiers. C++11 17.6.4.3.2 [global.names] p1 reservers names containing a double begining with an underscore followed by an uppercase letter for any use. I think I got them all, but open to being corrected. For the most part I didn't bother updating function-like macro parameter names because I don't believe they're subject to any such collission - though some function-like macros already follow this convention (I didn't update them in part because the churn was more significant as several function-like macros use the double underscore prefixed version of the same name as a parameter in their implementation) llvm-svn: 172666
2013-01-17 07:08:36 +08:00
_mm256_srai_epi32(__m256i __a, int __count)
More AVX2 intrinsics for shift, psign, some shuffles, and psadbw. llvm-svn: 147236
2011-12-24 11:28:57 +08:00
{
PR14964: intrinsic headers using non-reserved identifiers Several of the intrinsic headers were using plain non-reserved identifiers. C++11 17.6.4.3.2 [global.names] p1 reservers names containing a double begining with an underscore followed by an uppercase letter for any use. I think I got them all, but open to being corrected. For the most part I didn't bother updating function-like macro parameter names because I don't believe they're subject to any such collission - though some function-like macros already follow this convention (I didn't update them in part because the churn was more significant as several function-like macros use the double underscore prefixed version of the same name as a parameter in their implementation) llvm-svn: 172666
2013-01-17 07:08:36 +08:00
return (__m256i)__builtin_ia32_psradi256((__v8si)__a, __count);
More AVX2 intrinsics for shift, psign, some shuffles, and psadbw. llvm-svn: 147236
2011-12-24 11:28:57 +08:00
}
[X86] Rename DEFAULT_FN_ATTR macro to __DEFAULT_FN_ATTR llvm-svn: 241065
2015-06-30 21:36:19 +08:00
static __inline__ __m256i __DEFAULT_FN_ATTRS
PR14964: intrinsic headers using non-reserved identifiers Several of the intrinsic headers were using plain non-reserved identifiers. C++11 17.6.4.3.2 [global.names] p1 reservers names containing a double begining with an underscore followed by an uppercase letter for any use. I think I got them all, but open to being corrected. For the most part I didn't bother updating function-like macro parameter names because I don't believe they're subject to any such collission - though some function-like macros already follow this convention (I didn't update them in part because the churn was more significant as several function-like macros use the double underscore prefixed version of the same name as a parameter in their implementation) llvm-svn: 172666
2013-01-17 07:08:36 +08:00
_mm256_sra_epi32(__m256i __a, __m128i __count)
More AVX2 intrinsics for shift, psign, some shuffles, and psadbw. llvm-svn: 147236
2011-12-24 11:28:57 +08:00
{
PR14964: intrinsic headers using non-reserved identifiers Several of the intrinsic headers were using plain non-reserved identifiers. C++11 17.6.4.3.2 [global.names] p1 reservers names containing a double begining with an underscore followed by an uppercase letter for any use. I think I got them all, but open to being corrected. For the most part I didn't bother updating function-like macro parameter names because I don't believe they're subject to any such collission - though some function-like macros already follow this convention (I didn't update them in part because the churn was more significant as several function-like macros use the double underscore prefixed version of the same name as a parameter in their implementation) llvm-svn: 172666
2013-01-17 07:08:36 +08:00
return (__m256i)__builtin_ia32_psrad256((__v8si)__a, (__v4si)__count);
More AVX2 intrinsics for shift, psign, some shuffles, and psadbw. llvm-svn: 147236
2011-12-24 11:28:57 +08:00
}
[X86] Handle AVX2 pslldqi and psrldqi intrinsics shufflevector creation directly in the header file instead of in CGBuiltin.cpp. Simplify the sse2 equivalents as well. llvm-svn: 272246
2016-06-09 13:15:12 +08:00
#define _mm256_srli_si256(a, imm) __extension__ ({ \
[X86] Fix pslldq/psrldq intrinsics to not fail compilation with immediates larger than 16. This was accidentally broken in r272246. llvm-svn: 273775
2016-06-25 15:31:14 +08:00
(__m256i)__builtin_shufflevector( \
(__v32qi)(__m256i)(a), \
(__v32qi)_mm256_setzero_si256(), \
((char)(imm)&0xF0) ? 32 : (char)(imm) + ((char)(imm)>0xF ? 16 : 0), \
((char)(imm)&0xF0) ? 33 : (char)(imm) + ((char)(imm)>0xE ? 17 : 1), \
((char)(imm)&0xF0) ? 34 : (char)(imm) + ((char)(imm)>0xD ? 18 : 2), \
((char)(imm)&0xF0) ? 35 : (char)(imm) + ((char)(imm)>0xC ? 19 : 3), \
((char)(imm)&0xF0) ? 36 : (char)(imm) + ((char)(imm)>0xB ? 20 : 4), \
((char)(imm)&0xF0) ? 37 : (char)(imm) + ((char)(imm)>0xA ? 21 : 5), \
((char)(imm)&0xF0) ? 38 : (char)(imm) + ((char)(imm)>0x9 ? 22 : 6), \
((char)(imm)&0xF0) ? 39 : (char)(imm) + ((char)(imm)>0x8 ? 23 : 7), \
((char)(imm)&0xF0) ? 40 : (char)(imm) + ((char)(imm)>0x7 ? 24 : 8), \
((char)(imm)&0xF0) ? 41 : (char)(imm) + ((char)(imm)>0x6 ? 25 : 9), \
((char)(imm)&0xF0) ? 42 : (char)(imm) + ((char)(imm)>0x5 ? 26 : 10), \
((char)(imm)&0xF0) ? 43 : (char)(imm) + ((char)(imm)>0x4 ? 27 : 11), \
((char)(imm)&0xF0) ? 44 : (char)(imm) + ((char)(imm)>0x3 ? 28 : 12), \
((char)(imm)&0xF0) ? 45 : (char)(imm) + ((char)(imm)>0x2 ? 29 : 13), \
((char)(imm)&0xF0) ? 46 : (char)(imm) + ((char)(imm)>0x1 ? 30 : 14), \
((char)(imm)&0xF0) ? 47 : (char)(imm) + ((char)(imm)>0x0 ? 31 : 15), \
((char)(imm)&0xF0) ? 48 : (char)(imm) + ((char)(imm)>0xF ? 32 : 16), \
((char)(imm)&0xF0) ? 49 : (char)(imm) + ((char)(imm)>0xE ? 33 : 17), \
((char)(imm)&0xF0) ? 50 : (char)(imm) + ((char)(imm)>0xD ? 34 : 18), \
((char)(imm)&0xF0) ? 51 : (char)(imm) + ((char)(imm)>0xC ? 35 : 19), \
((char)(imm)&0xF0) ? 52 : (char)(imm) + ((char)(imm)>0xB ? 36 : 20), \
((char)(imm)&0xF0) ? 53 : (char)(imm) + ((char)(imm)>0xA ? 37 : 21), \
((char)(imm)&0xF0) ? 54 : (char)(imm) + ((char)(imm)>0x9 ? 38 : 22), \
((char)(imm)&0xF0) ? 55 : (char)(imm) + ((char)(imm)>0x8 ? 39 : 23), \
((char)(imm)&0xF0) ? 56 : (char)(imm) + ((char)(imm)>0x7 ? 40 : 24), \
((char)(imm)&0xF0) ? 57 : (char)(imm) + ((char)(imm)>0x6 ? 41 : 25), \
((char)(imm)&0xF0) ? 58 : (char)(imm) + ((char)(imm)>0x5 ? 42 : 26), \
((char)(imm)&0xF0) ? 59 : (char)(imm) + ((char)(imm)>0x4 ? 43 : 27), \
((char)(imm)&0xF0) ? 60 : (char)(imm) + ((char)(imm)>0x3 ? 44 : 28), \
((char)(imm)&0xF0) ? 61 : (char)(imm) + ((char)(imm)>0x2 ? 45 : 29), \
((char)(imm)&0xF0) ? 62 : (char)(imm) + ((char)(imm)>0x1 ? 46 : 30), \
((char)(imm)&0xF0) ? 63 : (char)(imm) + ((char)(imm)>0x0 ? 47 : 31)); })
More AVX2 intrinsics for shift, psign, some shuffles, and psadbw. llvm-svn: 147236
2011-12-24 11:28:57 +08:00
[X86] Added _mm256_bslli_epi128 and _mm256_bsrli_epi128. These two intrinsics are alternative names for _mm256_slli_si256 and _mm256_srli_si256, respectively. llvm-svn: 237693
2015-05-19 21:05:46 +08:00
#define _mm256_bsrli_epi128(a, count) _mm256_srli_si256((a), (count))
[X86] Rename DEFAULT_FN_ATTR macro to __DEFAULT_FN_ATTR llvm-svn: 241065
2015-06-30 21:36:19 +08:00
static __inline__ __m256i __DEFAULT_FN_ATTRS
PR14964: intrinsic headers using non-reserved identifiers Several of the intrinsic headers were using plain non-reserved identifiers. C++11 17.6.4.3.2 [global.names] p1 reservers names containing a double begining with an underscore followed by an uppercase letter for any use. I think I got them all, but open to being corrected. For the most part I didn't bother updating function-like macro parameter names because I don't believe they're subject to any such collission - though some function-like macros already follow this convention (I didn't update them in part because the churn was more significant as several function-like macros use the double underscore prefixed version of the same name as a parameter in their implementation) llvm-svn: 172666
2013-01-17 07:08:36 +08:00
_mm256_srli_epi16(__m256i __a, int __count)
More AVX2 intrinsics for shift, psign, some shuffles, and psadbw. llvm-svn: 147236
2011-12-24 11:28:57 +08:00
{
PR14964: intrinsic headers using non-reserved identifiers Several of the intrinsic headers were using plain non-reserved identifiers. C++11 17.6.4.3.2 [global.names] p1 reservers names containing a double begining with an underscore followed by an uppercase letter for any use. I think I got them all, but open to being corrected. For the most part I didn't bother updating function-like macro parameter names because I don't believe they're subject to any such collission - though some function-like macros already follow this convention (I didn't update them in part because the churn was more significant as several function-like macros use the double underscore prefixed version of the same name as a parameter in their implementation) llvm-svn: 172666
2013-01-17 07:08:36 +08:00
return (__m256i)__builtin_ia32_psrlwi256((__v16hi)__a, __count);
More AVX2 intrinsics for shift, psign, some shuffles, and psadbw. llvm-svn: 147236
2011-12-24 11:28:57 +08:00
}
[X86] Rename DEFAULT_FN_ATTR macro to __DEFAULT_FN_ATTR llvm-svn: 241065
2015-06-30 21:36:19 +08:00
static __inline__ __m256i __DEFAULT_FN_ATTRS
PR14964: intrinsic headers using non-reserved identifiers Several of the intrinsic headers were using plain non-reserved identifiers. C++11 17.6.4.3.2 [global.names] p1 reservers names containing a double begining with an underscore followed by an uppercase letter for any use. I think I got them all, but open to being corrected. For the most part I didn't bother updating function-like macro parameter names because I don't believe they're subject to any such collission - though some function-like macros already follow this convention (I didn't update them in part because the churn was more significant as several function-like macros use the double underscore prefixed version of the same name as a parameter in their implementation) llvm-svn: 172666
2013-01-17 07:08:36 +08:00
_mm256_srl_epi16(__m256i __a, __m128i __count)
More AVX2 intrinsics for shift, psign, some shuffles, and psadbw. llvm-svn: 147236
2011-12-24 11:28:57 +08:00
{
PR14964: intrinsic headers using non-reserved identifiers Several of the intrinsic headers were using plain non-reserved identifiers. C++11 17.6.4.3.2 [global.names] p1 reservers names containing a double begining with an underscore followed by an uppercase letter for any use. I think I got them all, but open to being corrected. For the most part I didn't bother updating function-like macro parameter names because I don't believe they're subject to any such collission - though some function-like macros already follow this convention (I didn't update them in part because the churn was more significant as several function-like macros use the double underscore prefixed version of the same name as a parameter in their implementation) llvm-svn: 172666
2013-01-17 07:08:36 +08:00
return (__m256i)__builtin_ia32_psrlw256((__v16hi)__a, (__v8hi)__count);
More AVX2 intrinsics for shift, psign, some shuffles, and psadbw. llvm-svn: 147236
2011-12-24 11:28:57 +08:00
}
[X86] Rename DEFAULT_FN_ATTR macro to __DEFAULT_FN_ATTR llvm-svn: 241065
2015-06-30 21:36:19 +08:00
static __inline__ __m256i __DEFAULT_FN_ATTRS
PR14964: intrinsic headers using non-reserved identifiers Several of the intrinsic headers were using plain non-reserved identifiers. C++11 17.6.4.3.2 [global.names] p1 reservers names containing a double begining with an underscore followed by an uppercase letter for any use. I think I got them all, but open to being corrected. For the most part I didn't bother updating function-like macro parameter names because I don't believe they're subject to any such collission - though some function-like macros already follow this convention (I didn't update them in part because the churn was more significant as several function-like macros use the double underscore prefixed version of the same name as a parameter in their implementation) llvm-svn: 172666
2013-01-17 07:08:36 +08:00
_mm256_srli_epi32(__m256i __a, int __count)
More AVX2 intrinsics for shift, psign, some shuffles, and psadbw. llvm-svn: 147236
2011-12-24 11:28:57 +08:00
{
PR14964: intrinsic headers using non-reserved identifiers Several of the intrinsic headers were using plain non-reserved identifiers. C++11 17.6.4.3.2 [global.names] p1 reservers names containing a double begining with an underscore followed by an uppercase letter for any use. I think I got them all, but open to being corrected. For the most part I didn't bother updating function-like macro parameter names because I don't believe they're subject to any such collission - though some function-like macros already follow this convention (I didn't update them in part because the churn was more significant as several function-like macros use the double underscore prefixed version of the same name as a parameter in their implementation) llvm-svn: 172666
2013-01-17 07:08:36 +08:00
return (__m256i)__builtin_ia32_psrldi256((__v8si)__a, __count);
More AVX2 intrinsics for shift, psign, some shuffles, and psadbw. llvm-svn: 147236
2011-12-24 11:28:57 +08:00
}
[X86] Rename DEFAULT_FN_ATTR macro to __DEFAULT_FN_ATTR llvm-svn: 241065
2015-06-30 21:36:19 +08:00
static __inline__ __m256i __DEFAULT_FN_ATTRS
PR14964: intrinsic headers using non-reserved identifiers Several of the intrinsic headers were using plain non-reserved identifiers. C++11 17.6.4.3.2 [global.names] p1 reservers names containing a double begining with an underscore followed by an uppercase letter for any use. I think I got them all, but open to being corrected. For the most part I didn't bother updating function-like macro parameter names because I don't believe they're subject to any such collission - though some function-like macros already follow this convention (I didn't update them in part because the churn was more significant as several function-like macros use the double underscore prefixed version of the same name as a parameter in their implementation) llvm-svn: 172666
2013-01-17 07:08:36 +08:00
_mm256_srl_epi32(__m256i __a, __m128i __count)
More AVX2 intrinsics for shift, psign, some shuffles, and psadbw. llvm-svn: 147236
2011-12-24 11:28:57 +08:00
{
PR14964: intrinsic headers using non-reserved identifiers Several of the intrinsic headers were using plain non-reserved identifiers. C++11 17.6.4.3.2 [global.names] p1 reservers names containing a double begining with an underscore followed by an uppercase letter for any use. I think I got them all, but open to being corrected. For the most part I didn't bother updating function-like macro parameter names because I don't believe they're subject to any such collission - though some function-like macros already follow this convention (I didn't update them in part because the churn was more significant as several function-like macros use the double underscore prefixed version of the same name as a parameter in their implementation) llvm-svn: 172666
2013-01-17 07:08:36 +08:00
return (__m256i)__builtin_ia32_psrld256((__v8si)__a, (__v4si)__count);
More AVX2 intrinsics for shift, psign, some shuffles, and psadbw. llvm-svn: 147236
2011-12-24 11:28:57 +08:00
}
[X86] Rename DEFAULT_FN_ATTR macro to __DEFAULT_FN_ATTR llvm-svn: 241065
2015-06-30 21:36:19 +08:00
static __inline__ __m256i __DEFAULT_FN_ATTRS
PR14964: intrinsic headers using non-reserved identifiers Several of the intrinsic headers were using plain non-reserved identifiers. C++11 17.6.4.3.2 [global.names] p1 reservers names containing a double begining with an underscore followed by an uppercase letter for any use. I think I got them all, but open to being corrected. For the most part I didn't bother updating function-like macro parameter names because I don't believe they're subject to any such collission - though some function-like macros already follow this convention (I didn't update them in part because the churn was more significant as several function-like macros use the double underscore prefixed version of the same name as a parameter in their implementation) llvm-svn: 172666
2013-01-17 07:08:36 +08:00
_mm256_srli_epi64(__m256i __a, int __count)
More AVX2 intrinsics for shift, psign, some shuffles, and psadbw. llvm-svn: 147236
2011-12-24 11:28:57 +08:00
{
[X86] Add typecasts to remove most assumptions about what __m128i/__m256i is defined as. Add similar typecasts for the fp types as well. llvm-svn: 269632
2016-05-16 14:38:42 +08:00
return __builtin_ia32_psrlqi256((__v4di)__a, __count);
More AVX2 intrinsics for shift, psign, some shuffles, and psadbw. llvm-svn: 147236
2011-12-24 11:28:57 +08:00
}
[X86] Rename DEFAULT_FN_ATTR macro to __DEFAULT_FN_ATTR llvm-svn: 241065
2015-06-30 21:36:19 +08:00
static __inline__ __m256i __DEFAULT_FN_ATTRS
PR14964: intrinsic headers using non-reserved identifiers Several of the intrinsic headers were using plain non-reserved identifiers. C++11 17.6.4.3.2 [global.names] p1 reservers names containing a double begining with an underscore followed by an uppercase letter for any use. I think I got them all, but open to being corrected. For the most part I didn't bother updating function-like macro parameter names because I don't believe they're subject to any such collission - though some function-like macros already follow this convention (I didn't update them in part because the churn was more significant as several function-like macros use the double underscore prefixed version of the same name as a parameter in their implementation) llvm-svn: 172666
2013-01-17 07:08:36 +08:00
_mm256_srl_epi64(__m256i __a, __m128i __count)
More AVX2 intrinsics for shift, psign, some shuffles, and psadbw. llvm-svn: 147236
2011-12-24 11:28:57 +08:00
{
[X86] Add typecasts to remove most assumptions about what __m128i/__m256i is defined as. Add similar typecasts for the fp types as well. llvm-svn: 269632
2016-05-16 14:38:42 +08:00
return __builtin_ia32_psrlq256((__v4di)__a, __count);
More AVX2 intrinsics for shift, psign, some shuffles, and psadbw. llvm-svn: 147236
2011-12-24 11:28:57 +08:00
}
[X86] Rename DEFAULT_FN_ATTR macro to __DEFAULT_FN_ATTR llvm-svn: 241065
2015-06-30 21:36:19 +08:00
static __inline__ __m256i __DEFAULT_FN_ATTRS
PR14964: intrinsic headers using non-reserved identifiers Several of the intrinsic headers were using plain non-reserved identifiers. C++11 17.6.4.3.2 [global.names] p1 reservers names containing a double begining with an underscore followed by an uppercase letter for any use. I think I got them all, but open to being corrected. For the most part I didn't bother updating function-like macro parameter names because I don't believe they're subject to any such collission - though some function-like macros already follow this convention (I didn't update them in part because the churn was more significant as several function-like macros use the double underscore prefixed version of the same name as a parameter in their implementation) llvm-svn: 172666
2013-01-17 07:08:36 +08:00
_mm256_sub_epi8(__m256i __a, __m256i __b)
Begin adding AVX2 intrinsics. Necessitated increasing the number of bits used to store builtinID when serializing identifier table. llvm-svn: 146855
2011-12-19 13:04:33 +08:00
{
[X86] Use unsigned types for vector arithmetic in intrinsics to avoid undefined behavior for signed integer overflow. This is really only needed for addition, subtraction, and multiplication, but I did the bitwise ops too for overall consistency. Clang currently doesn't set NSW for signed vector operations so the undefined behavior shouldn't happen today. llvm-svn: 271778
2016-06-04 13:43:41 +08:00
return (__m256i)((__v32qu)__a - (__v32qu)__b);
Begin adding AVX2 intrinsics. Necessitated increasing the number of bits used to store builtinID when serializing identifier table. llvm-svn: 146855
2011-12-19 13:04:33 +08:00
}
[X86] Rename DEFAULT_FN_ATTR macro to __DEFAULT_FN_ATTR llvm-svn: 241065
2015-06-30 21:36:19 +08:00
static __inline__ __m256i __DEFAULT_FN_ATTRS
PR14964: intrinsic headers using non-reserved identifiers Several of the intrinsic headers were using plain non-reserved identifiers. C++11 17.6.4.3.2 [global.names] p1 reservers names containing a double begining with an underscore followed by an uppercase letter for any use. I think I got them all, but open to being corrected. For the most part I didn't bother updating function-like macro parameter names because I don't believe they're subject to any such collission - though some function-like macros already follow this convention (I didn't update them in part because the churn was more significant as several function-like macros use the double underscore prefixed version of the same name as a parameter in their implementation) llvm-svn: 172666
2013-01-17 07:08:36 +08:00
_mm256_sub_epi16(__m256i __a, __m256i __b)
Begin adding AVX2 intrinsics. Necessitated increasing the number of bits used to store builtinID when serializing identifier table. llvm-svn: 146855
2011-12-19 13:04:33 +08:00
{
[X86] Use unsigned types for vector arithmetic in intrinsics to avoid undefined behavior for signed integer overflow. This is really only needed for addition, subtraction, and multiplication, but I did the bitwise ops too for overall consistency. Clang currently doesn't set NSW for signed vector operations so the undefined behavior shouldn't happen today. llvm-svn: 271778
2016-06-04 13:43:41 +08:00
return (__m256i)((__v16hu)__a - (__v16hu)__b);
Begin adding AVX2 intrinsics. Necessitated increasing the number of bits used to store builtinID when serializing identifier table. llvm-svn: 146855
2011-12-19 13:04:33 +08:00
}
[X86] Rename DEFAULT_FN_ATTR macro to __DEFAULT_FN_ATTR llvm-svn: 241065
2015-06-30 21:36:19 +08:00
static __inline__ __m256i __DEFAULT_FN_ATTRS
PR14964: intrinsic headers using non-reserved identifiers Several of the intrinsic headers were using plain non-reserved identifiers. C++11 17.6.4.3.2 [global.names] p1 reservers names containing a double begining with an underscore followed by an uppercase letter for any use. I think I got them all, but open to being corrected. For the most part I didn't bother updating function-like macro parameter names because I don't believe they're subject to any such collission - though some function-like macros already follow this convention (I didn't update them in part because the churn was more significant as several function-like macros use the double underscore prefixed version of the same name as a parameter in their implementation) llvm-svn: 172666
2013-01-17 07:08:36 +08:00
_mm256_sub_epi32(__m256i __a, __m256i __b)
Begin adding AVX2 intrinsics. Necessitated increasing the number of bits used to store builtinID when serializing identifier table. llvm-svn: 146855
2011-12-19 13:04:33 +08:00
{
[X86] Use unsigned types for vector arithmetic in intrinsics to avoid undefined behavior for signed integer overflow. This is really only needed for addition, subtraction, and multiplication, but I did the bitwise ops too for overall consistency. Clang currently doesn't set NSW for signed vector operations so the undefined behavior shouldn't happen today. llvm-svn: 271778
2016-06-04 13:43:41 +08:00
return (__m256i)((__v8su)__a - (__v8su)__b);
Begin adding AVX2 intrinsics. Necessitated increasing the number of bits used to store builtinID when serializing identifier table. llvm-svn: 146855
2011-12-19 13:04:33 +08:00
}
[X86] Rename DEFAULT_FN_ATTR macro to __DEFAULT_FN_ATTR llvm-svn: 241065
2015-06-30 21:36:19 +08:00
static __inline__ __m256i __DEFAULT_FN_ATTRS
PR14964: intrinsic headers using non-reserved identifiers Several of the intrinsic headers were using plain non-reserved identifiers. C++11 17.6.4.3.2 [global.names] p1 reservers names containing a double begining with an underscore followed by an uppercase letter for any use. I think I got them all, but open to being corrected. For the most part I didn't bother updating function-like macro parameter names because I don't believe they're subject to any such collission - though some function-like macros already follow this convention (I didn't update them in part because the churn was more significant as several function-like macros use the double underscore prefixed version of the same name as a parameter in their implementation) llvm-svn: 172666
2013-01-17 07:08:36 +08:00
_mm256_sub_epi64(__m256i __a, __m256i __b)
Begin adding AVX2 intrinsics. Necessitated increasing the number of bits used to store builtinID when serializing identifier table. llvm-svn: 146855
2011-12-19 13:04:33 +08:00
{
[X86] Use unsigned types for vector arithmetic in intrinsics to avoid undefined behavior for signed integer overflow. This is really only needed for addition, subtraction, and multiplication, but I did the bitwise ops too for overall consistency. Clang currently doesn't set NSW for signed vector operations so the undefined behavior shouldn't happen today. llvm-svn: 271778
2016-06-04 13:43:41 +08:00
return (__m256i)((__v4du)__a - (__v4du)__b);
Begin adding AVX2 intrinsics. Necessitated increasing the number of bits used to store builtinID when serializing identifier table. llvm-svn: 146855
2011-12-19 13:04:33 +08:00
}
More AVX2 intrinsic support including saturating add/sub and palignr. llvm-svn: 146857
2011-12-19 15:03:25 +08:00
[X86] Rename DEFAULT_FN_ATTR macro to __DEFAULT_FN_ATTR llvm-svn: 241065
2015-06-30 21:36:19 +08:00
static __inline__ __m256i __DEFAULT_FN_ATTRS
PR14964: intrinsic headers using non-reserved identifiers Several of the intrinsic headers were using plain non-reserved identifiers. C++11 17.6.4.3.2 [global.names] p1 reservers names containing a double begining with an underscore followed by an uppercase letter for any use. I think I got them all, but open to being corrected. For the most part I didn't bother updating function-like macro parameter names because I don't believe they're subject to any such collission - though some function-like macros already follow this convention (I didn't update them in part because the churn was more significant as several function-like macros use the double underscore prefixed version of the same name as a parameter in their implementation) llvm-svn: 172666
2013-01-17 07:08:36 +08:00
_mm256_subs_epi8(__m256i __a, __m256i __b)
More AVX2 intrinsic support including saturating add/sub and palignr. llvm-svn: 146857
2011-12-19 15:03:25 +08:00
{
PR14964: intrinsic headers using non-reserved identifiers Several of the intrinsic headers were using plain non-reserved identifiers. C++11 17.6.4.3.2 [global.names] p1 reservers names containing a double begining with an underscore followed by an uppercase letter for any use. I think I got them all, but open to being corrected. For the most part I didn't bother updating function-like macro parameter names because I don't believe they're subject to any such collission - though some function-like macros already follow this convention (I didn't update them in part because the churn was more significant as several function-like macros use the double underscore prefixed version of the same name as a parameter in their implementation) llvm-svn: 172666
2013-01-17 07:08:36 +08:00
return (__m256i)__builtin_ia32_psubsb256((__v32qi)__a, (__v32qi)__b);
More AVX2 intrinsic support including saturating add/sub and palignr. llvm-svn: 146857
2011-12-19 15:03:25 +08:00
}
[X86] Rename DEFAULT_FN_ATTR macro to __DEFAULT_FN_ATTR llvm-svn: 241065
2015-06-30 21:36:19 +08:00
static __inline__ __m256i __DEFAULT_FN_ATTRS
PR14964: intrinsic headers using non-reserved identifiers Several of the intrinsic headers were using plain non-reserved identifiers. C++11 17.6.4.3.2 [global.names] p1 reservers names containing a double begining with an underscore followed by an uppercase letter for any use. I think I got them all, but open to being corrected. For the most part I didn't bother updating function-like macro parameter names because I don't believe they're subject to any such collission - though some function-like macros already follow this convention (I didn't update them in part because the churn was more significant as several function-like macros use the double underscore prefixed version of the same name as a parameter in their implementation) llvm-svn: 172666
2013-01-17 07:08:36 +08:00
_mm256_subs_epi16(__m256i __a, __m256i __b)
More AVX2 intrinsic support including saturating add/sub and palignr. llvm-svn: 146857
2011-12-19 15:03:25 +08:00
{
PR14964: intrinsic headers using non-reserved identifiers Several of the intrinsic headers were using plain non-reserved identifiers. C++11 17.6.4.3.2 [global.names] p1 reservers names containing a double begining with an underscore followed by an uppercase letter for any use. I think I got them all, but open to being corrected. For the most part I didn't bother updating function-like macro parameter names because I don't believe they're subject to any such collission - though some function-like macros already follow this convention (I didn't update them in part because the churn was more significant as several function-like macros use the double underscore prefixed version of the same name as a parameter in their implementation) llvm-svn: 172666
2013-01-17 07:08:36 +08:00
return (__m256i)__builtin_ia32_psubsw256((__v16hi)__a, (__v16hi)__b);
More AVX2 intrinsic support including saturating add/sub and palignr. llvm-svn: 146857
2011-12-19 15:03:25 +08:00
}
[X86] Rename DEFAULT_FN_ATTR macro to __DEFAULT_FN_ATTR llvm-svn: 241065
2015-06-30 21:36:19 +08:00
static __inline__ __m256i __DEFAULT_FN_ATTRS
PR14964: intrinsic headers using non-reserved identifiers Several of the intrinsic headers were using plain non-reserved identifiers. C++11 17.6.4.3.2 [global.names] p1 reservers names containing a double begining with an underscore followed by an uppercase letter for any use. I think I got them all, but open to being corrected. For the most part I didn't bother updating function-like macro parameter names because I don't believe they're subject to any such collission - though some function-like macros already follow this convention (I didn't update them in part because the churn was more significant as several function-like macros use the double underscore prefixed version of the same name as a parameter in their implementation) llvm-svn: 172666
2013-01-17 07:08:36 +08:00
_mm256_subs_epu8(__m256i __a, __m256i __b)
More AVX2 intrinsic support including saturating add/sub and palignr. llvm-svn: 146857
2011-12-19 15:03:25 +08:00
{
PR14964: intrinsic headers using non-reserved identifiers Several of the intrinsic headers were using plain non-reserved identifiers. C++11 17.6.4.3.2 [global.names] p1 reservers names containing a double begining with an underscore followed by an uppercase letter for any use. I think I got them all, but open to being corrected. For the most part I didn't bother updating function-like macro parameter names because I don't believe they're subject to any such collission - though some function-like macros already follow this convention (I didn't update them in part because the churn was more significant as several function-like macros use the double underscore prefixed version of the same name as a parameter in their implementation) llvm-svn: 172666
2013-01-17 07:08:36 +08:00
return (__m256i)__builtin_ia32_psubusb256((__v32qi)__a, (__v32qi)__b);
More AVX2 intrinsic support including saturating add/sub and palignr. llvm-svn: 146857
2011-12-19 15:03:25 +08:00
}
[X86] Rename DEFAULT_FN_ATTR macro to __DEFAULT_FN_ATTR llvm-svn: 241065
2015-06-30 21:36:19 +08:00
static __inline__ __m256i __DEFAULT_FN_ATTRS
PR14964: intrinsic headers using non-reserved identifiers Several of the intrinsic headers were using plain non-reserved identifiers. C++11 17.6.4.3.2 [global.names] p1 reservers names containing a double begining with an underscore followed by an uppercase letter for any use. I think I got them all, but open to being corrected. For the most part I didn't bother updating function-like macro parameter names because I don't believe they're subject to any such collission - though some function-like macros already follow this convention (I didn't update them in part because the churn was more significant as several function-like macros use the double underscore prefixed version of the same name as a parameter in their implementation) llvm-svn: 172666
2013-01-17 07:08:36 +08:00
_mm256_subs_epu16(__m256i __a, __m256i __b)
More AVX2 intrinsic support including saturating add/sub and palignr. llvm-svn: 146857
2011-12-19 15:03:25 +08:00
{
PR14964: intrinsic headers using non-reserved identifiers Several of the intrinsic headers were using plain non-reserved identifiers. C++11 17.6.4.3.2 [global.names] p1 reservers names containing a double begining with an underscore followed by an uppercase letter for any use. I think I got them all, but open to being corrected. For the most part I didn't bother updating function-like macro parameter names because I don't believe they're subject to any such collission - though some function-like macros already follow this convention (I didn't update them in part because the churn was more significant as several function-like macros use the double underscore prefixed version of the same name as a parameter in their implementation) llvm-svn: 172666
2013-01-17 07:08:36 +08:00
return (__m256i)__builtin_ia32_psubusw256((__v16hi)__a, (__v16hi)__b);
More AVX2 intrinsic support including saturating add/sub and palignr. llvm-svn: 146857
2011-12-19 15:03:25 +08:00
}
[X86] Rename DEFAULT_FN_ATTR macro to __DEFAULT_FN_ATTR llvm-svn: 241065
2015-06-30 21:36:19 +08:00
static __inline__ __m256i __DEFAULT_FN_ATTRS
PR14964: intrinsic headers using non-reserved identifiers Several of the intrinsic headers were using plain non-reserved identifiers. C++11 17.6.4.3.2 [global.names] p1 reservers names containing a double begining with an underscore followed by an uppercase letter for any use. I think I got them all, but open to being corrected. For the most part I didn't bother updating function-like macro parameter names because I don't believe they're subject to any such collission - though some function-like macros already follow this convention (I didn't update them in part because the churn was more significant as several function-like macros use the double underscore prefixed version of the same name as a parameter in their implementation) llvm-svn: 172666
2013-01-17 07:08:36 +08:00
_mm256_unpackhi_epi8(__m256i __a, __m256i __b)
Intrinsics for AVX2 unpack instructions. llvm-svn: 147237
2011-12-24 11:58:43 +08:00
{
PR14964: intrinsic headers using non-reserved identifiers Several of the intrinsic headers were using plain non-reserved identifiers. C++11 17.6.4.3.2 [global.names] p1 reservers names containing a double begining with an underscore followed by an uppercase letter for any use. I think I got them all, but open to being corrected. For the most part I didn't bother updating function-like macro parameter names because I don't believe they're subject to any such collission - though some function-like macros already follow this convention (I didn't update them in part because the churn was more significant as several function-like macros use the double underscore prefixed version of the same name as a parameter in their implementation) llvm-svn: 172666
2013-01-17 07:08:36 +08:00
return (__m256i)__builtin_shufflevector((__v32qi)__a, (__v32qi)__b, 8, 32+8, 9, 32+9, 10, 32+10, 11, 32+11, 12, 32+12, 13, 32+13, 14, 32+14, 15, 32+15, 24, 32+24, 25, 32+25, 26, 32+26, 27, 32+27, 28, 32+28, 29, 32+29, 30, 32+30, 31, 32+31);
Intrinsics for AVX2 unpack instructions. llvm-svn: 147237
2011-12-24 11:58:43 +08:00
}
[X86] Rename DEFAULT_FN_ATTR macro to __DEFAULT_FN_ATTR llvm-svn: 241065
2015-06-30 21:36:19 +08:00
static __inline__ __m256i __DEFAULT_FN_ATTRS
PR14964: intrinsic headers using non-reserved identifiers Several of the intrinsic headers were using plain non-reserved identifiers. C++11 17.6.4.3.2 [global.names] p1 reservers names containing a double begining with an underscore followed by an uppercase letter for any use. I think I got them all, but open to being corrected. For the most part I didn't bother updating function-like macro parameter names because I don't believe they're subject to any such collission - though some function-like macros already follow this convention (I didn't update them in part because the churn was more significant as several function-like macros use the double underscore prefixed version of the same name as a parameter in their implementation) llvm-svn: 172666
2013-01-17 07:08:36 +08:00
_mm256_unpackhi_epi16(__m256i __a, __m256i __b)
Intrinsics for AVX2 unpack instructions. llvm-svn: 147237
2011-12-24 11:58:43 +08:00
{
PR14964: intrinsic headers using non-reserved identifiers Several of the intrinsic headers were using plain non-reserved identifiers. C++11 17.6.4.3.2 [global.names] p1 reservers names containing a double begining with an underscore followed by an uppercase letter for any use. I think I got them all, but open to being corrected. For the most part I didn't bother updating function-like macro parameter names because I don't believe they're subject to any such collission - though some function-like macros already follow this convention (I didn't update them in part because the churn was more significant as several function-like macros use the double underscore prefixed version of the same name as a parameter in their implementation) llvm-svn: 172666
2013-01-17 07:08:36 +08:00
return (__m256i)__builtin_shufflevector((__v16hi)__a, (__v16hi)__b, 4, 16+4, 5, 16+5, 6, 16+6, 7, 16+7, 12, 16+12, 13, 16+13, 14, 16+14, 15, 16+15);
Intrinsics for AVX2 unpack instructions. llvm-svn: 147237
2011-12-24 11:58:43 +08:00
}
[X86] Rename DEFAULT_FN_ATTR macro to __DEFAULT_FN_ATTR llvm-svn: 241065
2015-06-30 21:36:19 +08:00
static __inline__ __m256i __DEFAULT_FN_ATTRS
PR14964: intrinsic headers using non-reserved identifiers Several of the intrinsic headers were using plain non-reserved identifiers. C++11 17.6.4.3.2 [global.names] p1 reservers names containing a double begining with an underscore followed by an uppercase letter for any use. I think I got them all, but open to being corrected. For the most part I didn't bother updating function-like macro parameter names because I don't believe they're subject to any such collission - though some function-like macros already follow this convention (I didn't update them in part because the churn was more significant as several function-like macros use the double underscore prefixed version of the same name as a parameter in their implementation) llvm-svn: 172666
2013-01-17 07:08:36 +08:00
_mm256_unpackhi_epi32(__m256i __a, __m256i __b)
Intrinsics for AVX2 unpack instructions. llvm-svn: 147237
2011-12-24 11:58:43 +08:00
{
PR14964: intrinsic headers using non-reserved identifiers Several of the intrinsic headers were using plain non-reserved identifiers. C++11 17.6.4.3.2 [global.names] p1 reservers names containing a double begining with an underscore followed by an uppercase letter for any use. I think I got them all, but open to being corrected. For the most part I didn't bother updating function-like macro parameter names because I don't believe they're subject to any such collission - though some function-like macros already follow this convention (I didn't update them in part because the churn was more significant as several function-like macros use the double underscore prefixed version of the same name as a parameter in their implementation) llvm-svn: 172666
2013-01-17 07:08:36 +08:00
return (__m256i)__builtin_shufflevector((__v8si)__a, (__v8si)__b, 2, 8+2, 3, 8+3, 6, 8+6, 7, 8+7);
Intrinsics for AVX2 unpack instructions. llvm-svn: 147237
2011-12-24 11:58:43 +08:00
}
[X86] Rename DEFAULT_FN_ATTR macro to __DEFAULT_FN_ATTR llvm-svn: 241065
2015-06-30 21:36:19 +08:00
static __inline__ __m256i __DEFAULT_FN_ATTRS
PR14964: intrinsic headers using non-reserved identifiers Several of the intrinsic headers were using plain non-reserved identifiers. C++11 17.6.4.3.2 [global.names] p1 reservers names containing a double begining with an underscore followed by an uppercase letter for any use. I think I got them all, but open to being corrected. For the most part I didn't bother updating function-like macro parameter names because I don't believe they're subject to any such collission - though some function-like macros already follow this convention (I didn't update them in part because the churn was more significant as several function-like macros use the double underscore prefixed version of the same name as a parameter in their implementation) llvm-svn: 172666
2013-01-17 07:08:36 +08:00
_mm256_unpackhi_epi64(__m256i __a, __m256i __b)
Intrinsics for AVX2 unpack instructions. llvm-svn: 147237
2011-12-24 11:58:43 +08:00
{
[X86] Add typecasts to remove most assumptions about what __m128i/__m256i is defined as. Add similar typecasts for the fp types as well. llvm-svn: 269632
2016-05-16 14:38:42 +08:00
return (__m256i)__builtin_shufflevector((__v4di)__a, (__v4di)__b, 1, 4+1, 3, 4+3);
Intrinsics for AVX2 unpack instructions. llvm-svn: 147237
2011-12-24 11:58:43 +08:00
}
[X86] Rename DEFAULT_FN_ATTR macro to __DEFAULT_FN_ATTR llvm-svn: 241065
2015-06-30 21:36:19 +08:00
static __inline__ __m256i __DEFAULT_FN_ATTRS
PR14964: intrinsic headers using non-reserved identifiers Several of the intrinsic headers were using plain non-reserved identifiers. C++11 17.6.4.3.2 [global.names] p1 reservers names containing a double begining with an underscore followed by an uppercase letter for any use. I think I got them all, but open to being corrected. For the most part I didn't bother updating function-like macro parameter names because I don't believe they're subject to any such collission - though some function-like macros already follow this convention (I didn't update them in part because the churn was more significant as several function-like macros use the double underscore prefixed version of the same name as a parameter in their implementation) llvm-svn: 172666
2013-01-17 07:08:36 +08:00
_mm256_unpacklo_epi8(__m256i __a, __m256i __b)
Intrinsics for AVX2 unpack instructions. llvm-svn: 147237
2011-12-24 11:58:43 +08:00
{
PR14964: intrinsic headers using non-reserved identifiers Several of the intrinsic headers were using plain non-reserved identifiers. C++11 17.6.4.3.2 [global.names] p1 reservers names containing a double begining with an underscore followed by an uppercase letter for any use. I think I got them all, but open to being corrected. For the most part I didn't bother updating function-like macro parameter names because I don't believe they're subject to any such collission - though some function-like macros already follow this convention (I didn't update them in part because the churn was more significant as several function-like macros use the double underscore prefixed version of the same name as a parameter in their implementation) llvm-svn: 172666
2013-01-17 07:08:36 +08:00
return (__m256i)__builtin_shufflevector((__v32qi)__a, (__v32qi)__b, 0, 32+0, 1, 32+1, 2, 32+2, 3, 32+3, 4, 32+4, 5, 32+5, 6, 32+6, 7, 32+7, 16, 32+16, 17, 32+17, 18, 32+18, 19, 32+19, 20, 32+20, 21, 32+21, 22, 32+22, 23, 32+23);
Intrinsics for AVX2 unpack instructions. llvm-svn: 147237
2011-12-24 11:58:43 +08:00
}
[X86] Rename DEFAULT_FN_ATTR macro to __DEFAULT_FN_ATTR llvm-svn: 241065
2015-06-30 21:36:19 +08:00
static __inline__ __m256i __DEFAULT_FN_ATTRS
PR14964: intrinsic headers using non-reserved identifiers Several of the intrinsic headers were using plain non-reserved identifiers. C++11 17.6.4.3.2 [global.names] p1 reservers names containing a double begining with an underscore followed by an uppercase letter for any use. I think I got them all, but open to being corrected. For the most part I didn't bother updating function-like macro parameter names because I don't believe they're subject to any such collission - though some function-like macros already follow this convention (I didn't update them in part because the churn was more significant as several function-like macros use the double underscore prefixed version of the same name as a parameter in their implementation) llvm-svn: 172666
2013-01-17 07:08:36 +08:00
_mm256_unpacklo_epi16(__m256i __a, __m256i __b)
Intrinsics for AVX2 unpack instructions. llvm-svn: 147237
2011-12-24 11:58:43 +08:00
{
PR14964: intrinsic headers using non-reserved identifiers Several of the intrinsic headers were using plain non-reserved identifiers. C++11 17.6.4.3.2 [global.names] p1 reservers names containing a double begining with an underscore followed by an uppercase letter for any use. I think I got them all, but open to being corrected. For the most part I didn't bother updating function-like macro parameter names because I don't believe they're subject to any such collission - though some function-like macros already follow this convention (I didn't update them in part because the churn was more significant as several function-like macros use the double underscore prefixed version of the same name as a parameter in their implementation) llvm-svn: 172666
2013-01-17 07:08:36 +08:00
return (__m256i)__builtin_shufflevector((__v16hi)__a, (__v16hi)__b, 0, 16+0, 1, 16+1, 2, 16+2, 3, 16+3, 8, 16+8, 9, 16+9, 10, 16+10, 11, 16+11);
Intrinsics for AVX2 unpack instructions. llvm-svn: 147237
2011-12-24 11:58:43 +08:00
}
[X86] Rename DEFAULT_FN_ATTR macro to __DEFAULT_FN_ATTR llvm-svn: 241065
2015-06-30 21:36:19 +08:00
static __inline__ __m256i __DEFAULT_FN_ATTRS
PR14964: intrinsic headers using non-reserved identifiers Several of the intrinsic headers were using plain non-reserved identifiers. C++11 17.6.4.3.2 [global.names] p1 reservers names containing a double begining with an underscore followed by an uppercase letter for any use. I think I got them all, but open to being corrected. For the most part I didn't bother updating function-like macro parameter names because I don't believe they're subject to any such collission - though some function-like macros already follow this convention (I didn't update them in part because the churn was more significant as several function-like macros use the double underscore prefixed version of the same name as a parameter in their implementation) llvm-svn: 172666
2013-01-17 07:08:36 +08:00
_mm256_unpacklo_epi32(__m256i __a, __m256i __b)
Intrinsics for AVX2 unpack instructions. llvm-svn: 147237
2011-12-24 11:58:43 +08:00
{
PR14964: intrinsic headers using non-reserved identifiers Several of the intrinsic headers were using plain non-reserved identifiers. C++11 17.6.4.3.2 [global.names] p1 reservers names containing a double begining with an underscore followed by an uppercase letter for any use. I think I got them all, but open to being corrected. For the most part I didn't bother updating function-like macro parameter names because I don't believe they're subject to any such collission - though some function-like macros already follow this convention (I didn't update them in part because the churn was more significant as several function-like macros use the double underscore prefixed version of the same name as a parameter in their implementation) llvm-svn: 172666
2013-01-17 07:08:36 +08:00
return (__m256i)__builtin_shufflevector((__v8si)__a, (__v8si)__b, 0, 8+0, 1, 8+1, 4, 8+4, 5, 8+5);
Intrinsics for AVX2 unpack instructions. llvm-svn: 147237
2011-12-24 11:58:43 +08:00
}
[X86] Rename DEFAULT_FN_ATTR macro to __DEFAULT_FN_ATTR llvm-svn: 241065
2015-06-30 21:36:19 +08:00
static __inline__ __m256i __DEFAULT_FN_ATTRS
PR14964: intrinsic headers using non-reserved identifiers Several of the intrinsic headers were using plain non-reserved identifiers. C++11 17.6.4.3.2 [global.names] p1 reservers names containing a double begining with an underscore followed by an uppercase letter for any use. I think I got them all, but open to being corrected. For the most part I didn't bother updating function-like macro parameter names because I don't believe they're subject to any such collission - though some function-like macros already follow this convention (I didn't update them in part because the churn was more significant as several function-like macros use the double underscore prefixed version of the same name as a parameter in their implementation) llvm-svn: 172666
2013-01-17 07:08:36 +08:00
_mm256_unpacklo_epi64(__m256i __a, __m256i __b)
Intrinsics for AVX2 unpack instructions. llvm-svn: 147237
2011-12-24 11:58:43 +08:00
{
[X86] Add typecasts to remove most assumptions about what __m128i/__m256i is defined as. Add similar typecasts for the fp types as well. llvm-svn: 269632
2016-05-16 14:38:42 +08:00
return (__m256i)__builtin_shufflevector((__v4di)__a, (__v4di)__b, 0, 4+0, 2, 4+2);
Intrinsics for AVX2 unpack instructions. llvm-svn: 147237
2011-12-24 11:58:43 +08:00
}
[X86] Rename DEFAULT_FN_ATTR macro to __DEFAULT_FN_ATTR llvm-svn: 241065
2015-06-30 21:36:19 +08:00
static __inline__ __m256i __DEFAULT_FN_ATTRS
PR14964: intrinsic headers using non-reserved identifiers Several of the intrinsic headers were using plain non-reserved identifiers. C++11 17.6.4.3.2 [global.names] p1 reservers names containing a double begining with an underscore followed by an uppercase letter for any use. I think I got them all, but open to being corrected. For the most part I didn't bother updating function-like macro parameter names because I don't believe they're subject to any such collission - though some function-like macros already follow this convention (I didn't update them in part because the churn was more significant as several function-like macros use the double underscore prefixed version of the same name as a parameter in their implementation) llvm-svn: 172666
2013-01-17 07:08:36 +08:00
_mm256_xor_si256(__m256i __a, __m256i __b)
Add AVX2 intrinsics for and, andn, or, and xor. llvm-svn: 146862
2011-12-19 17:03:48 +08:00
{
[X86] Use unsigned types for vector arithmetic in intrinsics to avoid undefined behavior for signed integer overflow. This is really only needed for addition, subtraction, and multiplication, but I did the bitwise ops too for overall consistency. Clang currently doesn't set NSW for signed vector operations so the undefined behavior shouldn't happen today. llvm-svn: 271778
2016-06-04 13:43:41 +08:00
return (__m256i)((__v4du)__a ^ (__v4du)__b);
Add AVX2 intrinsics for and, andn, or, and xor. llvm-svn: 146862
2011-12-19 17:03:48 +08:00
}
Add AVX2 intrinsics for FP vbroadcast, vbroadcasti128, and vpblendd. llvm-svn: 147239
2011-12-24 13:19:29 +08:00
[X86] Rename DEFAULT_FN_ATTR macro to __DEFAULT_FN_ATTR llvm-svn: 241065
2015-06-30 21:36:19 +08:00
static __inline__ __m256i __DEFAULT_FN_ATTRS
[Headers][X86] Fix stream_load (movntdqa) to accept const*. Per Intel intrinsics guide: - _mm256_stream_load_si256 takes `__m256i const *' - _mm_stream_load_si128 takes `__m128i *', for no good reason. Let's accept const* for both. llvm-svn: 249213
2015-10-03 07:29:26 +08:00
_mm256_stream_load_si256(__m256i const *__V)
Add AVX2 intrinsics for FP vbroadcast, vbroadcasti128, and vpblendd. llvm-svn: 147239
2011-12-24 13:19:29 +08:00
{
[Headers][X86] Fix stream_load (movntdqa) to accept const*. Per Intel intrinsics guide: - _mm256_stream_load_si256 takes `__m256i const *' - _mm_stream_load_si128 takes `__m128i *', for no good reason. Let's accept const* for both. llvm-svn: 249213
2015-10-03 07:29:26 +08:00
return (__m256i)__builtin_ia32_movntdqa256((const __v4di *)__V);
Add AVX2 intrinsics for FP vbroadcast, vbroadcasti128, and vpblendd. llvm-svn: 147239
2011-12-24 13:19:29 +08:00
}
[X86] Rename DEFAULT_FN_ATTR macro to __DEFAULT_FN_ATTR llvm-svn: 241065
2015-06-30 21:36:19 +08:00
static __inline__ __m128 __DEFAULT_FN_ATTRS
Add AVX2 intrinsics for FP vbroadcast, vbroadcasti128, and vpblendd. llvm-svn: 147239
2011-12-24 13:19:29 +08:00
_mm_broadcastss_ps(__m128 __X)
{
[Headers][X86] Use __builtin_shufflevector in AVX2 broadcasts. This lets us optimize them better. We agreed to remove the intrinsics, instead of combining them later, as, at -O0, we generate the expected instructions. Plus, it's a nice cleanup. Differential Revision: http://reviews.llvm.org/D10556 llvm-svn: 245605
2015-08-21 04:27:21 +08:00
return (__m128)__builtin_shufflevector((__v4sf)__X, (__v4sf)__X, 0, 0, 0, 0);
Add AVX2 intrinsics for FP vbroadcast, vbroadcasti128, and vpblendd. llvm-svn: 147239
2011-12-24 13:19:29 +08:00
}
[X86] Rename DEFAULT_FN_ATTR macro to __DEFAULT_FN_ATTR llvm-svn: 241065
2015-06-30 21:36:19 +08:00
static __inline__ __m128d __DEFAULT_FN_ATTRS
[X86] Add _mm_broadcastsd_pd intrinsic _mm_broadcastsd_pd is basically an alias for _mm_movedup_pd, however the alias is only available from AVX2 forward. llvm-svn: 237698
2015-05-19 22:49:14 +08:00
_mm_broadcastsd_pd(__m128d __a)
{
[X86] Add typecasts to remove most assumptions about what __m128i/__m256i is defined as. Add similar typecasts for the fp types as well. llvm-svn: 269632
2016-05-16 14:38:42 +08:00
return __builtin_shufflevector((__v2df)__a, (__v2df)__a, 0, 0);
[X86] Add _mm_broadcastsd_pd intrinsic _mm_broadcastsd_pd is basically an alias for _mm_movedup_pd, however the alias is only available from AVX2 forward. llvm-svn: 237698
2015-05-19 22:49:14 +08:00
}
[X86] Rename DEFAULT_FN_ATTR macro to __DEFAULT_FN_ATTR llvm-svn: 241065
2015-06-30 21:36:19 +08:00
static __inline__ __m256 __DEFAULT_FN_ATTRS
Add AVX2 intrinsics for FP vbroadcast, vbroadcasti128, and vpblendd. llvm-svn: 147239
2011-12-24 13:19:29 +08:00
_mm256_broadcastss_ps(__m128 __X)
{
[Headers][X86] Use __builtin_shufflevector in AVX2 broadcasts. This lets us optimize them better. We agreed to remove the intrinsics, instead of combining them later, as, at -O0, we generate the expected instructions. Plus, it's a nice cleanup. Differential Revision: http://reviews.llvm.org/D10556 llvm-svn: 245605
2015-08-21 04:27:21 +08:00
return (__m256)__builtin_shufflevector((__v4sf)__X, (__v4sf)__X, 0, 0, 0, 0, 0, 0, 0, 0);
Add AVX2 intrinsics for FP vbroadcast, vbroadcasti128, and vpblendd. llvm-svn: 147239
2011-12-24 13:19:29 +08:00
}
[X86] Rename DEFAULT_FN_ATTR macro to __DEFAULT_FN_ATTR llvm-svn: 241065
2015-06-30 21:36:19 +08:00
static __inline__ __m256d __DEFAULT_FN_ATTRS
Add AVX2 intrinsics for FP vbroadcast, vbroadcasti128, and vpblendd. llvm-svn: 147239
2011-12-24 13:19:29 +08:00
_mm256_broadcastsd_pd(__m128d __X)
{
[Headers][X86] Use __builtin_shufflevector in AVX2 broadcasts. This lets us optimize them better. We agreed to remove the intrinsics, instead of combining them later, as, at -O0, we generate the expected instructions. Plus, it's a nice cleanup. Differential Revision: http://reviews.llvm.org/D10556 llvm-svn: 245605
2015-08-21 04:27:21 +08:00
return (__m256d)__builtin_shufflevector((__v2df)__X, (__v2df)__X, 0, 0, 0, 0);
Add AVX2 intrinsics for FP vbroadcast, vbroadcasti128, and vpblendd. llvm-svn: 147239
2011-12-24 13:19:29 +08:00
}
[X86] Rename DEFAULT_FN_ATTR macro to __DEFAULT_FN_ATTR llvm-svn: 241065
2015-06-30 21:36:19 +08:00
static __inline__ __m256i __DEFAULT_FN_ATTRS
Fix the name and the type of the argument for intrinisc _mm256_broadcastsi128_si256 to align with the Intel documentation. This fixes bug PR 16581 and rdar:14747994. llvm-svn: 188609
2013-08-18 00:40:09 +08:00
_mm256_broadcastsi128_si256(__m128i __X)
Add AVX2 intrinsics for FP vbroadcast, vbroadcasti128, and vpblendd. llvm-svn: 147239
2011-12-24 13:19:29 +08:00
{
[X86] Add typecasts to remove most assumptions about what __m128i/__m256i is defined as. Add similar typecasts for the fp types as well. llvm-svn: 269632
2016-05-16 14:38:42 +08:00
return (__m256i)__builtin_shufflevector((__v2di)__X, (__v2di)__X, 0, 1, 0, 1);
Add AVX2 intrinsics for FP vbroadcast, vbroadcasti128, and vpblendd. llvm-svn: 147239
2011-12-24 13:19:29 +08:00
}
#define _mm_blend_epi32(V1, V2, M) __extension__ ({ \
[X86] Remove temporary variables from macros in x86 intrinsic headers. Prevents duplicate names appearing from multiple macro expansions. NFC llvm-svn: 252586
2015-11-10 13:08:05 +08:00
(__m128i)__builtin_shufflevector((__v4si)(__m128i)(V1), \
(__v4si)(__m128i)(V2), \
Patched clang to emit x86 blends as shufflevectors. Summary: Most of the clang header patch by Simon Pilgrim @ SCEE. Also fixed (or added) clang tests for these intrinsics. LLVM tests to make sure we get the blend instruction out of these shufflevectors are at http://reviews.llvm.org/D3600 Reviewers: eli.friedman, craig.topper, rafael Subscribers: cfe-commits Differential Revision: http://reviews.llvm.org/D3601 llvm-svn: 208664
2014-05-13 10:37:02 +08:00
(((M) & 0x01) ? 4 : 0), \
(((M) & 0x02) ? 5 : 1), \
(((M) & 0x04) ? 6 : 2), \
(((M) & 0x08) ? 7 : 3)); })
Add AVX2 intrinsics for FP vbroadcast, vbroadcasti128, and vpblendd. llvm-svn: 147239
2011-12-24 13:19:29 +08:00
#define _mm256_blend_epi32(V1, V2, M) __extension__ ({ \
[X86] Remove temporary variables from macros in x86 intrinsic headers. Prevents duplicate names appearing from multiple macro expansions. NFC llvm-svn: 252586
2015-11-10 13:08:05 +08:00
(__m256i)__builtin_shufflevector((__v8si)(__m256i)(V1), \
(__v8si)(__m256i)(V2), \
Patched clang to emit x86 blends as shufflevectors. Summary: Most of the clang header patch by Simon Pilgrim @ SCEE. Also fixed (or added) clang tests for these intrinsics. LLVM tests to make sure we get the blend instruction out of these shufflevectors are at http://reviews.llvm.org/D3600 Reviewers: eli.friedman, craig.topper, rafael Subscribers: cfe-commits Differential Revision: http://reviews.llvm.org/D3601 llvm-svn: 208664
2014-05-13 10:37:02 +08:00
(((M) & 0x01) ? 8 : 0), \
(((M) & 0x02) ? 9 : 1), \
(((M) & 0x04) ? 10 : 2), \
(((M) & 0x08) ? 11 : 3), \
(((M) & 0x10) ? 12 : 4), \
(((M) & 0x20) ? 13 : 5), \
(((M) & 0x40) ? 14 : 6), \
(((M) & 0x80) ? 15 : 7)); })
Add AVX2 permute intrinsics. Also add parentheses on some macro arguments in other intrinsic headers. llvm-svn: 147241
2011-12-24 15:55:14 +08:00
[X86] Rename DEFAULT_FN_ATTR macro to __DEFAULT_FN_ATTR llvm-svn: 241065
2015-06-30 21:36:19 +08:00
static __inline__ __m256i __DEFAULT_FN_ATTRS
Add AVX2 permute intrinsics. Also add parentheses on some macro arguments in other intrinsic headers. llvm-svn: 147241
2011-12-24 15:55:14 +08:00
_mm256_broadcastb_epi8(__m128i __X)
{
[Headers][X86] Use __builtin_shufflevector in AVX2 broadcasts. This lets us optimize them better. We agreed to remove the intrinsics, instead of combining them later, as, at -O0, we generate the expected instructions. Plus, it's a nice cleanup. Differential Revision: http://reviews.llvm.org/D10556 llvm-svn: 245605
2015-08-21 04:27:21 +08:00
return (__m256i)__builtin_shufflevector((__v16qi)__X, (__v16qi)__X, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0);
Add AVX2 permute intrinsics. Also add parentheses on some macro arguments in other intrinsic headers. llvm-svn: 147241
2011-12-24 15:55:14 +08:00
}
[X86] Rename DEFAULT_FN_ATTR macro to __DEFAULT_FN_ATTR llvm-svn: 241065
2015-06-30 21:36:19 +08:00
static __inline__ __m256i __DEFAULT_FN_ATTRS
Add AVX2 permute intrinsics. Also add parentheses on some macro arguments in other intrinsic headers. llvm-svn: 147241
2011-12-24 15:55:14 +08:00
_mm256_broadcastw_epi16(__m128i __X)
{
[Headers][X86] Use __builtin_shufflevector in AVX2 broadcasts. This lets us optimize them better. We agreed to remove the intrinsics, instead of combining them later, as, at -O0, we generate the expected instructions. Plus, it's a nice cleanup. Differential Revision: http://reviews.llvm.org/D10556 llvm-svn: 245605
2015-08-21 04:27:21 +08:00
return (__m256i)__builtin_shufflevector((__v8hi)__X, (__v8hi)__X, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0);
Add AVX2 permute intrinsics. Also add parentheses on some macro arguments in other intrinsic headers. llvm-svn: 147241
2011-12-24 15:55:14 +08:00
}
[X86] Rename DEFAULT_FN_ATTR macro to __DEFAULT_FN_ATTR llvm-svn: 241065
2015-06-30 21:36:19 +08:00
static __inline__ __m256i __DEFAULT_FN_ATTRS
Add AVX2 permute intrinsics. Also add parentheses on some macro arguments in other intrinsic headers. llvm-svn: 147241
2011-12-24 15:55:14 +08:00
_mm256_broadcastd_epi32(__m128i __X)
{
[Headers][X86] Use __builtin_shufflevector in AVX2 broadcasts. This lets us optimize them better. We agreed to remove the intrinsics, instead of combining them later, as, at -O0, we generate the expected instructions. Plus, it's a nice cleanup. Differential Revision: http://reviews.llvm.org/D10556 llvm-svn: 245605
2015-08-21 04:27:21 +08:00
return (__m256i)__builtin_shufflevector((__v4si)__X, (__v4si)__X, 0, 0, 0, 0, 0, 0, 0, 0);
Add AVX2 permute intrinsics. Also add parentheses on some macro arguments in other intrinsic headers. llvm-svn: 147241
2011-12-24 15:55:14 +08:00
}
[X86] Rename DEFAULT_FN_ATTR macro to __DEFAULT_FN_ATTR llvm-svn: 241065
2015-06-30 21:36:19 +08:00
static __inline__ __m256i __DEFAULT_FN_ATTRS
Add AVX2 permute intrinsics. Also add parentheses on some macro arguments in other intrinsic headers. llvm-svn: 147241
2011-12-24 15:55:14 +08:00
_mm256_broadcastq_epi64(__m128i __X)
{
[X86] Add typecasts to remove most assumptions about what __m128i/__m256i is defined as. Add similar typecasts for the fp types as well. llvm-svn: 269632
2016-05-16 14:38:42 +08:00
return (__m256i)__builtin_shufflevector((__v2di)__X, (__v2di)__X, 0, 0, 0, 0);
Add AVX2 permute intrinsics. Also add parentheses on some macro arguments in other intrinsic headers. llvm-svn: 147241
2011-12-24 15:55:14 +08:00
}
[X86] Rename DEFAULT_FN_ATTR macro to __DEFAULT_FN_ATTR llvm-svn: 241065
2015-06-30 21:36:19 +08:00
static __inline__ __m128i __DEFAULT_FN_ATTRS
Add AVX2 permute intrinsics. Also add parentheses on some macro arguments in other intrinsic headers. llvm-svn: 147241
2011-12-24 15:55:14 +08:00
_mm_broadcastb_epi8(__m128i __X)
{
[Headers][X86] Use __builtin_shufflevector in AVX2 broadcasts. This lets us optimize them better. We agreed to remove the intrinsics, instead of combining them later, as, at -O0, we generate the expected instructions. Plus, it's a nice cleanup. Differential Revision: http://reviews.llvm.org/D10556 llvm-svn: 245605
2015-08-21 04:27:21 +08:00
return (__m128i)__builtin_shufflevector((__v16qi)__X, (__v16qi)__X, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0);
Add AVX2 permute intrinsics. Also add parentheses on some macro arguments in other intrinsic headers. llvm-svn: 147241
2011-12-24 15:55:14 +08:00
}
[X86] Rename DEFAULT_FN_ATTR macro to __DEFAULT_FN_ATTR llvm-svn: 241065
2015-06-30 21:36:19 +08:00
static __inline__ __m128i __DEFAULT_FN_ATTRS
Add AVX2 permute intrinsics. Also add parentheses on some macro arguments in other intrinsic headers. llvm-svn: 147241
2011-12-24 15:55:14 +08:00
_mm_broadcastw_epi16(__m128i __X)
{
[Headers][X86] Use __builtin_shufflevector in AVX2 broadcasts. This lets us optimize them better. We agreed to remove the intrinsics, instead of combining them later, as, at -O0, we generate the expected instructions. Plus, it's a nice cleanup. Differential Revision: http://reviews.llvm.org/D10556 llvm-svn: 245605
2015-08-21 04:27:21 +08:00
return (__m128i)__builtin_shufflevector((__v8hi)__X, (__v8hi)__X, 0, 0, 0, 0, 0, 0, 0, 0);
Add AVX2 permute intrinsics. Also add parentheses on some macro arguments in other intrinsic headers. llvm-svn: 147241
2011-12-24 15:55:14 +08:00
}
[X86] Rename DEFAULT_FN_ATTR macro to __DEFAULT_FN_ATTR llvm-svn: 241065
2015-06-30 21:36:19 +08:00
static __inline__ __m128i __DEFAULT_FN_ATTRS
Add AVX2 permute intrinsics. Also add parentheses on some macro arguments in other intrinsic headers. llvm-svn: 147241
2011-12-24 15:55:14 +08:00
_mm_broadcastd_epi32(__m128i __X)
{
[Headers][X86] Use __builtin_shufflevector in AVX2 broadcasts. This lets us optimize them better. We agreed to remove the intrinsics, instead of combining them later, as, at -O0, we generate the expected instructions. Plus, it's a nice cleanup. Differential Revision: http://reviews.llvm.org/D10556 llvm-svn: 245605
2015-08-21 04:27:21 +08:00
return (__m128i)__builtin_shufflevector((__v4si)__X, (__v4si)__X, 0, 0, 0, 0);
Add AVX2 permute intrinsics. Also add parentheses on some macro arguments in other intrinsic headers. llvm-svn: 147241
2011-12-24 15:55:14 +08:00
}
[X86] Rename DEFAULT_FN_ATTR macro to __DEFAULT_FN_ATTR llvm-svn: 241065
2015-06-30 21:36:19 +08:00
static __inline__ __m128i __DEFAULT_FN_ATTRS
Add AVX2 permute intrinsics. Also add parentheses on some macro arguments in other intrinsic headers. llvm-svn: 147241
2011-12-24 15:55:14 +08:00
_mm_broadcastq_epi64(__m128i __X)
{
[X86] Add typecasts to remove most assumptions about what __m128i/__m256i is defined as. Add similar typecasts for the fp types as well. llvm-svn: 269632
2016-05-16 14:38:42 +08:00
return (__m128i)__builtin_shufflevector((__v2di)__X, (__v2di)__X, 0, 0);
Add AVX2 permute intrinsics. Also add parentheses on some macro arguments in other intrinsic headers. llvm-svn: 147241
2011-12-24 15:55:14 +08:00
}
[X86] Rename DEFAULT_FN_ATTR macro to __DEFAULT_FN_ATTR llvm-svn: 241065
2015-06-30 21:36:19 +08:00
static __inline__ __m256i __DEFAULT_FN_ATTRS
PR14964: intrinsic headers using non-reserved identifiers Several of the intrinsic headers were using plain non-reserved identifiers. C++11 17.6.4.3.2 [global.names] p1 reservers names containing a double begining with an underscore followed by an uppercase letter for any use. I think I got them all, but open to being corrected. For the most part I didn't bother updating function-like macro parameter names because I don't believe they're subject to any such collission - though some function-like macros already follow this convention (I didn't update them in part because the churn was more significant as several function-like macros use the double underscore prefixed version of the same name as a parameter in their implementation) llvm-svn: 172666
2013-01-17 07:08:36 +08:00
_mm256_permutevar8x32_epi32(__m256i __a, __m256i __b)
Add AVX2 permute intrinsics. Also add parentheses on some macro arguments in other intrinsic headers. llvm-svn: 147241
2011-12-24 15:55:14 +08:00
{
PR14964: intrinsic headers using non-reserved identifiers Several of the intrinsic headers were using plain non-reserved identifiers. C++11 17.6.4.3.2 [global.names] p1 reservers names containing a double begining with an underscore followed by an uppercase letter for any use. I think I got them all, but open to being corrected. For the most part I didn't bother updating function-like macro parameter names because I don't believe they're subject to any such collission - though some function-like macros already follow this convention (I didn't update them in part because the churn was more significant as several function-like macros use the double underscore prefixed version of the same name as a parameter in their implementation) llvm-svn: 172666
2013-01-17 07:08:36 +08:00
return (__m256i)__builtin_ia32_permvarsi256((__v8si)__a, (__v8si)__b);
Add AVX2 permute intrinsics. Also add parentheses on some macro arguments in other intrinsic headers. llvm-svn: 147241
2011-12-24 15:55:14 +08:00
}
#define _mm256_permute4x64_pd(V, M) __extension__ ({ \
[X86] Remove temporary variables from macros in x86 intrinsic headers. Prevents duplicate names appearing from multiple macro expansions. NFC llvm-svn: 252586
2015-11-10 13:08:05 +08:00
(__m256d)__builtin_shufflevector((__v4df)(__m256d)(V), \
[X86] Use undefined instead of setzero in shufflevector based intrinsics when the second source is unused. Rewrite immediate extractions in shuffle intrinsics to be in ((c >> x) & y) form instead of ((c & z) >> x). This way only x varies between each use instead of having to vary x and z. llvm-svn: 274525
2016-07-05 06:18:01 +08:00
(__v4df)_mm256_undefined_pd(), \
((M) >> 0) & 0x3, \
((M) >> 2) & 0x3, \
((M) >> 4) & 0x3, \
((M) >> 6) & 0x3); })
Add AVX2 permute intrinsics. Also add parentheses on some macro arguments in other intrinsic headers. llvm-svn: 147241
2011-12-24 15:55:14 +08:00
[X86] Rename DEFAULT_FN_ATTR macro to __DEFAULT_FN_ATTR llvm-svn: 241065
2015-06-30 21:36:19 +08:00
static __inline__ __m256 __DEFAULT_FN_ATTRS
[X86] _mm256_permutevar8x32_ps should take an integer vector for its shuffle index input. llvm-svn: 254270
2015-11-30 06:53:32 +08:00
_mm256_permutevar8x32_ps(__m256 __a, __m256i __b)
Add AVX2 permute intrinsics. Also add parentheses on some macro arguments in other intrinsic headers. llvm-svn: 147241
2011-12-24 15:55:14 +08:00
{
[X86] _mm256_permutevar8x32_ps should take an integer vector for its shuffle index input. llvm-svn: 254270
2015-11-30 06:53:32 +08:00
return (__m256)__builtin_ia32_permvarsf256((__v8sf)__a, (__v8si)__b);
Add AVX2 permute intrinsics. Also add parentheses on some macro arguments in other intrinsic headers. llvm-svn: 147241
2011-12-24 15:55:14 +08:00
}
#define _mm256_permute4x64_epi64(V, M) __extension__ ({ \
[X86] Remove temporary variables from macros in x86 intrinsic headers. Prevents duplicate names appearing from multiple macro expansions. NFC llvm-svn: 252586
2015-11-10 13:08:05 +08:00
(__m256i)__builtin_shufflevector((__v4di)(__m256i)(V), \
[X86] Use undefined instead of setzero in shufflevector based intrinsics when the second source is unused. Rewrite immediate extractions in shuffle intrinsics to be in ((c >> x) & y) form instead of ((c & z) >> x). This way only x varies between each use instead of having to vary x and z. llvm-svn: 274525
2016-07-05 06:18:01 +08:00
(__v4di)_mm256_undefined_si256(), \
((M) >> 0) & 0x3, \
((M) >> 2) & 0x3, \
((M) >> 4) & 0x3, \
((M) >> 6) & 0x3); })
Add AVX2 permute intrinsics. Also add parentheses on some macro arguments in other intrinsic headers. llvm-svn: 147241
2011-12-24 15:55:14 +08:00
#define _mm256_permute2x128_si256(V1, V2, M) __extension__ ({ \
[X86] Remove temporary variables from macros in x86 intrinsic headers. Prevents duplicate names appearing from multiple macro expansions. NFC llvm-svn: 252586
2015-11-10 13:08:05 +08:00
(__m256i)__builtin_ia32_permti256((__m256i)(V1), (__m256i)(V2), (M)); })
Add last of the AVX2 intrinsics except for gather. llvm-svn: 147253
2011-12-25 01:20:15 +08:00
[X86, AVX2] Replace inserti128 and extracti128 intrinsics with generic shuffles This is nearly identical to the v*f128_si256 parts of r231792 and r232052. AVX2 introduced proper integer variants of the hacked integer insert/extract C intrinsics that were created for this same functionality with AVX1. This should complete the front end fixes for insert/extract128 intrinsics. Corresponding LLVM patch to follow. llvm-svn: 232109
2015-03-13 05:54:24 +08:00
#define _mm256_extracti128_si256(V, M) __extension__ ({ \
[X86] Add missing typecasts in intrinsic macros. This should make them more robust against inputs that aren't already the right type. llvm-svn: 252700
2015-11-11 11:47:10 +08:00
(__m128i)__builtin_shufflevector((__v4di)(__m256i)(V), \
[X86] Use undefined instead of setzero in shufflevector based intrinsics when the second source is unused. Rewrite immediate extractions in shuffle intrinsics to be in ((c >> x) & y) form instead of ((c & z) >> x). This way only x varies between each use instead of having to vary x and z. llvm-svn: 274525
2016-07-05 06:18:01 +08:00
(__v4di)_mm256_undefined_si256(), \
[X86] Add missing typecasts in intrinsic macros. This should make them more robust against inputs that aren't already the right type. llvm-svn: 252700
2015-11-11 11:47:10 +08:00
(((M) & 1) ? 2 : 0), \
(((M) & 1) ? 3 : 1) ); })
[X86, AVX2] Replace inserti128 and extracti128 intrinsics with generic shuffles This is nearly identical to the v*f128_si256 parts of r231792 and r232052. AVX2 introduced proper integer variants of the hacked integer insert/extract C intrinsics that were created for this same functionality with AVX1. This should complete the front end fixes for insert/extract128 intrinsics. Corresponding LLVM patch to follow. llvm-svn: 232109
2015-03-13 05:54:24 +08:00
#define _mm256_inserti128_si256(V1, V2, M) __extension__ ({ \
[X86] Add missing typecasts in intrinsic macros. This should make them more robust against inputs that aren't already the right type. llvm-svn: 252700
2015-11-11 11:47:10 +08:00
(__m256i)__builtin_shufflevector((__v4di)(__m256i)(V1), \
(__v4di)_mm256_castsi128_si256((__m128i)(V2)), \
(((M) & 1) ? 0 : 4), \
(((M) & 1) ? 1 : 5), \
(((M) & 1) ? 4 : 2), \
(((M) & 1) ? 5 : 3) ); })
Add last of the AVX2 intrinsics except for gather. llvm-svn: 147253
2011-12-25 01:20:15 +08:00
[X86] Rename DEFAULT_FN_ATTR macro to __DEFAULT_FN_ATTR llvm-svn: 241065
2015-06-30 21:36:19 +08:00
static __inline__ __m256i __DEFAULT_FN_ATTRS
Add last of the AVX2 intrinsics except for gather. llvm-svn: 147253
2011-12-25 01:20:15 +08:00
_mm256_maskload_epi32(int const *__X, __m256i __M)
{
return (__m256i)__builtin_ia32_maskloadd256((const __v8si *)__X, (__v8si)__M);
}
[X86] Rename DEFAULT_FN_ATTR macro to __DEFAULT_FN_ATTR llvm-svn: 241065
2015-06-30 21:36:19 +08:00
static __inline__ __m256i __DEFAULT_FN_ATTRS
Add last of the AVX2 intrinsics except for gather. llvm-svn: 147253
2011-12-25 01:20:15 +08:00
_mm256_maskload_epi64(long long const *__X, __m256i __M)
{
[X86] Add typecasts to remove most assumptions about what __m128i/__m256i is defined as. Add similar typecasts for the fp types as well. llvm-svn: 269632
2016-05-16 14:38:42 +08:00
return (__m256i)__builtin_ia32_maskloadq256((const __v4di *)__X, (__v4di)__M);
Add last of the AVX2 intrinsics except for gather. llvm-svn: 147253
2011-12-25 01:20:15 +08:00
}
[X86] Rename DEFAULT_FN_ATTR macro to __DEFAULT_FN_ATTR llvm-svn: 241065
2015-06-30 21:36:19 +08:00
static __inline__ __m128i __DEFAULT_FN_ATTRS
Add last of the AVX2 intrinsics except for gather. llvm-svn: 147253
2011-12-25 01:20:15 +08:00
_mm_maskload_epi32(int const *__X, __m128i __M)
{
return (__m128i)__builtin_ia32_maskloadd((const __v4si *)__X, (__v4si)__M);
}
[X86] Rename DEFAULT_FN_ATTR macro to __DEFAULT_FN_ATTR llvm-svn: 241065
2015-06-30 21:36:19 +08:00
static __inline__ __m128i __DEFAULT_FN_ATTRS
Add last of the AVX2 intrinsics except for gather. llvm-svn: 147253
2011-12-25 01:20:15 +08:00
_mm_maskload_epi64(long long const *__X, __m128i __M)
{
return (__m128i)__builtin_ia32_maskloadq((const __v2di *)__X, (__v2di)__M);
}
[X86] Rename DEFAULT_FN_ATTR macro to __DEFAULT_FN_ATTR llvm-svn: 241065
2015-06-30 21:36:19 +08:00
static __inline__ void __DEFAULT_FN_ATTRS
Add last of the AVX2 intrinsics except for gather. llvm-svn: 147253
2011-12-25 01:20:15 +08:00
_mm256_maskstore_epi32(int *__X, __m256i __M, __m256i __Y)
{
__builtin_ia32_maskstored256((__v8si *)__X, (__v8si)__M, (__v8si)__Y);
}
[X86] Rename DEFAULT_FN_ATTR macro to __DEFAULT_FN_ATTR llvm-svn: 241065
2015-06-30 21:36:19 +08:00
static __inline__ void __DEFAULT_FN_ATTRS
Add last of the AVX2 intrinsics except for gather. llvm-svn: 147253
2011-12-25 01:20:15 +08:00
_mm256_maskstore_epi64(long long *__X, __m256i __M, __m256i __Y)
{
[X86] Add typecasts to remove most assumptions about what __m128i/__m256i is defined as. Add similar typecasts for the fp types as well. llvm-svn: 269632
2016-05-16 14:38:42 +08:00
__builtin_ia32_maskstoreq256((__v4di *)__X, (__v4di)__M, (__v4di)__Y);
Add last of the AVX2 intrinsics except for gather. llvm-svn: 147253
2011-12-25 01:20:15 +08:00
}
[X86] Rename DEFAULT_FN_ATTR macro to __DEFAULT_FN_ATTR llvm-svn: 241065
2015-06-30 21:36:19 +08:00
static __inline__ void __DEFAULT_FN_ATTRS
Add last of the AVX2 intrinsics except for gather. llvm-svn: 147253
2011-12-25 01:20:15 +08:00
_mm_maskstore_epi32(int *__X, __m128i __M, __m128i __Y)
{
__builtin_ia32_maskstored((__v4si *)__X, (__v4si)__M, (__v4si)__Y);
}
[X86] Rename DEFAULT_FN_ATTR macro to __DEFAULT_FN_ATTR llvm-svn: 241065
2015-06-30 21:36:19 +08:00
static __inline__ void __DEFAULT_FN_ATTRS
Add last of the AVX2 intrinsics except for gather. llvm-svn: 147253
2011-12-25 01:20:15 +08:00
_mm_maskstore_epi64(long long *__X, __m128i __M, __m128i __Y)
{
[X86] Add typecasts to remove most assumptions about what __m128i/__m256i is defined as. Add similar typecasts for the fp types as well. llvm-svn: 269632
2016-05-16 14:38:42 +08:00
__builtin_ia32_maskstoreq(( __v2di *)__X, (__v2di)__M, (__v2di)__Y);
Add last of the AVX2 intrinsics except for gather. llvm-svn: 147253
2011-12-25 01:20:15 +08:00
}
[X86] Rename DEFAULT_FN_ATTR macro to __DEFAULT_FN_ATTR llvm-svn: 241065
2015-06-30 21:36:19 +08:00
static __inline__ __m256i __DEFAULT_FN_ATTRS
Add last of the AVX2 intrinsics except for gather. llvm-svn: 147253
2011-12-25 01:20:15 +08:00
_mm256_sllv_epi32(__m256i __X, __m256i __Y)
{
return (__m256i)__builtin_ia32_psllv8si((__v8si)__X, (__v8si)__Y);
}
[X86] Rename DEFAULT_FN_ATTR macro to __DEFAULT_FN_ATTR llvm-svn: 241065
2015-06-30 21:36:19 +08:00
static __inline__ __m128i __DEFAULT_FN_ATTRS
Add last of the AVX2 intrinsics except for gather. llvm-svn: 147253
2011-12-25 01:20:15 +08:00
_mm_sllv_epi32(__m128i __X, __m128i __Y)
{
return (__m128i)__builtin_ia32_psllv4si((__v4si)__X, (__v4si)__Y);
}
[X86] Rename DEFAULT_FN_ATTR macro to __DEFAULT_FN_ATTR llvm-svn: 241065
2015-06-30 21:36:19 +08:00
static __inline__ __m256i __DEFAULT_FN_ATTRS
Add last of the AVX2 intrinsics except for gather. llvm-svn: 147253
2011-12-25 01:20:15 +08:00
_mm256_sllv_epi64(__m256i __X, __m256i __Y)
{
[X86] Add typecasts to remove most assumptions about what __m128i/__m256i is defined as. Add similar typecasts for the fp types as well. llvm-svn: 269632
2016-05-16 14:38:42 +08:00
return (__m256i)__builtin_ia32_psllv4di((__v4di)__X, (__v4di)__Y);
Add last of the AVX2 intrinsics except for gather. llvm-svn: 147253
2011-12-25 01:20:15 +08:00
}
[X86] Rename DEFAULT_FN_ATTR macro to __DEFAULT_FN_ATTR llvm-svn: 241065
2015-06-30 21:36:19 +08:00
static __inline__ __m128i __DEFAULT_FN_ATTRS
Add last of the AVX2 intrinsics except for gather. llvm-svn: 147253
2011-12-25 01:20:15 +08:00
_mm_sllv_epi64(__m128i __X, __m128i __Y)
{
[X86] Add typecasts to remove most assumptions about what __m128i/__m256i is defined as. Add similar typecasts for the fp types as well. llvm-svn: 269632
2016-05-16 14:38:42 +08:00
return (__m128i)__builtin_ia32_psllv2di((__v2di)__X, (__v2di)__Y);
Add last of the AVX2 intrinsics except for gather. llvm-svn: 147253
2011-12-25 01:20:15 +08:00
}
[X86] Rename DEFAULT_FN_ATTR macro to __DEFAULT_FN_ATTR llvm-svn: 241065
2015-06-30 21:36:19 +08:00
static __inline__ __m256i __DEFAULT_FN_ATTRS
Add last of the AVX2 intrinsics except for gather. llvm-svn: 147253
2011-12-25 01:20:15 +08:00
_mm256_srav_epi32(__m256i __X, __m256i __Y)
{
return (__m256i)__builtin_ia32_psrav8si((__v8si)__X, (__v8si)__Y);
}
[X86] Rename DEFAULT_FN_ATTR macro to __DEFAULT_FN_ATTR llvm-svn: 241065
2015-06-30 21:36:19 +08:00
static __inline__ __m128i __DEFAULT_FN_ATTRS
Add last of the AVX2 intrinsics except for gather. llvm-svn: 147253
2011-12-25 01:20:15 +08:00
_mm_srav_epi32(__m128i __X, __m128i __Y)
{
return (__m128i)__builtin_ia32_psrav4si((__v4si)__X, (__v4si)__Y);
}
[X86] Rename DEFAULT_FN_ATTR macro to __DEFAULT_FN_ATTR llvm-svn: 241065
2015-06-30 21:36:19 +08:00
static __inline__ __m256i __DEFAULT_FN_ATTRS
Add last of the AVX2 intrinsics except for gather. llvm-svn: 147253
2011-12-25 01:20:15 +08:00
_mm256_srlv_epi32(__m256i __X, __m256i __Y)
{
return (__m256i)__builtin_ia32_psrlv8si((__v8si)__X, (__v8si)__Y);
}
[X86] Rename DEFAULT_FN_ATTR macro to __DEFAULT_FN_ATTR llvm-svn: 241065
2015-06-30 21:36:19 +08:00
static __inline__ __m128i __DEFAULT_FN_ATTRS
Add last of the AVX2 intrinsics except for gather. llvm-svn: 147253
2011-12-25 01:20:15 +08:00
_mm_srlv_epi32(__m128i __X, __m128i __Y)
{
return (__m128i)__builtin_ia32_psrlv4si((__v4si)__X, (__v4si)__Y);
}
[X86] Rename DEFAULT_FN_ATTR macro to __DEFAULT_FN_ATTR llvm-svn: 241065
2015-06-30 21:36:19 +08:00
static __inline__ __m256i __DEFAULT_FN_ATTRS
Add last of the AVX2 intrinsics except for gather. llvm-svn: 147253
2011-12-25 01:20:15 +08:00
_mm256_srlv_epi64(__m256i __X, __m256i __Y)
{
[X86] Add typecasts to remove most assumptions about what __m128i/__m256i is defined as. Add similar typecasts for the fp types as well. llvm-svn: 269632
2016-05-16 14:38:42 +08:00
return (__m256i)__builtin_ia32_psrlv4di((__v4di)__X, (__v4di)__Y);
Add last of the AVX2 intrinsics except for gather. llvm-svn: 147253
2011-12-25 01:20:15 +08:00
}
[X86] Rename DEFAULT_FN_ATTR macro to __DEFAULT_FN_ATTR llvm-svn: 241065
2015-06-30 21:36:19 +08:00
static __inline__ __m128i __DEFAULT_FN_ATTRS
Add last of the AVX2 intrinsics except for gather. llvm-svn: 147253
2011-12-25 01:20:15 +08:00
_mm_srlv_epi64(__m128i __X, __m128i __Y)
{
[X86] Add typecasts to remove most assumptions about what __m128i/__m256i is defined as. Add similar typecasts for the fp types as well. llvm-svn: 269632
2016-05-16 14:38:42 +08:00
return (__m128i)__builtin_ia32_psrlv2di((__v2di)__X, (__v2di)__Y);
Add last of the AVX2 intrinsics except for gather. llvm-svn: 147253
2011-12-25 01:20:15 +08:00
}
X86: add GATHER intrinsics (AVX2) in Clang Support the following intrinsics: _mm_mask_i32gather_pd, _mm256_mask_i32gather_pd, _mm_mask_i64gather_pd _mm256_mask_i64gather_pd, _mm_mask_i32gather_ps, _mm256_mask_i32gather_ps _mm_mask_i64gather_ps, _mm256_mask_i64gather_ps llvm-svn: 159222
2012-06-27 03:55:09 +08:00
#define _mm_mask_i32gather_pd(a, m, i, mask, s) __extension__ ({ \
[X86] Change pointer type in AVX2 gather builtins to be the scalar type instead of the vector type. This matches gcc and removes extras casts. llvm-svn: 252697
2015-11-11 10:51:18 +08:00
(__m128d)__builtin_ia32_gatherd_pd((__v2df)(__m128i)(a), \
(double const *)(m), \
(__v4si)(__m128i)(i), \
(__v2df)(__m128d)(mask), (s)); })
X86: add GATHER intrinsics (AVX2) in Clang Support the following intrinsics: _mm_mask_i32gather_pd, _mm256_mask_i32gather_pd, _mm_mask_i64gather_pd _mm256_mask_i64gather_pd, _mm_mask_i32gather_ps, _mm256_mask_i32gather_ps _mm_mask_i64gather_ps, _mm256_mask_i64gather_ps llvm-svn: 159222
2012-06-27 03:55:09 +08:00
#define _mm256_mask_i32gather_pd(a, m, i, mask, s) __extension__ ({ \
[X86] Change pointer type in AVX2 gather builtins to be the scalar type instead of the vector type. This matches gcc and removes extras casts. llvm-svn: 252697
2015-11-11 10:51:18 +08:00
(__m256d)__builtin_ia32_gatherd_pd256((__v4df)(__m256d)(a), \
(double const *)(m), \
(__v4si)(__m128i)(i), \
(__v4df)(__m256d)(mask), (s)); })
X86: add GATHER intrinsics (AVX2) in Clang Support the following intrinsics: _mm_mask_i32gather_pd, _mm256_mask_i32gather_pd, _mm_mask_i64gather_pd _mm256_mask_i64gather_pd, _mm_mask_i32gather_ps, _mm256_mask_i32gather_ps _mm_mask_i64gather_ps, _mm256_mask_i64gather_ps llvm-svn: 159222
2012-06-27 03:55:09 +08:00
#define _mm_mask_i64gather_pd(a, m, i, mask, s) __extension__ ({ \
[X86] Change pointer type in AVX2 gather builtins to be the scalar type instead of the vector type. This matches gcc and removes extras casts. llvm-svn: 252697
2015-11-11 10:51:18 +08:00
(__m128d)__builtin_ia32_gatherq_pd((__v2df)(__m128d)(a), \
(double const *)(m), \
(__v2di)(__m128i)(i), \
(__v2df)(__m128d)(mask), (s)); })
X86: add GATHER intrinsics (AVX2) in Clang Support the following intrinsics: _mm_mask_i32gather_pd, _mm256_mask_i32gather_pd, _mm_mask_i64gather_pd _mm256_mask_i64gather_pd, _mm_mask_i32gather_ps, _mm256_mask_i32gather_ps _mm_mask_i64gather_ps, _mm256_mask_i64gather_ps llvm-svn: 159222
2012-06-27 03:55:09 +08:00
#define _mm256_mask_i64gather_pd(a, m, i, mask, s) __extension__ ({ \
[X86] Change pointer type in AVX2 gather builtins to be the scalar type instead of the vector type. This matches gcc and removes extras casts. llvm-svn: 252697
2015-11-11 10:51:18 +08:00
(__m256d)__builtin_ia32_gatherq_pd256((__v4df)(__m256d)(a), \
(double const *)(m), \
(__v4di)(__m256i)(i), \
(__v4df)(__m256d)(mask), (s)); })
X86: add GATHER intrinsics (AVX2) in Clang Support the following intrinsics: _mm_mask_i32gather_pd, _mm256_mask_i32gather_pd, _mm_mask_i64gather_pd _mm256_mask_i64gather_pd, _mm_mask_i32gather_ps, _mm256_mask_i32gather_ps _mm_mask_i64gather_ps, _mm256_mask_i64gather_ps llvm-svn: 159222
2012-06-27 03:55:09 +08:00
#define _mm_mask_i32gather_ps(a, m, i, mask, s) __extension__ ({ \
[X86] Change pointer type in AVX2 gather builtins to be the scalar type instead of the vector type. This matches gcc and removes extras casts. llvm-svn: 252697
2015-11-11 10:51:18 +08:00
(__m128)__builtin_ia32_gatherd_ps((__v4sf)(__m128)(a), \
(float const *)(m), \
(__v4si)(__m128i)(i), \
(__v4sf)(__m128)(mask), (s)); })
X86: add GATHER intrinsics (AVX2) in Clang Support the following intrinsics: _mm_mask_i32gather_pd, _mm256_mask_i32gather_pd, _mm_mask_i64gather_pd _mm256_mask_i64gather_pd, _mm_mask_i32gather_ps, _mm256_mask_i32gather_ps _mm_mask_i64gather_ps, _mm256_mask_i64gather_ps llvm-svn: 159222
2012-06-27 03:55:09 +08:00
#define _mm256_mask_i32gather_ps(a, m, i, mask, s) __extension__ ({ \
[X86] Change pointer type in AVX2 gather builtins to be the scalar type instead of the vector type. This matches gcc and removes extras casts. llvm-svn: 252697
2015-11-11 10:51:18 +08:00
(__m256)__builtin_ia32_gatherd_ps256((__v8sf)(__m256)(a), \
(float const *)(m), \
(__v8si)(__m256i)(i), \
(__v8sf)(__m256)(mask), (s)); })
X86: add GATHER intrinsics (AVX2) in Clang Support the following intrinsics: _mm_mask_i32gather_pd, _mm256_mask_i32gather_pd, _mm_mask_i64gather_pd _mm256_mask_i64gather_pd, _mm_mask_i32gather_ps, _mm256_mask_i32gather_ps _mm_mask_i64gather_ps, _mm256_mask_i64gather_ps llvm-svn: 159222
2012-06-27 03:55:09 +08:00
#define _mm_mask_i64gather_ps(a, m, i, mask, s) __extension__ ({ \
[X86] Change pointer type in AVX2 gather builtins to be the scalar type instead of the vector type. This matches gcc and removes extras casts. llvm-svn: 252697
2015-11-11 10:51:18 +08:00
(__m128)__builtin_ia32_gatherq_ps((__v4sf)(__m128)(a), \
(float const *)(m), \
(__v2di)(__m128i)(i), \
(__v4sf)(__m128)(mask), (s)); })
X86: add GATHER intrinsics (AVX2) in Clang Support the following intrinsics: _mm_mask_i32gather_pd, _mm256_mask_i32gather_pd, _mm_mask_i64gather_pd _mm256_mask_i64gather_pd, _mm_mask_i32gather_ps, _mm256_mask_i32gather_ps _mm_mask_i64gather_ps, _mm256_mask_i64gather_ps llvm-svn: 159222
2012-06-27 03:55:09 +08:00
#define _mm256_mask_i64gather_ps(a, m, i, mask, s) __extension__ ({ \
[X86] Change pointer type in AVX2 gather builtins to be the scalar type instead of the vector type. This matches gcc and removes extras casts. llvm-svn: 252697
2015-11-11 10:51:18 +08:00
(__m128)__builtin_ia32_gatherq_ps256((__v4sf)(__m128)(a), \
(float const *)(m), \
(__v4di)(__m256i)(i), \
(__v4sf)(__m128)(mask), (s)); })
X86: add more GATHER intrinsics in Clang Corrected type for index of _mm256_mask_i32gather_pd from 256-bit to 128-bit Corrected types for src|dst|mask of _mm256_mask_i64gather_ps from 256-bit to 128-bit Support the following intrinsics: _mm_mask_i32gather_epi64, _mm256_mask_i32gather_epi64, _mm_mask_i64gather_epi64, _mm256_mask_i64gather_epi64, _mm_mask_i32gather_epi32, _mm256_mask_i32gather_epi32, _mm_mask_i64gather_epi32, _mm256_mask_i64gather_epi32 llvm-svn: 159403
2012-06-29 08:54:35 +08:00
#define _mm_mask_i32gather_epi32(a, m, i, mask, s) __extension__ ({ \
[X86] Change pointer type in AVX2 gather builtins to be the scalar type instead of the vector type. This matches gcc and removes extras casts. llvm-svn: 252697
2015-11-11 10:51:18 +08:00
(__m128i)__builtin_ia32_gatherd_d((__v4si)(__m128i)(a), \
(int const *)(m), \
(__v4si)(__m128i)(i), \
(__v4si)(__m128i)(mask), (s)); })
X86: add more GATHER intrinsics in Clang Corrected type for index of _mm256_mask_i32gather_pd from 256-bit to 128-bit Corrected types for src|dst|mask of _mm256_mask_i64gather_ps from 256-bit to 128-bit Support the following intrinsics: _mm_mask_i32gather_epi64, _mm256_mask_i32gather_epi64, _mm_mask_i64gather_epi64, _mm256_mask_i64gather_epi64, _mm_mask_i32gather_epi32, _mm256_mask_i32gather_epi32, _mm_mask_i64gather_epi32, _mm256_mask_i64gather_epi32 llvm-svn: 159403
2012-06-29 08:54:35 +08:00
#define _mm256_mask_i32gather_epi32(a, m, i, mask, s) __extension__ ({ \
[X86] Change pointer type in AVX2 gather builtins to be the scalar type instead of the vector type. This matches gcc and removes extras casts. llvm-svn: 252697
2015-11-11 10:51:18 +08:00
(__m256i)__builtin_ia32_gatherd_d256((__v8si)(__m256i)(a), \
(int const *)(m), \
(__v8si)(__m256i)(i), \
(__v8si)(__m256i)(mask), (s)); })
X86: add more GATHER intrinsics in Clang Corrected type for index of _mm256_mask_i32gather_pd from 256-bit to 128-bit Corrected types for src|dst|mask of _mm256_mask_i64gather_ps from 256-bit to 128-bit Support the following intrinsics: _mm_mask_i32gather_epi64, _mm256_mask_i32gather_epi64, _mm_mask_i64gather_epi64, _mm256_mask_i64gather_epi64, _mm_mask_i32gather_epi32, _mm256_mask_i32gather_epi32, _mm_mask_i64gather_epi32, _mm256_mask_i64gather_epi32 llvm-svn: 159403
2012-06-29 08:54:35 +08:00
#define _mm_mask_i64gather_epi32(a, m, i, mask, s) __extension__ ({ \
[X86] Change pointer type in AVX2 gather builtins to be the scalar type instead of the vector type. This matches gcc and removes extras casts. llvm-svn: 252697
2015-11-11 10:51:18 +08:00
(__m128i)__builtin_ia32_gatherq_d((__v4si)(__m128i)(a), \
(int const *)(m), \
(__v2di)(__m128i)(i), \
(__v4si)(__m128i)(mask), (s)); })
X86: add more GATHER intrinsics in Clang Corrected type for index of _mm256_mask_i32gather_pd from 256-bit to 128-bit Corrected types for src|dst|mask of _mm256_mask_i64gather_ps from 256-bit to 128-bit Support the following intrinsics: _mm_mask_i32gather_epi64, _mm256_mask_i32gather_epi64, _mm_mask_i64gather_epi64, _mm256_mask_i64gather_epi64, _mm_mask_i32gather_epi32, _mm256_mask_i32gather_epi32, _mm_mask_i64gather_epi32, _mm256_mask_i64gather_epi32 llvm-svn: 159403
2012-06-29 08:54:35 +08:00
#define _mm256_mask_i64gather_epi32(a, m, i, mask, s) __extension__ ({ \
[X86] Change pointer type in AVX2 gather builtins to be the scalar type instead of the vector type. This matches gcc and removes extras casts. llvm-svn: 252697
2015-11-11 10:51:18 +08:00
(__m128i)__builtin_ia32_gatherq_d256((__v4si)(__m128i)(a), \
(int const *)(m), \
(__v4di)(__m256i)(i), \
(__v4si)(__m128i)(mask), (s)); })
X86: add more GATHER intrinsics in Clang Corrected type for index of _mm256_mask_i32gather_pd from 256-bit to 128-bit Corrected types for src|dst|mask of _mm256_mask_i64gather_ps from 256-bit to 128-bit Support the following intrinsics: _mm_mask_i32gather_epi64, _mm256_mask_i32gather_epi64, _mm_mask_i64gather_epi64, _mm256_mask_i64gather_epi64, _mm_mask_i32gather_epi32, _mm256_mask_i32gather_epi32, _mm_mask_i64gather_epi32, _mm256_mask_i64gather_epi32 llvm-svn: 159403
2012-06-29 08:54:35 +08:00
#define _mm_mask_i32gather_epi64(a, m, i, mask, s) __extension__ ({ \
[X86] Change pointer type in AVX2 gather builtins to be the scalar type instead of the vector type. This matches gcc and removes extras casts. llvm-svn: 252697
2015-11-11 10:51:18 +08:00
(__m128i)__builtin_ia32_gatherd_q((__v2di)(__m128i)(a), \
(long long const *)(m), \
(__v4si)(__m128i)(i), \
(__v2di)(__m128i)(mask), (s)); })
X86: add more GATHER intrinsics in Clang Corrected type for index of _mm256_mask_i32gather_pd from 256-bit to 128-bit Corrected types for src|dst|mask of _mm256_mask_i64gather_ps from 256-bit to 128-bit Support the following intrinsics: _mm_mask_i32gather_epi64, _mm256_mask_i32gather_epi64, _mm_mask_i64gather_epi64, _mm256_mask_i64gather_epi64, _mm_mask_i32gather_epi32, _mm256_mask_i32gather_epi32, _mm_mask_i64gather_epi32, _mm256_mask_i64gather_epi32 llvm-svn: 159403
2012-06-29 08:54:35 +08:00
#define _mm256_mask_i32gather_epi64(a, m, i, mask, s) __extension__ ({ \
[X86] Change pointer type in AVX2 gather builtins to be the scalar type instead of the vector type. This matches gcc and removes extras casts. llvm-svn: 252697
2015-11-11 10:51:18 +08:00
(__m256i)__builtin_ia32_gatherd_q256((__v4di)(__m256i)(a), \
(long long const *)(m), \
(__v4si)(__m128i)(i), \
(__v4di)(__m256i)(mask), (s)); })
X86: add more GATHER intrinsics in Clang Corrected type for index of _mm256_mask_i32gather_pd from 256-bit to 128-bit Corrected types for src|dst|mask of _mm256_mask_i64gather_ps from 256-bit to 128-bit Support the following intrinsics: _mm_mask_i32gather_epi64, _mm256_mask_i32gather_epi64, _mm_mask_i64gather_epi64, _mm256_mask_i64gather_epi64, _mm_mask_i32gather_epi32, _mm256_mask_i32gather_epi32, _mm_mask_i64gather_epi32, _mm256_mask_i64gather_epi32 llvm-svn: 159403
2012-06-29 08:54:35 +08:00
#define _mm_mask_i64gather_epi64(a, m, i, mask, s) __extension__ ({ \
[X86] Change pointer type in AVX2 gather builtins to be the scalar type instead of the vector type. This matches gcc and removes extras casts. llvm-svn: 252697
2015-11-11 10:51:18 +08:00
(__m128i)__builtin_ia32_gatherq_q((__v2di)(__m128i)(a), \
(long long const *)(m), \
(__v2di)(__m128i)(i), \
(__v2di)(__m128i)(mask), (s)); })
X86: add more GATHER intrinsics in Clang Corrected type for index of _mm256_mask_i32gather_pd from 256-bit to 128-bit Corrected types for src|dst|mask of _mm256_mask_i64gather_ps from 256-bit to 128-bit Support the following intrinsics: _mm_mask_i32gather_epi64, _mm256_mask_i32gather_epi64, _mm_mask_i64gather_epi64, _mm256_mask_i64gather_epi64, _mm_mask_i32gather_epi32, _mm256_mask_i32gather_epi32, _mm_mask_i64gather_epi32, _mm256_mask_i64gather_epi32 llvm-svn: 159403
2012-06-29 08:54:35 +08:00
#define _mm256_mask_i64gather_epi64(a, m, i, mask, s) __extension__ ({ \
[X86] Change pointer type in AVX2 gather builtins to be the scalar type instead of the vector type. This matches gcc and removes extras casts. llvm-svn: 252697
2015-11-11 10:51:18 +08:00
(__m256i)__builtin_ia32_gatherq_q256((__v4di)(__m256i)(a), \
(long long const *)(m), \
(__v4di)(__m256i)(i), \
(__v4di)(__m256i)(mask), (s)); })
X86: add more GATHER intrinsics in Clang Support the following intrinsics: _mm_i32gather_pd, _mm256_i32gather_pd, _mm_i64gather_pd, _mm256_i64gather_pd, _mm_i32gather_ps, _mm256_i32gather_ps, _mm_i64gather_ps, _mm256_i64gather_ps, _mm_i32gather_epi64, _mm256_i32gather_epi64, _mm_i64gather_epi64, _mm256_i64gather_epi64, _mm_i32gather_epi32, _mm256_i32gather_epi32, _mm_i64gather_epi32, _mm256_i64gather_epi32 llvm-svn: 159410
2012-06-29 13:19:13 +08:00
#define _mm_i32gather_pd(m, i, s) __extension__ ({ \
[X86] Improve codegen for AVX2 gather with an all 1s mask. Use undefined instead of setzero as the pass through input since its going to be fully overwritten. Use cmpeq of two zero vectors to produce the all 1s vector. Casting -1 to a double and vectorizing causes a constant load of a -1.0 floating point value. llvm-svn: 254389
2015-12-01 15:12:59 +08:00
(__m128d)__builtin_ia32_gatherd_pd((__v2df)_mm_undefined_pd(), \
[X86] Change pointer type in AVX2 gather builtins to be the scalar type instead of the vector type. This matches gcc and removes extras casts. llvm-svn: 252697
2015-11-11 10:51:18 +08:00
(double const *)(m), \
(__v4si)(__m128i)(i), \
[X86] Improve codegen for AVX2 gather with an all 1s mask. Use undefined instead of setzero as the pass through input since its going to be fully overwritten. Use cmpeq of two zero vectors to produce the all 1s vector. Casting -1 to a double and vectorizing causes a constant load of a -1.0 floating point value. llvm-svn: 254389
2015-12-01 15:12:59 +08:00
(__v2df)_mm_cmpeq_pd(_mm_setzero_pd(), \
_mm_setzero_pd()), \
[X86] Change pointer type in AVX2 gather builtins to be the scalar type instead of the vector type. This matches gcc and removes extras casts. llvm-svn: 252697
2015-11-11 10:51:18 +08:00
(s)); })
X86: add more GATHER intrinsics in Clang Support the following intrinsics: _mm_i32gather_pd, _mm256_i32gather_pd, _mm_i64gather_pd, _mm256_i64gather_pd, _mm_i32gather_ps, _mm256_i32gather_ps, _mm_i64gather_ps, _mm256_i64gather_ps, _mm_i32gather_epi64, _mm256_i32gather_epi64, _mm_i64gather_epi64, _mm256_i64gather_epi64, _mm_i32gather_epi32, _mm256_i32gather_epi32, _mm_i64gather_epi32, _mm256_i64gather_epi32 llvm-svn: 159410
2012-06-29 13:19:13 +08:00
#define _mm256_i32gather_pd(m, i, s) __extension__ ({ \
[X86] Improve codegen for AVX2 gather with an all 1s mask. Use undefined instead of setzero as the pass through input since its going to be fully overwritten. Use cmpeq of two zero vectors to produce the all 1s vector. Casting -1 to a double and vectorizing causes a constant load of a -1.0 floating point value. llvm-svn: 254389
2015-12-01 15:12:59 +08:00
(__m256d)__builtin_ia32_gatherd_pd256((__v4df)_mm256_undefined_pd(), \
[X86] Change pointer type in AVX2 gather builtins to be the scalar type instead of the vector type. This matches gcc and removes extras casts. llvm-svn: 252697
2015-11-11 10:51:18 +08:00
(double const *)(m), \
(__v4si)(__m128i)(i), \
[X86] Improve codegen for AVX2 gather with an all 1s mask. Use undefined instead of setzero as the pass through input since its going to be fully overwritten. Use cmpeq of two zero vectors to produce the all 1s vector. Casting -1 to a double and vectorizing causes a constant load of a -1.0 floating point value. llvm-svn: 254389
2015-12-01 15:12:59 +08:00
(__v4df)_mm256_cmp_pd(_mm256_setzero_pd(), \
_mm256_setzero_pd(), \
_CMP_EQ_OQ), \
[X86] Change pointer type in AVX2 gather builtins to be the scalar type instead of the vector type. This matches gcc and removes extras casts. llvm-svn: 252697
2015-11-11 10:51:18 +08:00
(s)); })
X86: add more GATHER intrinsics in Clang Support the following intrinsics: _mm_i32gather_pd, _mm256_i32gather_pd, _mm_i64gather_pd, _mm256_i64gather_pd, _mm_i32gather_ps, _mm256_i32gather_ps, _mm_i64gather_ps, _mm256_i64gather_ps, _mm_i32gather_epi64, _mm256_i32gather_epi64, _mm_i64gather_epi64, _mm256_i64gather_epi64, _mm_i32gather_epi32, _mm256_i32gather_epi32, _mm_i64gather_epi32, _mm256_i64gather_epi32 llvm-svn: 159410
2012-06-29 13:19:13 +08:00
#define _mm_i64gather_pd(m, i, s) __extension__ ({ \
[X86] Improve codegen for AVX2 gather with an all 1s mask. Use undefined instead of setzero as the pass through input since its going to be fully overwritten. Use cmpeq of two zero vectors to produce the all 1s vector. Casting -1 to a double and vectorizing causes a constant load of a -1.0 floating point value. llvm-svn: 254389
2015-12-01 15:12:59 +08:00
(__m128d)__builtin_ia32_gatherq_pd((__v2df)_mm_undefined_pd(), \
[X86] Change pointer type in AVX2 gather builtins to be the scalar type instead of the vector type. This matches gcc and removes extras casts. llvm-svn: 252697
2015-11-11 10:51:18 +08:00
(double const *)(m), \
(__v2di)(__m128i)(i), \
[X86] Improve codegen for AVX2 gather with an all 1s mask. Use undefined instead of setzero as the pass through input since its going to be fully overwritten. Use cmpeq of two zero vectors to produce the all 1s vector. Casting -1 to a double and vectorizing causes a constant load of a -1.0 floating point value. llvm-svn: 254389
2015-12-01 15:12:59 +08:00
(__v2df)_mm_cmpeq_pd(_mm_setzero_pd(), \
_mm_setzero_pd()), \
[X86] Change pointer type in AVX2 gather builtins to be the scalar type instead of the vector type. This matches gcc and removes extras casts. llvm-svn: 252697
2015-11-11 10:51:18 +08:00
(s)); })
X86: add more GATHER intrinsics in Clang Support the following intrinsics: _mm_i32gather_pd, _mm256_i32gather_pd, _mm_i64gather_pd, _mm256_i64gather_pd, _mm_i32gather_ps, _mm256_i32gather_ps, _mm_i64gather_ps, _mm256_i64gather_ps, _mm_i32gather_epi64, _mm256_i32gather_epi64, _mm_i64gather_epi64, _mm256_i64gather_epi64, _mm_i32gather_epi32, _mm256_i32gather_epi32, _mm_i64gather_epi32, _mm256_i64gather_epi32 llvm-svn: 159410
2012-06-29 13:19:13 +08:00
#define _mm256_i64gather_pd(m, i, s) __extension__ ({ \
[X86] Improve codegen for AVX2 gather with an all 1s mask. Use undefined instead of setzero as the pass through input since its going to be fully overwritten. Use cmpeq of two zero vectors to produce the all 1s vector. Casting -1 to a double and vectorizing causes a constant load of a -1.0 floating point value. llvm-svn: 254389
2015-12-01 15:12:59 +08:00
(__m256d)__builtin_ia32_gatherq_pd256((__v4df)_mm256_undefined_pd(), \
[X86] Change pointer type in AVX2 gather builtins to be the scalar type instead of the vector type. This matches gcc and removes extras casts. llvm-svn: 252697
2015-11-11 10:51:18 +08:00
(double const *)(m), \
(__v4di)(__m256i)(i), \
[X86] Improve codegen for AVX2 gather with an all 1s mask. Use undefined instead of setzero as the pass through input since its going to be fully overwritten. Use cmpeq of two zero vectors to produce the all 1s vector. Casting -1 to a double and vectorizing causes a constant load of a -1.0 floating point value. llvm-svn: 254389
2015-12-01 15:12:59 +08:00
(__v4df)_mm256_cmp_pd(_mm256_setzero_pd(), \
_mm256_setzero_pd(), \
_CMP_EQ_OQ), \
[X86] Change pointer type in AVX2 gather builtins to be the scalar type instead of the vector type. This matches gcc and removes extras casts. llvm-svn: 252697
2015-11-11 10:51:18 +08:00
(s)); })
X86: add more GATHER intrinsics in Clang Support the following intrinsics: _mm_i32gather_pd, _mm256_i32gather_pd, _mm_i64gather_pd, _mm256_i64gather_pd, _mm_i32gather_ps, _mm256_i32gather_ps, _mm_i64gather_ps, _mm256_i64gather_ps, _mm_i32gather_epi64, _mm256_i32gather_epi64, _mm_i64gather_epi64, _mm256_i64gather_epi64, _mm_i32gather_epi32, _mm256_i32gather_epi32, _mm_i64gather_epi32, _mm256_i64gather_epi32 llvm-svn: 159410
2012-06-29 13:19:13 +08:00
#define _mm_i32gather_ps(m, i, s) __extension__ ({ \
[X86] Improve codegen for AVX2 gather with an all 1s mask. Use undefined instead of setzero as the pass through input since its going to be fully overwritten. Use cmpeq of two zero vectors to produce the all 1s vector. Casting -1 to a double and vectorizing causes a constant load of a -1.0 floating point value. llvm-svn: 254389
2015-12-01 15:12:59 +08:00
(__m128)__builtin_ia32_gatherd_ps((__v4sf)_mm_undefined_ps(), \
(float const *)(m), \
(__v4si)(__m128i)(i), \
(__v4sf)_mm_cmpeq_ps(_mm_setzero_ps(), \
_mm_setzero_ps()), \
[X86] Change pointer type in AVX2 gather builtins to be the scalar type instead of the vector type. This matches gcc and removes extras casts. llvm-svn: 252697
2015-11-11 10:51:18 +08:00
(s)); })
X86: add more GATHER intrinsics in Clang Support the following intrinsics: _mm_i32gather_pd, _mm256_i32gather_pd, _mm_i64gather_pd, _mm256_i64gather_pd, _mm_i32gather_ps, _mm256_i32gather_ps, _mm_i64gather_ps, _mm256_i64gather_ps, _mm_i32gather_epi64, _mm256_i32gather_epi64, _mm_i64gather_epi64, _mm256_i64gather_epi64, _mm_i32gather_epi32, _mm256_i32gather_epi32, _mm_i64gather_epi32, _mm256_i64gather_epi32 llvm-svn: 159410
2012-06-29 13:19:13 +08:00
#define _mm256_i32gather_ps(m, i, s) __extension__ ({ \
[X86] Improve codegen for AVX2 gather with an all 1s mask. Use undefined instead of setzero as the pass through input since its going to be fully overwritten. Use cmpeq of two zero vectors to produce the all 1s vector. Casting -1 to a double and vectorizing causes a constant load of a -1.0 floating point value. llvm-svn: 254389
2015-12-01 15:12:59 +08:00
(__m256)__builtin_ia32_gatherd_ps256((__v8sf)_mm256_undefined_ps(), \
[X86] Change pointer type in AVX2 gather builtins to be the scalar type instead of the vector type. This matches gcc and removes extras casts. llvm-svn: 252697
2015-11-11 10:51:18 +08:00
(float const *)(m), \
(__v8si)(__m256i)(i), \
[X86] Improve codegen for AVX2 gather with an all 1s mask. Use undefined instead of setzero as the pass through input since its going to be fully overwritten. Use cmpeq of two zero vectors to produce the all 1s vector. Casting -1 to a double and vectorizing causes a constant load of a -1.0 floating point value. llvm-svn: 254389
2015-12-01 15:12:59 +08:00
(__v8sf)_mm256_cmp_ps(_mm256_setzero_ps(), \
_mm256_setzero_ps(), \
_CMP_EQ_OQ), \
[X86] Change pointer type in AVX2 gather builtins to be the scalar type instead of the vector type. This matches gcc and removes extras casts. llvm-svn: 252697
2015-11-11 10:51:18 +08:00
(s)); })
X86: add more GATHER intrinsics in Clang Support the following intrinsics: _mm_i32gather_pd, _mm256_i32gather_pd, _mm_i64gather_pd, _mm256_i64gather_pd, _mm_i32gather_ps, _mm256_i32gather_ps, _mm_i64gather_ps, _mm256_i64gather_ps, _mm_i32gather_epi64, _mm256_i32gather_epi64, _mm_i64gather_epi64, _mm256_i64gather_epi64, _mm_i32gather_epi32, _mm256_i32gather_epi32, _mm_i64gather_epi32, _mm256_i64gather_epi32 llvm-svn: 159410
2012-06-29 13:19:13 +08:00
#define _mm_i64gather_ps(m, i, s) __extension__ ({ \
[X86] Improve codegen for AVX2 gather with an all 1s mask. Use undefined instead of setzero as the pass through input since its going to be fully overwritten. Use cmpeq of two zero vectors to produce the all 1s vector. Casting -1 to a double and vectorizing causes a constant load of a -1.0 floating point value. llvm-svn: 254389
2015-12-01 15:12:59 +08:00
(__m128)__builtin_ia32_gatherq_ps((__v4sf)_mm_undefined_ps(), \
(float const *)(m), \
(__v2di)(__m128i)(i), \
(__v4sf)_mm_cmpeq_ps(_mm_setzero_ps(), \
_mm_setzero_ps()), \
[X86] Change pointer type in AVX2 gather builtins to be the scalar type instead of the vector type. This matches gcc and removes extras casts. llvm-svn: 252697
2015-11-11 10:51:18 +08:00
(s)); })
X86: add more GATHER intrinsics in Clang Support the following intrinsics: _mm_i32gather_pd, _mm256_i32gather_pd, _mm_i64gather_pd, _mm256_i64gather_pd, _mm_i32gather_ps, _mm256_i32gather_ps, _mm_i64gather_ps, _mm256_i64gather_ps, _mm_i32gather_epi64, _mm256_i32gather_epi64, _mm_i64gather_epi64, _mm256_i64gather_epi64, _mm_i32gather_epi32, _mm256_i32gather_epi32, _mm_i64gather_epi32, _mm256_i64gather_epi32 llvm-svn: 159410
2012-06-29 13:19:13 +08:00
#define _mm256_i64gather_ps(m, i, s) __extension__ ({ \
[X86] Improve codegen for AVX2 gather with an all 1s mask. Use undefined instead of setzero as the pass through input since its going to be fully overwritten. Use cmpeq of two zero vectors to produce the all 1s vector. Casting -1 to a double and vectorizing causes a constant load of a -1.0 floating point value. llvm-svn: 254389
2015-12-01 15:12:59 +08:00
(__m128)__builtin_ia32_gatherq_ps256((__v4sf)_mm_undefined_ps(), \
[X86] Change pointer type in AVX2 gather builtins to be the scalar type instead of the vector type. This matches gcc and removes extras casts. llvm-svn: 252697
2015-11-11 10:51:18 +08:00
(float const *)(m), \
(__v4di)(__m256i)(i), \
[X86] Improve codegen for AVX2 gather with an all 1s mask. Use undefined instead of setzero as the pass through input since its going to be fully overwritten. Use cmpeq of two zero vectors to produce the all 1s vector. Casting -1 to a double and vectorizing causes a constant load of a -1.0 floating point value. llvm-svn: 254389
2015-12-01 15:12:59 +08:00
(__v4sf)_mm_cmpeq_ps(_mm_setzero_ps(), \
_mm_setzero_ps()), \
[X86] Change pointer type in AVX2 gather builtins to be the scalar type instead of the vector type. This matches gcc and removes extras casts. llvm-svn: 252697
2015-11-11 10:51:18 +08:00
(s)); })
X86: add more GATHER intrinsics in Clang Support the following intrinsics: _mm_i32gather_pd, _mm256_i32gather_pd, _mm_i64gather_pd, _mm256_i64gather_pd, _mm_i32gather_ps, _mm256_i32gather_ps, _mm_i64gather_ps, _mm256_i64gather_ps, _mm_i32gather_epi64, _mm256_i32gather_epi64, _mm_i64gather_epi64, _mm256_i64gather_epi64, _mm_i32gather_epi32, _mm256_i32gather_epi32, _mm_i64gather_epi32, _mm256_i64gather_epi32 llvm-svn: 159410
2012-06-29 13:19:13 +08:00
#define _mm_i32gather_epi32(m, i, s) __extension__ ({ \
[X86] Improve codegen for AVX2 gather with an all 1s mask. Use undefined instead of setzero as the pass through input since its going to be fully overwritten. Use cmpeq of two zero vectors to produce the all 1s vector. Casting -1 to a double and vectorizing causes a constant load of a -1.0 floating point value. llvm-svn: 254389
2015-12-01 15:12:59 +08:00
(__m128i)__builtin_ia32_gatherd_d((__v4si)_mm_undefined_si128(), \
[X86] Change pointer type in AVX2 gather builtins to be the scalar type instead of the vector type. This matches gcc and removes extras casts. llvm-svn: 252697
2015-11-11 10:51:18 +08:00
(int const *)(m), (__v4si)(__m128i)(i), \
(__v4si)_mm_set1_epi32(-1), (s)); })
X86: add more GATHER intrinsics in Clang Support the following intrinsics: _mm_i32gather_pd, _mm256_i32gather_pd, _mm_i64gather_pd, _mm256_i64gather_pd, _mm_i32gather_ps, _mm256_i32gather_ps, _mm_i64gather_ps, _mm256_i64gather_ps, _mm_i32gather_epi64, _mm256_i32gather_epi64, _mm_i64gather_epi64, _mm256_i64gather_epi64, _mm_i32gather_epi32, _mm256_i32gather_epi32, _mm_i64gather_epi32, _mm256_i64gather_epi32 llvm-svn: 159410
2012-06-29 13:19:13 +08:00
#define _mm256_i32gather_epi32(m, i, s) __extension__ ({ \
[X86] Improve codegen for AVX2 gather with an all 1s mask. Use undefined instead of setzero as the pass through input since its going to be fully overwritten. Use cmpeq of two zero vectors to produce the all 1s vector. Casting -1 to a double and vectorizing causes a constant load of a -1.0 floating point value. llvm-svn: 254389
2015-12-01 15:12:59 +08:00
(__m256i)__builtin_ia32_gatherd_d256((__v8si)_mm256_undefined_si256(), \
[X86] Change pointer type in AVX2 gather builtins to be the scalar type instead of the vector type. This matches gcc and removes extras casts. llvm-svn: 252697
2015-11-11 10:51:18 +08:00
(int const *)(m), (__v8si)(__m256i)(i), \
(__v8si)_mm256_set1_epi32(-1), (s)); })
X86: add more GATHER intrinsics in Clang Support the following intrinsics: _mm_i32gather_pd, _mm256_i32gather_pd, _mm_i64gather_pd, _mm256_i64gather_pd, _mm_i32gather_ps, _mm256_i32gather_ps, _mm_i64gather_ps, _mm256_i64gather_ps, _mm_i32gather_epi64, _mm256_i32gather_epi64, _mm_i64gather_epi64, _mm256_i64gather_epi64, _mm_i32gather_epi32, _mm256_i32gather_epi32, _mm_i64gather_epi32, _mm256_i64gather_epi32 llvm-svn: 159410
2012-06-29 13:19:13 +08:00
#define _mm_i64gather_epi32(m, i, s) __extension__ ({ \
[X86] Improve codegen for AVX2 gather with an all 1s mask. Use undefined instead of setzero as the pass through input since its going to be fully overwritten. Use cmpeq of two zero vectors to produce the all 1s vector. Casting -1 to a double and vectorizing causes a constant load of a -1.0 floating point value. llvm-svn: 254389
2015-12-01 15:12:59 +08:00
(__m128i)__builtin_ia32_gatherq_d((__v4si)_mm_undefined_si128(), \
[X86] Change pointer type in AVX2 gather builtins to be the scalar type instead of the vector type. This matches gcc and removes extras casts. llvm-svn: 252697
2015-11-11 10:51:18 +08:00
(int const *)(m), (__v2di)(__m128i)(i), \
(__v4si)_mm_set1_epi32(-1), (s)); })
X86: add more GATHER intrinsics in Clang Support the following intrinsics: _mm_i32gather_pd, _mm256_i32gather_pd, _mm_i64gather_pd, _mm256_i64gather_pd, _mm_i32gather_ps, _mm256_i32gather_ps, _mm_i64gather_ps, _mm256_i64gather_ps, _mm_i32gather_epi64, _mm256_i32gather_epi64, _mm_i64gather_epi64, _mm256_i64gather_epi64, _mm_i32gather_epi32, _mm256_i32gather_epi32, _mm_i64gather_epi32, _mm256_i64gather_epi32 llvm-svn: 159410
2012-06-29 13:19:13 +08:00
#define _mm256_i64gather_epi32(m, i, s) __extension__ ({ \
[X86] Improve codegen for AVX2 gather with an all 1s mask. Use undefined instead of setzero as the pass through input since its going to be fully overwritten. Use cmpeq of two zero vectors to produce the all 1s vector. Casting -1 to a double and vectorizing causes a constant load of a -1.0 floating point value. llvm-svn: 254389
2015-12-01 15:12:59 +08:00
(__m128i)__builtin_ia32_gatherq_d256((__v4si)_mm_undefined_si128(), \
[X86] Change pointer type in AVX2 gather builtins to be the scalar type instead of the vector type. This matches gcc and removes extras casts. llvm-svn: 252697
2015-11-11 10:51:18 +08:00
(int const *)(m), (__v4di)(__m256i)(i), \
(__v4si)_mm_set1_epi32(-1), (s)); })
X86: add more GATHER intrinsics in Clang Support the following intrinsics: _mm_i32gather_pd, _mm256_i32gather_pd, _mm_i64gather_pd, _mm256_i64gather_pd, _mm_i32gather_ps, _mm256_i32gather_ps, _mm_i64gather_ps, _mm256_i64gather_ps, _mm_i32gather_epi64, _mm256_i32gather_epi64, _mm_i64gather_epi64, _mm256_i64gather_epi64, _mm_i32gather_epi32, _mm256_i32gather_epi32, _mm_i64gather_epi32, _mm256_i64gather_epi32 llvm-svn: 159410
2012-06-29 13:19:13 +08:00
#define _mm_i32gather_epi64(m, i, s) __extension__ ({ \
[X86] Improve codegen for AVX2 gather with an all 1s mask. Use undefined instead of setzero as the pass through input since its going to be fully overwritten. Use cmpeq of two zero vectors to produce the all 1s vector. Casting -1 to a double and vectorizing causes a constant load of a -1.0 floating point value. llvm-svn: 254389
2015-12-01 15:12:59 +08:00
(__m128i)__builtin_ia32_gatherd_q((__v2di)_mm_undefined_si128(), \
[X86] Change pointer type in AVX2 gather builtins to be the scalar type instead of the vector type. This matches gcc and removes extras casts. llvm-svn: 252697
2015-11-11 10:51:18 +08:00
(long long const *)(m), \
(__v4si)(__m128i)(i), \
(__v2di)_mm_set1_epi64x(-1), (s)); })
X86: add more GATHER intrinsics in Clang Support the following intrinsics: _mm_i32gather_pd, _mm256_i32gather_pd, _mm_i64gather_pd, _mm256_i64gather_pd, _mm_i32gather_ps, _mm256_i32gather_ps, _mm_i64gather_ps, _mm256_i64gather_ps, _mm_i32gather_epi64, _mm256_i32gather_epi64, _mm_i64gather_epi64, _mm256_i64gather_epi64, _mm_i32gather_epi32, _mm256_i32gather_epi32, _mm_i64gather_epi32, _mm256_i64gather_epi32 llvm-svn: 159410
2012-06-29 13:19:13 +08:00
#define _mm256_i32gather_epi64(m, i, s) __extension__ ({ \
[X86] Improve codegen for AVX2 gather with an all 1s mask. Use undefined instead of setzero as the pass through input since its going to be fully overwritten. Use cmpeq of two zero vectors to produce the all 1s vector. Casting -1 to a double and vectorizing causes a constant load of a -1.0 floating point value. llvm-svn: 254389
2015-12-01 15:12:59 +08:00
(__m256i)__builtin_ia32_gatherd_q256((__v4di)_mm256_undefined_si256(), \
[X86] Change pointer type in AVX2 gather builtins to be the scalar type instead of the vector type. This matches gcc and removes extras casts. llvm-svn: 252697
2015-11-11 10:51:18 +08:00
(long long const *)(m), \
(__v4si)(__m128i)(i), \
(__v4di)_mm256_set1_epi64x(-1), (s)); })
X86: add more GATHER intrinsics in Clang Support the following intrinsics: _mm_i32gather_pd, _mm256_i32gather_pd, _mm_i64gather_pd, _mm256_i64gather_pd, _mm_i32gather_ps, _mm256_i32gather_ps, _mm_i64gather_ps, _mm256_i64gather_ps, _mm_i32gather_epi64, _mm256_i32gather_epi64, _mm_i64gather_epi64, _mm256_i64gather_epi64, _mm_i32gather_epi32, _mm256_i32gather_epi32, _mm_i64gather_epi32, _mm256_i64gather_epi32 llvm-svn: 159410
2012-06-29 13:19:13 +08:00
#define _mm_i64gather_epi64(m, i, s) __extension__ ({ \
[X86] Improve codegen for AVX2 gather with an all 1s mask. Use undefined instead of setzero as the pass through input since its going to be fully overwritten. Use cmpeq of two zero vectors to produce the all 1s vector. Casting -1 to a double and vectorizing causes a constant load of a -1.0 floating point value. llvm-svn: 254389
2015-12-01 15:12:59 +08:00
(__m128i)__builtin_ia32_gatherq_q((__v2di)_mm_undefined_si128(), \
[X86] Change pointer type in AVX2 gather builtins to be the scalar type instead of the vector type. This matches gcc and removes extras casts. llvm-svn: 252697
2015-11-11 10:51:18 +08:00
(long long const *)(m), \
(__v2di)(__m128i)(i), \
(__v2di)_mm_set1_epi64x(-1), (s)); })
X86: add more GATHER intrinsics in Clang Support the following intrinsics: _mm_i32gather_pd, _mm256_i32gather_pd, _mm_i64gather_pd, _mm256_i64gather_pd, _mm_i32gather_ps, _mm256_i32gather_ps, _mm_i64gather_ps, _mm256_i64gather_ps, _mm_i32gather_epi64, _mm256_i32gather_epi64, _mm_i64gather_epi64, _mm256_i64gather_epi64, _mm_i32gather_epi32, _mm256_i32gather_epi32, _mm_i64gather_epi32, _mm256_i64gather_epi32 llvm-svn: 159410
2012-06-29 13:19:13 +08:00
#define _mm256_i64gather_epi64(m, i, s) __extension__ ({ \
[X86] Improve codegen for AVX2 gather with an all 1s mask. Use undefined instead of setzero as the pass through input since its going to be fully overwritten. Use cmpeq of two zero vectors to produce the all 1s vector. Casting -1 to a double and vectorizing causes a constant load of a -1.0 floating point value. llvm-svn: 254389
2015-12-01 15:12:59 +08:00
(__m256i)__builtin_ia32_gatherq_q256((__v4di)_mm256_undefined_si256(), \
[X86] Change pointer type in AVX2 gather builtins to be the scalar type instead of the vector type. This matches gcc and removes extras casts. llvm-svn: 252697
2015-11-11 10:51:18 +08:00
(long long const *)(m), \
(__v4di)(__m256i)(i), \
(__v4di)_mm256_set1_epi64x(-1), (s)); })
Add missing include guards into headers in lib/Headers. While it may appear that these headers should not be included more than once, they are in fact included twice when building our builtins module (in order for it to generate submodules for them), and without this, any modular build enabling AVX and including any builtin header fails. Testing this is tricky because including any of these headers in a modular build is liable to fail, due to unrelated builtin headers in the same module including headers which might not be available on the system running the tests. Suggestion on that front are welcome (but we're getting close to being able to run a buildbot that has modules enabled for all tests, which would nicely solve the testing problem). llvm-svn: 186275
2013-07-14 13:41:45 +08:00
[X86] Rename DEFAULT_FN_ATTR macro to __DEFAULT_FN_ATTR llvm-svn: 241065
2015-06-30 21:36:19 +08:00
#undef __DEFAULT_FN_ATTRS
Use a define for per-file function attributes for the Intel intrinsic headers. This is a precursor to changing them to use the new target attribute code. llvm-svn: 239882
2015-06-17 15:09:20 +08:00
Add missing include guards into headers in lib/Headers. While it may appear that these headers should not be included more than once, they are in fact included twice when building our builtins module (in order for it to generate submodules for them), and without this, any modular build enabling AVX and including any builtin header fails. Testing this is tricky because including any of these headers in a modular build is liable to fail, due to unrelated builtin headers in the same module including headers which might not be available on the system running the tests. Suggestion on that front are welcome (but we're getting close to being able to run a buildbot that has modules enabled for all tests, which would nicely solve the testing problem). llvm-svn: 186275
2013-07-14 13:41:45 +08:00
#endif /* __AVX2INTRIN_H */