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llvm-project/lld/test/ELF/aarch64-tstbr14-reloc.s

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[ELF] Move `# REQUIRES:` line to the top llvm-svn: 335625
2018-06-27 00:58:19 +08:00
# REQUIRES: aarch64
[ELF/AARCH64] - Implemented R_AARCH64_TSTBR14 relocation. R_AARCH64_TSTBR14 is calculated as S+A-P, Set the immediate field of a TBZ/TBNZ instruction to bits [15:2] of X; check -2^15 ≤ X < 2^15 Differential revision: http://reviews.llvm.org/D15824 llvm-svn: 257334
2016-01-11 22:27:05 +08:00
# RUN: llvm-mc -filetype=obj -triple=aarch64-unknown-freebsd %p/Inputs/aarch64-tstbr14-reloc.s -o %t1
# RUN: llvm-mc -filetype=obj -triple=aarch64-unknown-freebsd %s -o %t2
# RUN: ld.lld %t1 %t2 -o %t
[ELF][AArch64] Improve some aarch64-*.s tests * Delete aarch64-tls-static.s: it is covered by aarch64-tlsdesc.c * Add --no-show-raw-insn to llvm-objdump -d tests * When linking an executable with %t.so, the path %t.so will be recorded in the DT_NEEDED entry if %t.so doesn't have DT_SONAME. The DT_NEEDED has varying lengths on different systems. Add -soname to make tests more robust. This issue will become outstanding if we allow overlapping PT_LOAD (D64930). llvm-svn: 366532
2019-07-19 14:33:36 +08:00
# RUN: llvm-objdump -d --no-show-raw-insn %t | FileCheck %s
[ELF/AARCH64] - Implemented R_AARCH64_TSTBR14 relocation. R_AARCH64_TSTBR14 is calculated as S+A-P, Set the immediate field of a TBZ/TBNZ instruction to bits [15:2] of X; check -2^15 ≤ X < 2^15 Differential revision: http://reviews.llvm.org/D15824 llvm-svn: 257334
2016-01-11 22:27:05 +08:00
# RUN: ld.lld -shared %t1 %t2 -o %t3
[ELF][AArch64] Improve some aarch64-*.s tests * Delete aarch64-tls-static.s: it is covered by aarch64-tlsdesc.c * Add --no-show-raw-insn to llvm-objdump -d tests * When linking an executable with %t.so, the path %t.so will be recorded in the DT_NEEDED entry if %t.so doesn't have DT_SONAME. The DT_NEEDED has varying lengths on different systems. Add -soname to make tests more robust. This issue will become outstanding if we allow overlapping PT_LOAD (D64930). llvm-svn: 366532
2019-07-19 14:33:36 +08:00
# RUN: llvm-objdump -d --no-show-raw-insn %t3 | FileCheck -check-prefix=DSO %s
[test] Change llvm-readobj -long-option to --long-option or well-known short options. NFC Also change some options that have different semantics (cause confusion) in llvm-readelf mode: -s => -S -t => --symbols -sd => --section-data llvm-svn: 359651
2019-05-01 13:49:01 +08:00
# RUN: llvm-readobj -S -r %t3 | FileCheck -check-prefix=DSOREL %s
[ELF/AARCH64] - Implemented R_AARCH64_TSTBR14 relocation. R_AARCH64_TSTBR14 is calculated as S+A-P, Set the immediate field of a TBZ/TBNZ instruction to bits [15:2] of X; check -2^15 ≤ X < 2^15 Differential revision: http://reviews.llvm.org/D15824 llvm-svn: 257334
2016-01-11 22:27:05 +08:00
[ELF][AArch64] Allow PT_LOAD to have overlapping p_offset ranges Ported the D64906 technique to AArch64. It deletes 3 alignments at PT_LOAD boundaries for the default case: the size of an aarch64 binary decreases by at most 192kb. If `sh_addralign(.tdata) < sh_addralign(.tbss)`, we can potentially make `p_vaddr(PT_TLS)%p_align(PT_TLS) != 0`. ld.so that are known to have problems if p_vaddr%p_align!=0: * musl<=1.1.22 * FreeBSD 13.0-CURRENT (and before) rtld-elf arm64 New test aarch64-tls-vaddr-align.s checks that our workaround makes p_vaddr%p_align = 0. Reviewed By: ruiu Differential Revision: https://reviews.llvm.org/D64930 llvm-svn: 369344
2019-08-20 16:34:56 +08:00
# CHECK: _foo:
# CHECK-NEXT: 210120: nop
# CHECK-NEXT: 210124: nop
# CHECK-NEXT: 210128: nop
# CHECK-NEXT: 21012c: nop
[ELF/AARCH64] - Implemented R_AARCH64_TSTBR14 relocation. R_AARCH64_TSTBR14 is calculated as S+A-P, Set the immediate field of a TBZ/TBNZ instruction to bits [15:2] of X; check -2^15 ≤ X < 2^15 Differential revision: http://reviews.llvm.org/D15824 llvm-svn: 257334
2016-01-11 22:27:05 +08:00
# CHECK: _bar:
[ELF][AArch64] Allow PT_LOAD to have overlapping p_offset ranges Ported the D64906 technique to AArch64. It deletes 3 alignments at PT_LOAD boundaries for the default case: the size of an aarch64 binary decreases by at most 192kb. If `sh_addralign(.tdata) < sh_addralign(.tbss)`, we can potentially make `p_vaddr(PT_TLS)%p_align(PT_TLS) != 0`. ld.so that are known to have problems if p_vaddr%p_align!=0: * musl<=1.1.22 * FreeBSD 13.0-CURRENT (and before) rtld-elf arm64 New test aarch64-tls-vaddr-align.s checks that our workaround makes p_vaddr%p_align = 0. Reviewed By: ruiu Differential Revision: https://reviews.llvm.org/D64930 llvm-svn: 369344
2019-08-20 16:34:56 +08:00
# CHECK-NEXT: 210130: nop
# CHECK-NEXT: 210134: nop
# CHECK-NEXT: 210138: nop
[ELF/AARCH64] - Implemented R_AARCH64_TSTBR14 relocation. R_AARCH64_TSTBR14 is calculated as S+A-P, Set the immediate field of a TBZ/TBNZ instruction to bits [15:2] of X; check -2^15 ≤ X < 2^15 Differential revision: http://reviews.llvm.org/D15824 llvm-svn: 257334
2016-01-11 22:27:05 +08:00
# CHECK: _start:
[ELF][AArch64] Allow PT_LOAD to have overlapping p_offset ranges Ported the D64906 technique to AArch64. It deletes 3 alignments at PT_LOAD boundaries for the default case: the size of an aarch64 binary decreases by at most 192kb. If `sh_addralign(.tdata) < sh_addralign(.tbss)`, we can potentially make `p_vaddr(PT_TLS)%p_align(PT_TLS) != 0`. ld.so that are known to have problems if p_vaddr%p_align!=0: * musl<=1.1.22 * FreeBSD 13.0-CURRENT (and before) rtld-elf arm64 New test aarch64-tls-vaddr-align.s checks that our workaround makes p_vaddr%p_align = 0. Reviewed By: ruiu Differential Revision: https://reviews.llvm.org/D64930 llvm-svn: 369344
2019-08-20 16:34:56 +08:00
# CHECK-NEXT: 21013c: tbnz w3, #15, #-28 <_foo>
# CHECK-NEXT: 210140: tbnz w3, #15, #-16 <_bar>
# CHECK-NEXT: 210144: tbz x6, #45, #-36 <_foo>
# CHECK-NEXT: 210148: tbz x6, #45, #-24 <_bar>
[ELF/AARCH64] - Implemented R_AARCH64_TSTBR14 relocation. R_AARCH64_TSTBR14 is calculated as S+A-P, Set the immediate field of a TBZ/TBNZ instruction to bits [15:2] of X; check -2^15 ≤ X < 2^15 Differential revision: http://reviews.llvm.org/D15824 llvm-svn: 257334
2016-01-11 22:27:05 +08:00
#DSOREL: Section {
#DSOREL: Index:
#DSOREL: Name: .got.plt
#DSOREL-NEXT: Type: SHT_PROGBITS
#DSOREL-NEXT: Flags [
#DSOREL-NEXT: SHF_ALLOC
#DSOREL-NEXT: SHF_WRITE
#DSOREL-NEXT: ]
[ELF][AArch64] Allow PT_LOAD to have overlapping p_offset ranges Ported the D64906 technique to AArch64. It deletes 3 alignments at PT_LOAD boundaries for the default case: the size of an aarch64 binary decreases by at most 192kb. If `sh_addralign(.tdata) < sh_addralign(.tbss)`, we can potentially make `p_vaddr(PT_TLS)%p_align(PT_TLS) != 0`. ld.so that are known to have problems if p_vaddr%p_align!=0: * musl<=1.1.22 * FreeBSD 13.0-CURRENT (and before) rtld-elf arm64 New test aarch64-tls-vaddr-align.s checks that our workaround makes p_vaddr%p_align = 0. Reviewed By: ruiu Differential Revision: https://reviews.llvm.org/D64930 llvm-svn: 369344
2019-08-20 16:34:56 +08:00
#DSOREL-NEXT: Address: 0x30420
#DSOREL-NEXT: Offset: 0x420
[ELF/AARCH64] - Implemented R_AARCH64_TSTBR14 relocation. R_AARCH64_TSTBR14 is calculated as S+A-P, Set the immediate field of a TBZ/TBNZ instruction to bits [15:2] of X; check -2^15 ≤ X < 2^15 Differential revision: http://reviews.llvm.org/D15824 llvm-svn: 257334
2016-01-11 22:27:05 +08:00
#DSOREL-NEXT: Size: 40
#DSOREL-NEXT: Link: 0
#DSOREL-NEXT: Info: 0
#DSOREL-NEXT: AddressAlignment: 8
#DSOREL-NEXT: EntrySize: 0
#DSOREL-NEXT: }
#DSOREL: Relocations [
#DSOREL-NEXT: Section ({{.*}}) .rela.plt {
[ELF][AArch64] Allow PT_LOAD to have overlapping p_offset ranges Ported the D64906 technique to AArch64. It deletes 3 alignments at PT_LOAD boundaries for the default case: the size of an aarch64 binary decreases by at most 192kb. If `sh_addralign(.tdata) < sh_addralign(.tbss)`, we can potentially make `p_vaddr(PT_TLS)%p_align(PT_TLS) != 0`. ld.so that are known to have problems if p_vaddr%p_align!=0: * musl<=1.1.22 * FreeBSD 13.0-CURRENT (and before) rtld-elf arm64 New test aarch64-tls-vaddr-align.s checks that our workaround makes p_vaddr%p_align = 0. Reviewed By: ruiu Differential Revision: https://reviews.llvm.org/D64930 llvm-svn: 369344
2019-08-20 16:34:56 +08:00
#DSOREL-NEXT: 0x30438 R_AARCH64_JUMP_SLOT _foo
#DSOREL-NEXT: 0x30440 R_AARCH64_JUMP_SLOT _bar
[ELF/AARCH64] - Implemented R_AARCH64_TSTBR14 relocation. R_AARCH64_TSTBR14 is calculated as S+A-P, Set the immediate field of a TBZ/TBNZ instruction to bits [15:2] of X; check -2^15 ≤ X < 2^15 Differential revision: http://reviews.llvm.org/D15824 llvm-svn: 257334
2016-01-11 22:27:05 +08:00
#DSOREL-NEXT: }
#DSOREL-NEXT:]
#DSO: Disassembly of section .text:
[llvm-objdump] Print newlines before and after "Disassembly of section ...:" This improves readability and the behavior is consistent with GNU objdump. The new test test/tools/llvm-objdump/X86/disassemble-section-name.s checks we print newlines before and after "Disassembly of section ...:" Differential Revision: https://reviews.llvm.org/D61127 llvm-svn: 359668
2019-05-01 18:40:48 +08:00
#DSO-EMPTY:
[ELF/AARCH64] - Implemented R_AARCH64_TSTBR14 relocation. R_AARCH64_TSTBR14 is calculated as S+A-P, Set the immediate field of a TBZ/TBNZ instruction to bits [15:2] of X; check -2^15 ≤ X < 2^15 Differential revision: http://reviews.llvm.org/D15824 llvm-svn: 257334
2016-01-11 22:27:05 +08:00
#DSO-NEXT: _foo:
[ELF][AArch64] Allow PT_LOAD to have overlapping p_offset ranges Ported the D64906 technique to AArch64. It deletes 3 alignments at PT_LOAD boundaries for the default case: the size of an aarch64 binary decreases by at most 192kb. If `sh_addralign(.tdata) < sh_addralign(.tbss)`, we can potentially make `p_vaddr(PT_TLS)%p_align(PT_TLS) != 0`. ld.so that are known to have problems if p_vaddr%p_align!=0: * musl<=1.1.22 * FreeBSD 13.0-CURRENT (and before) rtld-elf arm64 New test aarch64-tls-vaddr-align.s checks that our workaround makes p_vaddr%p_align = 0. Reviewed By: ruiu Differential Revision: https://reviews.llvm.org/D64930 llvm-svn: 369344
2019-08-20 16:34:56 +08:00
#DSO-NEXT: 102f8: nop
#DSO-NEXT: 102fc: nop
#DSO-NEXT: 10300: nop
#DSO-NEXT: 10304: nop
[ELF/AARCH64] - Implemented R_AARCH64_TSTBR14 relocation. R_AARCH64_TSTBR14 is calculated as S+A-P, Set the immediate field of a TBZ/TBNZ instruction to bits [15:2] of X; check -2^15 ≤ X < 2^15 Differential revision: http://reviews.llvm.org/D15824 llvm-svn: 257334
2016-01-11 22:27:05 +08:00
#DSO: _bar:
[ELF][AArch64] Allow PT_LOAD to have overlapping p_offset ranges Ported the D64906 technique to AArch64. It deletes 3 alignments at PT_LOAD boundaries for the default case: the size of an aarch64 binary decreases by at most 192kb. If `sh_addralign(.tdata) < sh_addralign(.tbss)`, we can potentially make `p_vaddr(PT_TLS)%p_align(PT_TLS) != 0`. ld.so that are known to have problems if p_vaddr%p_align!=0: * musl<=1.1.22 * FreeBSD 13.0-CURRENT (and before) rtld-elf arm64 New test aarch64-tls-vaddr-align.s checks that our workaround makes p_vaddr%p_align = 0. Reviewed By: ruiu Differential Revision: https://reviews.llvm.org/D64930 llvm-svn: 369344
2019-08-20 16:34:56 +08:00
#DSO-NEXT: 10308: nop
#DSO-NEXT: 1030c: nop
#DSO-NEXT: 10310: nop
[ELF/AARCH64] - Implemented R_AARCH64_TSTBR14 relocation. R_AARCH64_TSTBR14 is calculated as S+A-P, Set the immediate field of a TBZ/TBNZ instruction to bits [15:2] of X; check -2^15 ≤ X < 2^15 Differential revision: http://reviews.llvm.org/D15824 llvm-svn: 257334
2016-01-11 22:27:05 +08:00
#DSO: _start:
[ELF][AArch64] Allow PT_LOAD to have overlapping p_offset ranges Ported the D64906 technique to AArch64. It deletes 3 alignments at PT_LOAD boundaries for the default case: the size of an aarch64 binary decreases by at most 192kb. If `sh_addralign(.tdata) < sh_addralign(.tbss)`, we can potentially make `p_vaddr(PT_TLS)%p_align(PT_TLS) != 0`. ld.so that are known to have problems if p_vaddr%p_align!=0: * musl<=1.1.22 * FreeBSD 13.0-CURRENT (and before) rtld-elf arm64 New test aarch64-tls-vaddr-align.s checks that our workaround makes p_vaddr%p_align = 0. Reviewed By: ruiu Differential Revision: https://reviews.llvm.org/D64930 llvm-svn: 369344
2019-08-20 16:34:56 +08:00
#DSO-NEXT: 10314: tbnz w3, #15, #60 <_foo@plt>
#DSO-NEXT: 10318: tbnz w3, #15, #72 <_bar@plt>
#DSO-NEXT: 1031c: tbz x6, #45, #52 <_foo@plt>
#DSO-NEXT: 10320: tbz x6, #45, #64 <_bar@plt>
[llvm-objdump] Print newlines before and after "Disassembly of section ...:" This improves readability and the behavior is consistent with GNU objdump. The new test test/tools/llvm-objdump/X86/disassemble-section-name.s checks we print newlines before and after "Disassembly of section ...:" Differential Revision: https://reviews.llvm.org/D61127 llvm-svn: 359668
2019-05-01 18:40:48 +08:00
#DSO-EMPTY:
[ELF/AARCH64] - Implemented R_AARCH64_TSTBR14 relocation. R_AARCH64_TSTBR14 is calculated as S+A-P, Set the immediate field of a TBZ/TBNZ instruction to bits [15:2] of X; check -2^15 ≤ X < 2^15 Differential revision: http://reviews.llvm.org/D15824 llvm-svn: 257334
2016-01-11 22:27:05 +08:00
#DSO-NEXT: Disassembly of section .plt:
[llvm-objdump] Print newlines before and after "Disassembly of section ...:" This improves readability and the behavior is consistent with GNU objdump. The new test test/tools/llvm-objdump/X86/disassemble-section-name.s checks we print newlines before and after "Disassembly of section ...:" Differential Revision: https://reviews.llvm.org/D61127 llvm-svn: 359668
2019-05-01 18:40:48 +08:00
#DSO-EMPTY:
[ELF/AARCH64] - Implemented R_AARCH64_TSTBR14 relocation. R_AARCH64_TSTBR14 is calculated as S+A-P, Set the immediate field of a TBZ/TBNZ instruction to bits [15:2] of X; check -2^15 ≤ X < 2^15 Differential revision: http://reviews.llvm.org/D15824 llvm-svn: 257334
2016-01-11 22:27:05 +08:00
#DSO-NEXT: .plt:
[ELF][AArch64] Allow PT_LOAD to have overlapping p_offset ranges Ported the D64906 technique to AArch64. It deletes 3 alignments at PT_LOAD boundaries for the default case: the size of an aarch64 binary decreases by at most 192kb. If `sh_addralign(.tdata) < sh_addralign(.tbss)`, we can potentially make `p_vaddr(PT_TLS)%p_align(PT_TLS) != 0`. ld.so that are known to have problems if p_vaddr%p_align!=0: * musl<=1.1.22 * FreeBSD 13.0-CURRENT (and before) rtld-elf arm64 New test aarch64-tls-vaddr-align.s checks that our workaround makes p_vaddr%p_align = 0. Reviewed By: ruiu Differential Revision: https://reviews.llvm.org/D64930 llvm-svn: 369344
2019-08-20 16:34:56 +08:00
#DSO-NEXT: 10330: stp x16, x30, [sp, #-16]!
#DSO-NEXT: 10334: adrp x16, #131072
#DSO-NEXT: 10338: ldr x17, [x16, #1072]
#DSO-NEXT: 1033c: add x16, x16, #1072
#DSO-NEXT: 10340: br x17
#DSO-NEXT: 10344: nop
#DSO-NEXT: 10348: nop
#DSO-NEXT: 1034c: nop
Modify tests to show PLT entry labels llvm-svn: 340616
2018-08-25 00:22:42 +08:00
#DSO-EMPTY:
#DSO-NEXT: _foo@plt:
[ELF][AArch64] Allow PT_LOAD to have overlapping p_offset ranges Ported the D64906 technique to AArch64. It deletes 3 alignments at PT_LOAD boundaries for the default case: the size of an aarch64 binary decreases by at most 192kb. If `sh_addralign(.tdata) < sh_addralign(.tbss)`, we can potentially make `p_vaddr(PT_TLS)%p_align(PT_TLS) != 0`. ld.so that are known to have problems if p_vaddr%p_align!=0: * musl<=1.1.22 * FreeBSD 13.0-CURRENT (and before) rtld-elf arm64 New test aarch64-tls-vaddr-align.s checks that our workaround makes p_vaddr%p_align = 0. Reviewed By: ruiu Differential Revision: https://reviews.llvm.org/D64930 llvm-svn: 369344
2019-08-20 16:34:56 +08:00
#DSO-NEXT: 10350: adrp x16, #131072
#DSO-NEXT: 10354: ldr x17, [x16, #1080]
#DSO-NEXT: 10358: add x16, x16, #1080
#DSO-NEXT: 1035c: br x17
Modify tests to show PLT entry labels llvm-svn: 340616
2018-08-25 00:22:42 +08:00
#DSO-EMPTY:
#DSO-NEXT: _bar@plt:
[ELF][AArch64] Allow PT_LOAD to have overlapping p_offset ranges Ported the D64906 technique to AArch64. It deletes 3 alignments at PT_LOAD boundaries for the default case: the size of an aarch64 binary decreases by at most 192kb. If `sh_addralign(.tdata) < sh_addralign(.tbss)`, we can potentially make `p_vaddr(PT_TLS)%p_align(PT_TLS) != 0`. ld.so that are known to have problems if p_vaddr%p_align!=0: * musl<=1.1.22 * FreeBSD 13.0-CURRENT (and before) rtld-elf arm64 New test aarch64-tls-vaddr-align.s checks that our workaround makes p_vaddr%p_align = 0. Reviewed By: ruiu Differential Revision: https://reviews.llvm.org/D64930 llvm-svn: 369344
2019-08-20 16:34:56 +08:00
#DSO-NEXT: 10360: adrp x16, #131072
#DSO-NEXT: 10364: ldr x17, [x16, #1088]
#DSO-NEXT: 10368: add x16, x16, #1088
#DSO-NEXT: 1036c: br x17
[ELF/AARCH64] - Implemented R_AARCH64_TSTBR14 relocation. R_AARCH64_TSTBR14 is calculated as S+A-P, Set the immediate field of a TBZ/TBNZ instruction to bits [15:2] of X; check -2^15 ≤ X < 2^15 Differential revision: http://reviews.llvm.org/D15824 llvm-svn: 257334
2016-01-11 22:27:05 +08:00
.globl _start
_start:
tbnz w3, #15, _foo
tbnz w3, #15, _bar
tbz x6, #45, _foo
tbz x6, #45, _bar