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llvm-project/llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-store-local.mir

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AMDGPU/GlobalISel: Select simple local stores llvm-svn: 367504
2019-08-01 11:09:15 +08:00
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -march=amdgcn -mcpu=tahiti -run-pass=instruction-select -verify-machineinstrs -global-isel-abort=0 -o - %s | FileCheck -check-prefix=GFX6 %s
# RUN: llc -march=amdgcn -mcpu=hawaii -run-pass=instruction-select -verify-machineinstrs -global-isel-abort=0 -o - %s | FileCheck -check-prefix=GFX7 %s
# RUN: llc -march=amdgcn -mcpu=fiji -run-pass=instruction-select -verify-machineinstrs -global-isel-abort=0 -o - %s | FileCheck -check-prefix=GFX7 %s
# RUN: llc -march=amdgcn -mcpu=gfx900 -run-pass=instruction-select -verify-machineinstrs -global-isel-abort=0 -o - %s | FileCheck -check-prefix=GFX9 %s
# RUN: llc -march=amdgcn -mcpu=gfx1010 -run-pass=instruction-select -verify-machineinstrs -global-isel-abort=0 -o - %s | FileCheck -check-prefix=GFX9 %s
---
name: store_local_s32_to_4
legalized: true
regBankSelected: true
tracksRegLiveness: true
machineFunctionInfo:
scratchRSrcReg: $sgpr0_sgpr1_sgpr2_sgpr3
scratchWaveOffsetReg: $sgpr4
stackPtrOffsetReg: $sgpr32
body: |
bb.0:
liveins: $vgpr0, $vgpr1
; GFX6-LABEL: name: store_local_s32_to_4
; GFX6: liveins: $vgpr0, $vgpr1
; GFX6: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
; GFX6: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
; GFX6: $m0 = S_MOV_B32 -1
; GFX6: DS_WRITE_B32 [[COPY1]], [[COPY]], 0, 0, implicit $m0, implicit $exec :: (store 4, addrspace 3)
; GFX7-LABEL: name: store_local_s32_to_4
; GFX7: liveins: $vgpr0, $vgpr1
; GFX7: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
; GFX7: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
; GFX7: $m0 = S_MOV_B32 -1
; GFX7: DS_WRITE_B32 [[COPY1]], [[COPY]], 0, 0, implicit $m0, implicit $exec :: (store 4, addrspace 3)
; GFX9-LABEL: name: store_local_s32_to_4
; GFX9: liveins: $vgpr0, $vgpr1
; GFX9: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
; GFX9: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
; GFX9: DS_WRITE_B32_gfx9 [[COPY1]], [[COPY]], 0, 0, implicit $exec :: (store 4, addrspace 3)
%0:vgpr(s32) = COPY $vgpr0
%1:vgpr(p3) = COPY $vgpr1
G_STORE %0, %1 :: (store 4, align 4, addrspace 3)
...
---
name: store_local_s32_to_2
legalized: true
regBankSelected: true
tracksRegLiveness: true
machineFunctionInfo:
scratchRSrcReg: $sgpr0_sgpr1_sgpr2_sgpr3
scratchWaveOffsetReg: $sgpr4
stackPtrOffsetReg: $sgpr32
body: |
bb.0:
liveins: $vgpr0, $vgpr1
; GFX6-LABEL: name: store_local_s32_to_2
; GFX6: liveins: $vgpr0, $vgpr1
; GFX6: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
; GFX6: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
; GFX6: $m0 = S_MOV_B32 -1
; GFX6: DS_WRITE_B16 [[COPY1]], [[COPY]], 0, 0, implicit $m0, implicit $exec :: (store 2, addrspace 3)
; GFX7-LABEL: name: store_local_s32_to_2
; GFX7: liveins: $vgpr0, $vgpr1
; GFX7: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
; GFX7: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
; GFX7: $m0 = S_MOV_B32 -1
; GFX7: DS_WRITE_B16 [[COPY1]], [[COPY]], 0, 0, implicit $m0, implicit $exec :: (store 2, addrspace 3)
; GFX9-LABEL: name: store_local_s32_to_2
; GFX9: liveins: $vgpr0, $vgpr1
; GFX9: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
; GFX9: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
; GFX9: DS_WRITE_B16_gfx9 [[COPY1]], [[COPY]], 0, 0, implicit $exec :: (store 2, addrspace 3)
%0:vgpr(s32) = COPY $vgpr0
%1:vgpr(p3) = COPY $vgpr1
G_STORE %0, %1 :: (store 2, align 2, addrspace 3)
...
---
name: store_local_s32_to_1
legalized: true
regBankSelected: true
tracksRegLiveness: true
machineFunctionInfo:
scratchRSrcReg: $sgpr0_sgpr1_sgpr2_sgpr3
scratchWaveOffsetReg: $sgpr4
stackPtrOffsetReg: $sgpr32
body: |
bb.0:
liveins: $vgpr0, $vgpr1
; GFX6-LABEL: name: store_local_s32_to_1
; GFX6: liveins: $vgpr0, $vgpr1
; GFX6: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
; GFX6: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
; GFX6: $m0 = S_MOV_B32 -1
; GFX6: DS_WRITE_B8 [[COPY1]], [[COPY]], 0, 0, implicit $m0, implicit $exec :: (store 1, addrspace 3)
; GFX7-LABEL: name: store_local_s32_to_1
; GFX7: liveins: $vgpr0, $vgpr1
; GFX7: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
; GFX7: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
; GFX7: $m0 = S_MOV_B32 -1
; GFX7: DS_WRITE_B8 [[COPY1]], [[COPY]], 0, 0, implicit $m0, implicit $exec :: (store 1, addrspace 3)
; GFX9-LABEL: name: store_local_s32_to_1
; GFX9: liveins: $vgpr0, $vgpr1
; GFX9: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
; GFX9: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
; GFX9: DS_WRITE_B8_gfx9 [[COPY1]], [[COPY]], 0, 0, implicit $exec :: (store 1, addrspace 3)
%0:vgpr(s32) = COPY $vgpr0
%1:vgpr(p3) = COPY $vgpr1
G_STORE %0, %1 :: (store 1, align 1, addrspace 3)
...
---
name: store_local_v2s16
legalized: true
regBankSelected: true
tracksRegLiveness: true
machineFunctionInfo:
scratchRSrcReg: $sgpr0_sgpr1_sgpr2_sgpr3
scratchWaveOffsetReg: $sgpr4
stackPtrOffsetReg: $sgpr32
body: |
bb.0:
liveins: $vgpr0, $vgpr1
; GFX6-LABEL: name: store_local_v2s16
; GFX6: liveins: $vgpr0, $vgpr1
AMDGPU/GlobalISel: Fix load/store of types in other address spaces There should probably be a size only matcher. llvm-svn: 371155
2019-09-06 08:36:06 +08:00
; GFX6: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
; GFX6: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
AMDGPU/GlobalISel: Select simple local stores llvm-svn: 367504
2019-08-01 11:09:15 +08:00
; GFX6: $m0 = S_MOV_B32 -1
AMDGPU/GlobalISel: Fix load/store of types in other address spaces There should probably be a size only matcher. llvm-svn: 371155
2019-09-06 08:36:06 +08:00
; GFX6: DS_WRITE_B32 [[COPY1]], [[COPY]], 0, 0, implicit $m0, implicit $exec :: (store 4, addrspace 3)
AMDGPU/GlobalISel: Select simple local stores llvm-svn: 367504
2019-08-01 11:09:15 +08:00
; GFX7-LABEL: name: store_local_v2s16
; GFX7: liveins: $vgpr0, $vgpr1
AMDGPU/GlobalISel: Fix load/store of types in other address spaces There should probably be a size only matcher. llvm-svn: 371155
2019-09-06 08:36:06 +08:00
; GFX7: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
; GFX7: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
AMDGPU/GlobalISel: Select simple local stores llvm-svn: 367504
2019-08-01 11:09:15 +08:00
; GFX7: $m0 = S_MOV_B32 -1
AMDGPU/GlobalISel: Fix load/store of types in other address spaces There should probably be a size only matcher. llvm-svn: 371155
2019-09-06 08:36:06 +08:00
; GFX7: DS_WRITE_B32 [[COPY1]], [[COPY]], 0, 0, implicit $m0, implicit $exec :: (store 4, addrspace 3)
AMDGPU/GlobalISel: Select simple local stores llvm-svn: 367504
2019-08-01 11:09:15 +08:00
; GFX9-LABEL: name: store_local_v2s16
; GFX9: liveins: $vgpr0, $vgpr1
AMDGPU/GlobalISel: Fix load/store of types in other address spaces There should probably be a size only matcher. llvm-svn: 371155
2019-09-06 08:36:06 +08:00
; GFX9: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
; GFX9: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
; GFX9: DS_WRITE_B32_gfx9 [[COPY1]], [[COPY]], 0, 0, implicit $exec :: (store 4, addrspace 3)
AMDGPU/GlobalISel: Select simple local stores llvm-svn: 367504
2019-08-01 11:09:15 +08:00
%0:vgpr(<2 x s16>) = COPY $vgpr0
%1:vgpr(p3) = COPY $vgpr1
G_STORE %0, %1 :: (store 4, align 4, addrspace 3)
...
---
name: store_local_p3
legalized: true
regBankSelected: true
tracksRegLiveness: true
machineFunctionInfo:
scratchRSrcReg: $sgpr0_sgpr1_sgpr2_sgpr3
scratchWaveOffsetReg: $sgpr4
stackPtrOffsetReg: $sgpr32
body: |
bb.0:
liveins: $vgpr0, $vgpr1
; GFX6-LABEL: name: store_local_p3
; GFX6: liveins: $vgpr0, $vgpr1
AMDGPU/GlobalISel: Fix load/store of types in other address spaces There should probably be a size only matcher. llvm-svn: 371155
2019-09-06 08:36:06 +08:00
; GFX6: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
; GFX6: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
AMDGPU/GlobalISel: Select simple local stores llvm-svn: 367504
2019-08-01 11:09:15 +08:00
; GFX6: $m0 = S_MOV_B32 -1
AMDGPU/GlobalISel: Fix load/store of types in other address spaces There should probably be a size only matcher. llvm-svn: 371155
2019-09-06 08:36:06 +08:00
; GFX6: DS_WRITE_B32 [[COPY1]], [[COPY]], 0, 0, implicit $m0, implicit $exec :: (store 4, addrspace 3)
AMDGPU/GlobalISel: Select simple local stores llvm-svn: 367504
2019-08-01 11:09:15 +08:00
; GFX7-LABEL: name: store_local_p3
; GFX7: liveins: $vgpr0, $vgpr1
AMDGPU/GlobalISel: Fix load/store of types in other address spaces There should probably be a size only matcher. llvm-svn: 371155
2019-09-06 08:36:06 +08:00
; GFX7: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
; GFX7: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
AMDGPU/GlobalISel: Select simple local stores llvm-svn: 367504
2019-08-01 11:09:15 +08:00
; GFX7: $m0 = S_MOV_B32 -1
AMDGPU/GlobalISel: Fix load/store of types in other address spaces There should probably be a size only matcher. llvm-svn: 371155
2019-09-06 08:36:06 +08:00
; GFX7: DS_WRITE_B32 [[COPY1]], [[COPY]], 0, 0, implicit $m0, implicit $exec :: (store 4, addrspace 3)
AMDGPU/GlobalISel: Select simple local stores llvm-svn: 367504
2019-08-01 11:09:15 +08:00
; GFX9-LABEL: name: store_local_p3
; GFX9: liveins: $vgpr0, $vgpr1
AMDGPU/GlobalISel: Fix load/store of types in other address spaces There should probably be a size only matcher. llvm-svn: 371155
2019-09-06 08:36:06 +08:00
; GFX9: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
; GFX9: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
; GFX9: DS_WRITE_B32_gfx9 [[COPY1]], [[COPY]], 0, 0, implicit $exec :: (store 4, addrspace 3)
AMDGPU/GlobalISel: Select simple local stores llvm-svn: 367504
2019-08-01 11:09:15 +08:00
%0:vgpr(p3) = COPY $vgpr0
%1:vgpr(p3) = COPY $vgpr1
G_STORE %0, %1 :: (store 4, align 4, addrspace 3)
...
---
name: store_local_s32_to_1_constant_4095
legalized: true
regBankSelected: true
tracksRegLiveness: true
body: |
bb.0:
; GFX6-LABEL: name: store_local_s32_to_1_constant_4095
; GFX6: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 4095, implicit $exec
; GFX6: [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
; GFX6: $m0 = S_MOV_B32 -1
; GFX6: DS_WRITE_B8 [[V_MOV_B32_e32_]], [[V_MOV_B32_e32_1]], 0, 0, implicit $m0, implicit $exec :: (store 1, addrspace 3)
; GFX7-LABEL: name: store_local_s32_to_1_constant_4095
; GFX7: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 4095, implicit $exec
; GFX7: [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
; GFX7: $m0 = S_MOV_B32 -1
; GFX7: DS_WRITE_B8 [[V_MOV_B32_e32_]], [[V_MOV_B32_e32_1]], 0, 0, implicit $m0, implicit $exec :: (store 1, addrspace 3)
; GFX9-LABEL: name: store_local_s32_to_1_constant_4095
; GFX9: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 4095, implicit $exec
; GFX9: [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
; GFX9: DS_WRITE_B8_gfx9 [[V_MOV_B32_e32_]], [[V_MOV_B32_e32_1]], 0, 0, implicit $exec :: (store 1, addrspace 3)
%0:vgpr(p3) = G_CONSTANT i32 4095
%1:vgpr(s32) = G_CONSTANT i32 0
G_STORE %1, %0 :: (store 1, align 1, addrspace 3)
...
---
name: store_local_s32_to_1_constant_4096
legalized: true
regBankSelected: true
tracksRegLiveness: true
machineFunctionInfo:
scratchRSrcReg: $sgpr0_sgpr1_sgpr2_sgpr3
scratchWaveOffsetReg: $sgpr4
stackPtrOffsetReg: $sgpr32
stack:
- { id: 0, size: 4096, alignment: 4 }
body: |
bb.0:
; GFX6-LABEL: name: store_local_s32_to_1_constant_4096
; GFX6: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 4096, implicit $exec
; GFX6: [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
; GFX6: $m0 = S_MOV_B32 -1
; GFX6: DS_WRITE_B8 [[V_MOV_B32_e32_]], [[V_MOV_B32_e32_1]], 0, 0, implicit $m0, implicit $exec :: (store 1, addrspace 3)
; GFX7-LABEL: name: store_local_s32_to_1_constant_4096
; GFX7: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 4096, implicit $exec
; GFX7: [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
; GFX7: $m0 = S_MOV_B32 -1
; GFX7: DS_WRITE_B8 [[V_MOV_B32_e32_]], [[V_MOV_B32_e32_1]], 0, 0, implicit $m0, implicit $exec :: (store 1, addrspace 3)
; GFX9-LABEL: name: store_local_s32_to_1_constant_4096
; GFX9: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 4096, implicit $exec
; GFX9: [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
; GFX9: DS_WRITE_B8_gfx9 [[V_MOV_B32_e32_]], [[V_MOV_B32_e32_1]], 0, 0, implicit $exec :: (store 1, addrspace 3)
%0:vgpr(p3) = G_CONSTANT i32 4096
%1:vgpr(s32) = G_CONSTANT i32 0
G_STORE %1, %0 :: (store 1, align 1, addrspace 3)
...
AMDGPU: Remove code address space predicates Fixes 8-byte, 8-byte aligned LDS loads. 16-byte case still broken due to not be reported as legal. llvm-svn: 371413
2019-09-10 00:02:07 +08:00
---
name: store_local_s64_align4
legalized: true
regBankSelected: true
tracksRegLiveness: true
machineFunctionInfo:
scratchRSrcReg: $sgpr0_sgpr1_sgpr2_sgpr3
scratchWaveOffsetReg: $sgpr4
stackPtrOffsetReg: $sgpr32
body: |
bb.0:
liveins: $vgpr0_vgpr1, $vgpr2
; GFX6-LABEL: name: store_local_s64_align4
; GFX6: liveins: $vgpr0_vgpr1, $vgpr2
; GFX6: [[COPY:%[0-9]+]]:vgpr(s64) = COPY $vgpr0_vgpr1
; GFX6: [[COPY1:%[0-9]+]]:vgpr(p3) = COPY $vgpr2
; GFX6: $m0 = S_MOV_B32 -1
; GFX6: G_STORE [[COPY]](s64), [[COPY1]](p3) :: (store 8, align 4, addrspace 3)
; GFX7-LABEL: name: store_local_s64_align4
; GFX7: liveins: $vgpr0_vgpr1, $vgpr2
; GFX7: [[COPY:%[0-9]+]]:vgpr(s64) = COPY $vgpr0_vgpr1
; GFX7: [[COPY1:%[0-9]+]]:vgpr(p3) = COPY $vgpr2
; GFX7: $m0 = S_MOV_B32 -1
; GFX7: G_STORE [[COPY]](s64), [[COPY1]](p3) :: (store 8, align 4, addrspace 3)
; GFX9-LABEL: name: store_local_s64_align4
; GFX9: liveins: $vgpr0_vgpr1, $vgpr2
; GFX9: [[COPY:%[0-9]+]]:vgpr(s64) = COPY $vgpr0_vgpr1
; GFX9: [[COPY1:%[0-9]+]]:vgpr(p3) = COPY $vgpr2
; GFX9: G_STORE [[COPY]](s64), [[COPY1]](p3) :: (store 8, align 4, addrspace 3)
%0:vgpr(s64) = COPY $vgpr0_vgpr1
%1:vgpr(p3) = COPY $vgpr2
G_STORE %0, %1 :: (store 8, align 4, addrspace 3)
...
---
name: store_local_p1_align4
legalized: true
regBankSelected: true
tracksRegLiveness: true
machineFunctionInfo:
scratchRSrcReg: $sgpr0_sgpr1_sgpr2_sgpr3
scratchWaveOffsetReg: $sgpr4
stackPtrOffsetReg: $sgpr32
body: |
bb.0:
liveins: $vgpr0_vgpr1, $vgpr2
; GFX6-LABEL: name: store_local_p1_align4
; GFX6: liveins: $vgpr0_vgpr1, $vgpr2
; GFX6: [[COPY:%[0-9]+]]:vgpr(p1) = COPY $vgpr0_vgpr1
; GFX6: [[COPY1:%[0-9]+]]:vgpr(p3) = COPY $vgpr2
; GFX6: $m0 = S_MOV_B32 -1
; GFX6: G_STORE [[COPY]](p1), [[COPY1]](p3) :: (store 8, align 4, addrspace 3)
; GFX7-LABEL: name: store_local_p1_align4
; GFX7: liveins: $vgpr0_vgpr1, $vgpr2
; GFX7: [[COPY:%[0-9]+]]:vgpr(p1) = COPY $vgpr0_vgpr1
; GFX7: [[COPY1:%[0-9]+]]:vgpr(p3) = COPY $vgpr2
; GFX7: $m0 = S_MOV_B32 -1
; GFX7: G_STORE [[COPY]](p1), [[COPY1]](p3) :: (store 8, align 4, addrspace 3)
; GFX9-LABEL: name: store_local_p1_align4
; GFX9: liveins: $vgpr0_vgpr1, $vgpr2
; GFX9: [[COPY:%[0-9]+]]:vgpr(p1) = COPY $vgpr0_vgpr1
; GFX9: [[COPY1:%[0-9]+]]:vgpr(p3) = COPY $vgpr2
; GFX9: G_STORE [[COPY]](p1), [[COPY1]](p3) :: (store 8, align 4, addrspace 3)
%0:vgpr(p1) = COPY $vgpr0_vgpr1
%1:vgpr(p3) = COPY $vgpr2
G_STORE %0, %1 :: (store 8, align 4, addrspace 3)
...
---
name: store_local_v2s32_align4
legalized: true
regBankSelected: true
tracksRegLiveness: true
machineFunctionInfo:
scratchRSrcReg: $sgpr0_sgpr1_sgpr2_sgpr3
scratchWaveOffsetReg: $sgpr4
stackPtrOffsetReg: $sgpr32
body: |
bb.0:
liveins: $vgpr0_vgpr1, $vgpr2
; GFX6-LABEL: name: store_local_v2s32_align4
; GFX6: liveins: $vgpr0_vgpr1, $vgpr2
; GFX6: [[COPY:%[0-9]+]]:vgpr(<2 x s32>) = COPY $vgpr0_vgpr1
; GFX6: [[COPY1:%[0-9]+]]:vgpr(p3) = COPY $vgpr2
; GFX6: $m0 = S_MOV_B32 -1
; GFX6: G_STORE [[COPY]](<2 x s32>), [[COPY1]](p3) :: (store 8, align 4, addrspace 3)
; GFX7-LABEL: name: store_local_v2s32_align4
; GFX7: liveins: $vgpr0_vgpr1, $vgpr2
; GFX7: [[COPY:%[0-9]+]]:vgpr(<2 x s32>) = COPY $vgpr0_vgpr1
; GFX7: [[COPY1:%[0-9]+]]:vgpr(p3) = COPY $vgpr2
; GFX7: $m0 = S_MOV_B32 -1
; GFX7: G_STORE [[COPY]](<2 x s32>), [[COPY1]](p3) :: (store 8, align 4, addrspace 3)
; GFX9-LABEL: name: store_local_v2s32_align4
; GFX9: liveins: $vgpr0_vgpr1, $vgpr2
; GFX9: [[COPY:%[0-9]+]]:vgpr(<2 x s32>) = COPY $vgpr0_vgpr1
; GFX9: [[COPY1:%[0-9]+]]:vgpr(p3) = COPY $vgpr2
; GFX9: G_STORE [[COPY]](<2 x s32>), [[COPY1]](p3) :: (store 8, align 4, addrspace 3)
%0:vgpr(<2 x s32>) = COPY $vgpr0_vgpr1
%1:vgpr(p3) = COPY $vgpr2
G_STORE %0, %1 :: (store 8, align 4, addrspace 3)
...
---
name: store_local_v4s16_align4
legalized: true
regBankSelected: true
tracksRegLiveness: true
machineFunctionInfo:
scratchRSrcReg: $sgpr0_sgpr1_sgpr2_sgpr3
scratchWaveOffsetReg: $sgpr4
stackPtrOffsetReg: $sgpr32
body: |
bb.0:
liveins: $vgpr0_vgpr1, $vgpr2
; GFX6-LABEL: name: store_local_v4s16_align4
; GFX6: liveins: $vgpr0_vgpr1, $vgpr2
; GFX6: [[COPY:%[0-9]+]]:vgpr(<4 x s16>) = COPY $vgpr0_vgpr1
; GFX6: [[COPY1:%[0-9]+]]:vgpr(p3) = COPY $vgpr2
; GFX6: $m0 = S_MOV_B32 -1
; GFX6: G_STORE [[COPY]](<4 x s16>), [[COPY1]](p3) :: (store 8, align 4, addrspace 3)
; GFX7-LABEL: name: store_local_v4s16_align4
; GFX7: liveins: $vgpr0_vgpr1, $vgpr2
; GFX7: [[COPY:%[0-9]+]]:vgpr(<4 x s16>) = COPY $vgpr0_vgpr1
; GFX7: [[COPY1:%[0-9]+]]:vgpr(p3) = COPY $vgpr2
; GFX7: $m0 = S_MOV_B32 -1
; GFX7: G_STORE [[COPY]](<4 x s16>), [[COPY1]](p3) :: (store 8, align 4, addrspace 3)
; GFX9-LABEL: name: store_local_v4s16_align4
; GFX9: liveins: $vgpr0_vgpr1, $vgpr2
; GFX9: [[COPY:%[0-9]+]]:vgpr(<4 x s16>) = COPY $vgpr0_vgpr1
; GFX9: [[COPY1:%[0-9]+]]:vgpr(p3) = COPY $vgpr2
; GFX9: G_STORE [[COPY]](<4 x s16>), [[COPY1]](p3) :: (store 8, align 4, addrspace 3)
%0:vgpr(<4 x s16>) = COPY $vgpr0_vgpr1
%1:vgpr(p3) = COPY $vgpr2
G_STORE %0, %1 :: (store 8, align 4, addrspace 3)
...
---
name: store_local_s64_align8
legalized: true
regBankSelected: true
tracksRegLiveness: true
machineFunctionInfo:
scratchRSrcReg: $sgpr0_sgpr1_sgpr2_sgpr3
scratchWaveOffsetReg: $sgpr4
stackPtrOffsetReg: $sgpr32
body: |
bb.0:
liveins: $vgpr0_vgpr1, $vgpr2
; GFX6-LABEL: name: store_local_s64_align8
; GFX6: liveins: $vgpr0_vgpr1, $vgpr2
; GFX6: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
; GFX6: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr2
; GFX6: $m0 = S_MOV_B32 -1
; GFX6: DS_WRITE_B64 [[COPY1]], [[COPY]], 0, 0, implicit $m0, implicit $exec :: (store 8, addrspace 3)
; GFX7-LABEL: name: store_local_s64_align8
; GFX7: liveins: $vgpr0_vgpr1, $vgpr2
; GFX7: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
; GFX7: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr2
; GFX7: $m0 = S_MOV_B32 -1
; GFX7: DS_WRITE_B64 [[COPY1]], [[COPY]], 0, 0, implicit $m0, implicit $exec :: (store 8, addrspace 3)
; GFX9-LABEL: name: store_local_s64_align8
; GFX9: liveins: $vgpr0_vgpr1, $vgpr2
; GFX9: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
; GFX9: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr2
; GFX9: DS_WRITE_B64_gfx9 [[COPY1]], [[COPY]], 0, 0, implicit $exec :: (store 8, addrspace 3)
%0:vgpr(s64) = COPY $vgpr0_vgpr1
%1:vgpr(p3) = COPY $vgpr2
G_STORE %0, %1 :: (store 8, align 8, addrspace 3)
...
---
name: store_local_p1_align8
legalized: true
regBankSelected: true
tracksRegLiveness: true
machineFunctionInfo:
scratchRSrcReg: $sgpr0_sgpr1_sgpr2_sgpr3
scratchWaveOffsetReg: $sgpr4
stackPtrOffsetReg: $sgpr32
body: |
bb.0:
liveins: $vgpr0_vgpr1, $vgpr2
; GFX6-LABEL: name: store_local_p1_align8
; GFX6: liveins: $vgpr0_vgpr1, $vgpr2
; GFX6: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
; GFX6: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr2
; GFX6: $m0 = S_MOV_B32 -1
; GFX6: DS_WRITE_B64 [[COPY1]], [[COPY]], 0, 0, implicit $m0, implicit $exec :: (store 8, addrspace 3)
; GFX7-LABEL: name: store_local_p1_align8
; GFX7: liveins: $vgpr0_vgpr1, $vgpr2
; GFX7: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
; GFX7: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr2
; GFX7: $m0 = S_MOV_B32 -1
; GFX7: DS_WRITE_B64 [[COPY1]], [[COPY]], 0, 0, implicit $m0, implicit $exec :: (store 8, addrspace 3)
; GFX9-LABEL: name: store_local_p1_align8
; GFX9: liveins: $vgpr0_vgpr1, $vgpr2
; GFX9: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
; GFX9: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr2
; GFX9: DS_WRITE_B64_gfx9 [[COPY1]], [[COPY]], 0, 0, implicit $exec :: (store 8, addrspace 3)
%0:vgpr(p1) = COPY $vgpr0_vgpr1
%1:vgpr(p3) = COPY $vgpr2
G_STORE %0, %1 :: (store 8, align 8, addrspace 3)
...
---
name: store_local_v2s32_align8
legalized: true
regBankSelected: true
tracksRegLiveness: true
machineFunctionInfo:
scratchRSrcReg: $sgpr0_sgpr1_sgpr2_sgpr3
scratchWaveOffsetReg: $sgpr4
stackPtrOffsetReg: $sgpr32
body: |
bb.0:
liveins: $vgpr0_vgpr1, $vgpr2
; GFX6-LABEL: name: store_local_v2s32_align8
; GFX6: liveins: $vgpr0_vgpr1, $vgpr2
; GFX6: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
; GFX6: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr2
; GFX6: $m0 = S_MOV_B32 -1
; GFX6: DS_WRITE_B64 [[COPY1]], [[COPY]], 0, 0, implicit $m0, implicit $exec :: (store 8, addrspace 3)
; GFX7-LABEL: name: store_local_v2s32_align8
; GFX7: liveins: $vgpr0_vgpr1, $vgpr2
; GFX7: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
; GFX7: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr2
; GFX7: $m0 = S_MOV_B32 -1
; GFX7: DS_WRITE_B64 [[COPY1]], [[COPY]], 0, 0, implicit $m0, implicit $exec :: (store 8, addrspace 3)
; GFX9-LABEL: name: store_local_v2s32_align8
; GFX9: liveins: $vgpr0_vgpr1, $vgpr2
; GFX9: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
; GFX9: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr2
; GFX9: DS_WRITE_B64_gfx9 [[COPY1]], [[COPY]], 0, 0, implicit $exec :: (store 8, addrspace 3)
%0:vgpr(<2 x s32>) = COPY $vgpr0_vgpr1
%1:vgpr(p3) = COPY $vgpr2
G_STORE %0, %1 :: (store 8, align 8, addrspace 3)
...
---
name: store_local_v4s16_align8
legalized: true
regBankSelected: true
tracksRegLiveness: true
machineFunctionInfo:
scratchRSrcReg: $sgpr0_sgpr1_sgpr2_sgpr3
scratchWaveOffsetReg: $sgpr4
stackPtrOffsetReg: $sgpr32
body: |
bb.0:
liveins: $vgpr0_vgpr1, $vgpr2
; GFX6-LABEL: name: store_local_v4s16_align8
; GFX6: liveins: $vgpr0_vgpr1, $vgpr2
; GFX6: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
; GFX6: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr2
; GFX6: $m0 = S_MOV_B32 -1
; GFX6: DS_WRITE_B64 [[COPY1]], [[COPY]], 0, 0, implicit $m0, implicit $exec :: (store 8, addrspace 3)
; GFX7-LABEL: name: store_local_v4s16_align8
; GFX7: liveins: $vgpr0_vgpr1, $vgpr2
; GFX7: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
; GFX7: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr2
; GFX7: $m0 = S_MOV_B32 -1
; GFX7: DS_WRITE_B64 [[COPY1]], [[COPY]], 0, 0, implicit $m0, implicit $exec :: (store 8, addrspace 3)
; GFX9-LABEL: name: store_local_v4s16_align8
; GFX9: liveins: $vgpr0_vgpr1, $vgpr2
; GFX9: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
; GFX9: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr2
; GFX9: DS_WRITE_B64_gfx9 [[COPY1]], [[COPY]], 0, 0, implicit $exec :: (store 8, addrspace 3)
%0:vgpr(<4 x s16>) = COPY $vgpr0_vgpr1
%1:vgpr(p3) = COPY $vgpr2
G_STORE %0, %1 :: (store 8, align 8, addrspace 3)
...