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llvm-project/llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fmaxnum-ieee.v2...

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AMDGPU/GlobalISel: Select VOP3P instructions This only handles the basic cases. More work is needed to make better use of op_sel.
2019-09-01 10:39:00 +08:00
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -march=amdgcn -mcpu=gfx900 -run-pass=instruction-select -verify-machineinstrs -o - %s | FileCheck -check-prefix=GFX9 %s
AMDGPU/GlobalISel: Fix tests without asserts The legality check is only done under NDEBUG, so the failure cases are different in a release build. llvm-svn: 366680
2019-07-22 20:43:41 +08:00
---
name: fmaxnum_ieee_v2f16_vv
legalized: true
regBankSelected: true
body: |
bb.0:
liveins: $sgpr0, $sgpr1
; GFX9-LABEL: name: fmaxnum_ieee_v2f16_vv
AMDGPU/GlobalISel: Select VOP3P instructions This only handles the basic cases. More work is needed to make better use of op_sel.
2019-09-01 10:39:00 +08:00
; GFX9: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
; GFX9: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
GlobalISel: Infer nofpexcept flag during selection for non-strict ops Match SelectionDAG's behavior of adding nofpexcept to out instructions that may raise fp exceptions that are selected from instructions that do not.
2020-06-01 02:19:46 +08:00
; GFX9: %2:vgpr_32 = nofpexcept V_PK_MAX_F16 8, [[COPY]], 8, [[COPY1]], 0, 0, 0, 0, 0, implicit $mode, implicit $exec
; GFX9: S_ENDPGM 0, implicit %2
AMDGPU/GlobalISel: Fix tests without asserts The legality check is only done under NDEBUG, so the failure cases are different in a release build. llvm-svn: 366680
2019-07-22 20:43:41 +08:00
%0:vgpr(<2 x s16>) = COPY $vgpr0
%1:vgpr(<2 x s16>) = COPY $vgpr1
%2:vgpr(<2 x s16>) = G_FMAXNUM_IEEE %0, %1
S_ENDPGM 0, implicit %2
...