2017-07-28 17:43:52 +08:00
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=i686-unknown-unknown | FileCheck %s --check-prefix=X86
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefix=X64
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@a = common global i32 0, align 4
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@c = common local_unnamed_addr global i8 0, align 1
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@b = common local_unnamed_addr global i32* null, align 8
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define void @e() {
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; X86-LABEL: e:
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2017-12-05 01:18:51 +08:00
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; X86: # %bb.0: # %entry
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2017-07-28 17:43:52 +08:00
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; X86-NEXT: movl b, %eax
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; X86-NEXT: .p2align 4, 0x90
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; X86-NEXT: .LBB0_1: # %for.cond
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; X86-NEXT: # =>This Inner Loop Header: Depth=1
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; X86-NEXT: movzbl c, %ecx
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; X86-NEXT: leal a+2(%ecx), %ecx
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; X86-NEXT: movb $0, c
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; X86-NEXT: movl %ecx, (%eax)
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; X86-NEXT: jmp .LBB0_1
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;
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; X64-LABEL: e:
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2017-12-05 01:18:51 +08:00
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; X64: # %bb.0: # %entry
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2017-07-28 17:43:52 +08:00
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; X64-NEXT: movq {{.*}}(%rip), %rax
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; X64-NEXT: movl $a, %esi
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; X64-NEXT: .p2align 4, 0x90
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; X64-NEXT: .LBB0_1: # %for.cond
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; X64-NEXT: # =>This Inner Loop Header: Depth=1
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; X64-NEXT: movzbl {{.*}}(%rip), %edx
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; X64-NEXT: addq %rsi, %rdx
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; X64-NEXT: setb %cl
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; X64-NEXT: addq $2, %rdx
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; X64-NEXT: adcb $0, %cl
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; X64-NEXT: movb %cl, {{.*}}(%rip)
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; X64-NEXT: movl %edx, (%rax)
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; X64-NEXT: jmp .LBB0_1
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entry:
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%0 = load i32*, i32** @b, align 8
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br label %for.cond
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for.cond:
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%1 = load i8, i8* @c, align 1
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%conv = zext i8 %1 to i128
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%add = add nuw nsw i128 %conv, add (i128 ptrtoint (i32* @a to i128), i128 2)
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%2 = lshr i128 %add, 64
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%conv1 = trunc i128 %2 to i8
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store i8 %conv1, i8* @c, align 1
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%conv2 = trunc i128 %add to i32
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store i32 %conv2, i32* %0, align 4
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br label %for.cond
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}
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