forked from OSchip/llvm-project
50 lines
1.4 KiB
LLVM
50 lines
1.4 KiB
LLVM
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; RUN: llc -march=amdgcn -mcpu=tahiti -mattr=-flat-for-global -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s
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; SI-LABEL: {{^}}s_clear_msb:
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; SI: s_bitset0_b32 s{{[0-9]+}}, 31
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define amdgpu_kernel void @s_clear_msb(i32 addrspace(1)* %out, i32 %in) {
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%x = and i32 %in, 2147483647
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store i32 %x, i32 addrspace(1)* %out
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ret void
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}
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; SI-LABEL: {{^}}s_set_msb:
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; SI: s_bitset1_b32 s{{[0-9]+}}, 31
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define amdgpu_kernel void @s_set_msb(i32 addrspace(1)* %out, i32 %in) {
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%x = or i32 %in, 2147483648
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store i32 %x, i32 addrspace(1)* %out
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ret void
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}
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; SI-LABEL: {{^}}s_clear_lsb:
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; SI: s_and_b32 s{{[0-9]+}}, s{{[0-9]+}}, -2
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define amdgpu_kernel void @s_clear_lsb(i32 addrspace(1)* %out, i32 %in) {
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%x = and i32 %in, 4294967294
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store i32 %x, i32 addrspace(1)* %out
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ret void
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}
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; SI-LABEL: {{^}}s_set_lsb:
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; SI: s_or_b32 s{{[0-9]+}}, s{{[0-9]+}}, 1
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define amdgpu_kernel void @s_set_lsb(i32 addrspace(1)* %out, i32 %in) {
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%x = or i32 %in, 1
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store i32 %x, i32 addrspace(1)* %out
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ret void
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}
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; SI-LABEL: {{^}}s_clear_midbit:
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; SI: s_bitset0_b32 s{{[0-9]+}}, 8
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define amdgpu_kernel void @s_clear_midbit(i32 addrspace(1)* %out, i32 %in) {
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%x = and i32 %in, 4294967039
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store i32 %x, i32 addrspace(1)* %out
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ret void
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}
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; SI-LABEL: {{^}}s_set_midbit:
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; SI: s_bitset1_b32 s{{[0-9]+}}, 8
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define amdgpu_kernel void @s_set_midbit(i32 addrspace(1)* %out, i32 %in) {
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%x = or i32 %in, 256
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store i32 %x, i32 addrspace(1)* %out
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ret void
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}
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