forked from OSchip/llvm-project
18 lines
587 B
LLVM
18 lines
587 B
LLVM
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; RUN: llc -march=hexagon < %s | FileCheck %s
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; This tests validates the fact that the formal arguments of type scalar i1
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; (passed using 32-bit register) is converted back to use predicate registers
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; CHECK: [[P0:p[0-3]]] = tstbit(r0,#0)
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; CHECK: [[R0:r[0-9]+]] = mux([[P0]],#3,r2)
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; CHECK: memb(r1+#0) = [[R0]]
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target triple = "hexagon"
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define void @f0(i1 zeroext %a0, i8* nocapture %a1, i8 %a2) local_unnamed_addr #0 {
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entry:
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%v0 = select i1 %a0, i8 3, i8 %a2
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store i8 %v0, i8* %a1, align 1
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ret void
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}
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attributes #0 = { norecurse nounwind optsize "target-cpu"="hexagonv60" }
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