llvm-project/llvm/test/CodeGen/X86/vec_shuffle-19.ll

; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -mtriple=i686-apple-darwin9 -stats -info-output-file - | grep asm-printer | grep 4
; PR2485

define <4 x i32> @t(<4 x i32> %a, <4 x i32> %b) nounwind  {
entry:
	%shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> < i32 4, i32 0, i32 0, i32 0 >		; <<4 x i32>> [#uses=1]
	ret <4 x i32> %shuffle
}
Add target triples so these tests behave as expected on non-darwin hosts. llvm-svn: 53991 2008-07-25 02:08:01 +08:00			`; RUN: llvm-as < %s \| llc -march=x86 -mattr=+sse2 -mtriple=i686-apple-darwin9 -stats -info-output-file - \| grep asm-printer \| grep 4`
Fix PR2485: do all 4-element SSE shuffles in max. of 2 shuffle instructions. Based on patch by Nicolas Capens. llvm-svn: 53939 2008-07-23 08:22:17 +08:00			`; PR2485`

			`define <4 x i32> @t(<4 x i32> %a, <4 x i32> %b) nounwind {`
			`entry:`
			`%shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> < i32 4, i32 0, i32 0, i32 0 > ; <<4 x i32>> [#uses=1]`
			`ret <4 x i32> %shuffle`
			`}`