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llvm-project/llvm/test/CodeGen/X86/2011-10-19-widen_vselect.ll

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[X86][SSE] Regenerate vselect widening tests and add 32-bit test target llvm-svn: 295665
2017-02-20 23:16:43 +08:00
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=i686-unknown-linux-gnu -mcpu=corei7 | FileCheck %s --check-prefix=X32
; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=corei7 | FileCheck %s --check-prefix=X64
Add support for the vector-widening of vselect and vector-setcc llvm-svn: 142488
2011-10-19 17:45:11 +08:00
Teach the DAGCombiner how to fold 'vselect' dag nodes according to the following two rules: 1) fold (vselect (build_vector AllOnes), A, B) -> A 2) fold (vselect (build_vector AllZeros), A, B) -> B llvm-svn: 198777
2014-01-09 02:33:04 +08:00
; Make sure that we don't crash when legalizing vselect and vsetcc and that
Add support for the vector-widening of vselect and vector-setcc llvm-svn: 142488
2011-10-19 17:45:11 +08:00
; we are able to generate vector blend instructions.
[X86] Modify two tests that passed undef to both sides of a vselect to instead pass unique values. I'd like to teach DAG combine to remove vselects where both sides are identical and these tests were in the way of that. llvm-svn: 287903
2016-11-25 05:48:50 +08:00
define void @simple_widen(<2 x float> %a, <2 x float> %b) {
[X86][SSE] Regenerate vselect widening tests and add 32-bit test target llvm-svn: 295665
2017-02-20 23:16:43 +08:00
; X32-LABEL: simple_widen:
[CodeGen] Unify MBB reference format in both MIR and debug output As part of the unification of the debug format and the MIR format, print MBB references as '%bb.5'. The MIR printer prints the IR name of a MBB only for block definitions. * find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#" << ([a-zA-Z0-9_]+)->getNumber\(\)/" << printMBBReference(*\1)/g' * find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#" << ([a-zA-Z0-9_]+)\.getNumber\(\)/" << printMBBReference(\1)/g' * find . \( -name "*.txt" -o -name "*.s" -o -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#([0-9]+)/%bb.\1/g' * grep -nr 'BB#' and fix Differential Revision: https://reviews.llvm.org/D40422 llvm-svn: 319665
2017-12-05 01:18:51 +08:00
; X32: # %bb.0: # %entry
[X86][SSE] Regenerate vselect widening tests and add 32-bit test target llvm-svn: 295665
2017-02-20 23:16:43 +08:00
; X32-NEXT: extractps $1, %xmm1, (%eax)
; X32-NEXT: movss %xmm1, (%eax)
; X32-NEXT: retl
;
; X64-LABEL: simple_widen:
[CodeGen] Unify MBB reference format in both MIR and debug output As part of the unification of the debug format and the MIR format, print MBB references as '%bb.5'. The MIR printer prints the IR name of a MBB only for block definitions. * find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#" << ([a-zA-Z0-9_]+)->getNumber\(\)/" << printMBBReference(*\1)/g' * find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#" << ([a-zA-Z0-9_]+)\.getNumber\(\)/" << printMBBReference(\1)/g' * find . \( -name "*.txt" -o -name "*.s" -o -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#([0-9]+)/%bb.\1/g' * grep -nr 'BB#' and fix Differential Revision: https://reviews.llvm.org/D40422 llvm-svn: 319665
2017-12-05 01:18:51 +08:00
; X64: # %bb.0: # %entry
[X86][SSE] Regenerate vselect widening tests and add 32-bit test target llvm-svn: 295665
2017-02-20 23:16:43 +08:00
; X64-NEXT: movlps %xmm1, (%rax)
; X64-NEXT: retq
Add support for the vector-widening of vselect and vector-setcc llvm-svn: 142488
2011-10-19 17:45:11 +08:00
entry:
[X86] Modify two tests that passed undef to both sides of a vselect to instead pass unique values. I'd like to teach DAG combine to remove vselects where both sides are identical and these tests were in the way of that. llvm-svn: 287903
2016-11-25 05:48:50 +08:00
%0 = select <2 x i1> undef, <2 x float> %a, <2 x float> %b
Add support for the vector-widening of vselect and vector-setcc llvm-svn: 142488
2011-10-19 17:45:11 +08:00
store <2 x float> %0, <2 x float>* undef
ret void
}
[X86] Modify two tests that passed undef to both sides of a vselect to instead pass unique values. I'd like to teach DAG combine to remove vselects where both sides are identical and these tests were in the way of that. llvm-svn: 287903
2016-11-25 05:48:50 +08:00
define void @complex_inreg_work(<2 x float> %a, <2 x float> %b) {
[X86][SSE] Regenerate vselect widening tests and add 32-bit test target llvm-svn: 295665
2017-02-20 23:16:43 +08:00
; X32-LABEL: complex_inreg_work:
[CodeGen] Unify MBB reference format in both MIR and debug output As part of the unification of the debug format and the MIR format, print MBB references as '%bb.5'. The MIR printer prints the IR name of a MBB only for block definitions. * find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#" << ([a-zA-Z0-9_]+)->getNumber\(\)/" << printMBBReference(*\1)/g' * find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#" << ([a-zA-Z0-9_]+)\.getNumber\(\)/" << printMBBReference(\1)/g' * find . \( -name "*.txt" -o -name "*.s" -o -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#([0-9]+)/%bb.\1/g' * grep -nr 'BB#' and fix Differential Revision: https://reviews.llvm.org/D40422 llvm-svn: 319665
2017-12-05 01:18:51 +08:00
; X32: # %bb.0: # %entry
[X86][SSE] Regenerate vselect widening tests and add 32-bit test target llvm-svn: 295665
2017-02-20 23:16:43 +08:00
; X32-NEXT: movaps %xmm0, %xmm2
; X32-NEXT: cmpordps %xmm0, %xmm0
; X32-NEXT: blendvps %xmm0, %xmm2, %xmm1
; X32-NEXT: extractps $1, %xmm1, (%eax)
; X32-NEXT: movss %xmm1, (%eax)
; X32-NEXT: retl
;
; X64-LABEL: complex_inreg_work:
[CodeGen] Unify MBB reference format in both MIR and debug output As part of the unification of the debug format and the MIR format, print MBB references as '%bb.5'. The MIR printer prints the IR name of a MBB only for block definitions. * find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#" << ([a-zA-Z0-9_]+)->getNumber\(\)/" << printMBBReference(*\1)/g' * find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#" << ([a-zA-Z0-9_]+)\.getNumber\(\)/" << printMBBReference(\1)/g' * find . \( -name "*.txt" -o -name "*.s" -o -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#([0-9]+)/%bb.\1/g' * grep -nr 'BB#' and fix Differential Revision: https://reviews.llvm.org/D40422 llvm-svn: 319665
2017-12-05 01:18:51 +08:00
; X64: # %bb.0: # %entry
[X86][SSE] Regenerate vselect widening tests and add 32-bit test target llvm-svn: 295665
2017-02-20 23:16:43 +08:00
; X64-NEXT: movaps %xmm0, %xmm2
; X64-NEXT: cmpordps %xmm0, %xmm0
; X64-NEXT: blendvps %xmm0, %xmm2, %xmm1
; X64-NEXT: movlps %xmm1, (%rax)
; X64-NEXT: retq
Add support for the vector-widening of vselect and vector-setcc llvm-svn: 142488
2011-10-19 17:45:11 +08:00
entry:
%0 = fcmp oeq <2 x float> undef, undef
[X86] Modify two tests that passed undef to both sides of a vselect to instead pass unique values. I'd like to teach DAG combine to remove vselects where both sides are identical and these tests were in the way of that. llvm-svn: 287903
2016-11-25 05:48:50 +08:00
%1 = select <2 x i1> %0, <2 x float> %a, <2 x float> %b
Add support for the vector-widening of vselect and vector-setcc llvm-svn: 142488
2011-10-19 17:45:11 +08:00
store <2 x float> %1, <2 x float>* undef
ret void
}
define void @zero_test() {
[X86][SSE] Regenerate vselect widening tests and add 32-bit test target llvm-svn: 295665
2017-02-20 23:16:43 +08:00
; X32-LABEL: zero_test:
[CodeGen] Unify MBB reference format in both MIR and debug output As part of the unification of the debug format and the MIR format, print MBB references as '%bb.5'. The MIR printer prints the IR name of a MBB only for block definitions. * find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#" << ([a-zA-Z0-9_]+)->getNumber\(\)/" << printMBBReference(*\1)/g' * find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#" << ([a-zA-Z0-9_]+)\.getNumber\(\)/" << printMBBReference(\1)/g' * find . \( -name "*.txt" -o -name "*.s" -o -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#([0-9]+)/%bb.\1/g' * grep -nr 'BB#' and fix Differential Revision: https://reviews.llvm.org/D40422 llvm-svn: 319665
2017-12-05 01:18:51 +08:00
; X32: # %bb.0: # %entry
[X86][SSE] Add extractps/pextrd equivalence to domain tables Differential Revision: https://reviews.llvm.org/D39135 llvm-svn: 316274
2017-10-22 04:19:48 +08:00
; X32-NEXT: xorps %xmm0, %xmm0
; X32-NEXT: extractps $1, %xmm0, (%eax)
; X32-NEXT: movss %xmm0, (%eax)
[X86][SSE] Regenerate vselect widening tests and add 32-bit test target llvm-svn: 295665
2017-02-20 23:16:43 +08:00
; X32-NEXT: retl
;
; X64-LABEL: zero_test:
[CodeGen] Unify MBB reference format in both MIR and debug output As part of the unification of the debug format and the MIR format, print MBB references as '%bb.5'. The MIR printer prints the IR name of a MBB only for block definitions. * find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#" << ([a-zA-Z0-9_]+)->getNumber\(\)/" << printMBBReference(*\1)/g' * find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#" << ([a-zA-Z0-9_]+)\.getNumber\(\)/" << printMBBReference(\1)/g' * find . \( -name "*.txt" -o -name "*.s" -o -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#([0-9]+)/%bb.\1/g' * grep -nr 'BB#' and fix Differential Revision: https://reviews.llvm.org/D40422 llvm-svn: 319665
2017-12-05 01:18:51 +08:00
; X64: # %bb.0: # %entry
[X86][SSE] Regenerate vselect widening tests and add 32-bit test target llvm-svn: 295665
2017-02-20 23:16:43 +08:00
; X64-NEXT: xorps %xmm0, %xmm0
; X64-NEXT: movlps %xmm0, (%rax)
; X64-NEXT: retq
Add support for the vector-widening of vselect and vector-setcc llvm-svn: 142488
2011-10-19 17:45:11 +08:00
entry:
%0 = select <2 x i1> undef, <2 x float> undef, <2 x float> zeroinitializer
store <2 x float> %0, <2 x float>* undef
ret void
}
define void @full_test() {
[X86][SSE] Regenerate vselect widening tests and add 32-bit test target llvm-svn: 295665
2017-02-20 23:16:43 +08:00
; X32-LABEL: full_test:
[CodeGen] Unify MBB reference format in both MIR and debug output As part of the unification of the debug format and the MIR format, print MBB references as '%bb.5'. The MIR printer prints the IR name of a MBB only for block definitions. * find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#" << ([a-zA-Z0-9_]+)->getNumber\(\)/" << printMBBReference(*\1)/g' * find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#" << ([a-zA-Z0-9_]+)\.getNumber\(\)/" << printMBBReference(\1)/g' * find . \( -name "*.txt" -o -name "*.s" -o -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#([0-9]+)/%bb.\1/g' * grep -nr 'BB#' and fix Differential Revision: https://reviews.llvm.org/D40422 llvm-svn: 319665
2017-12-05 01:18:51 +08:00
; X32: # %bb.0: # %entry
[X86][SSE] Regenerate vselect widening tests and add 32-bit test target llvm-svn: 295665
2017-02-20 23:16:43 +08:00
; X32-NEXT: subl $60, %esp
; X32-NEXT: .cfi_def_cfa_offset 64
; X32-NEXT: movsd {{.*#+}} xmm2 = mem[0],zero
; X32-NEXT: cvttps2dq %xmm2, %xmm0
; X32-NEXT: cvtdq2ps %xmm0, %xmm1
; X32-NEXT: xorps %xmm0, %xmm0
; X32-NEXT: cmpltps %xmm2, %xmm0
; X32-NEXT: movaps {{.*#+}} xmm3 = <1,1,u,u>
; X32-NEXT: addps %xmm1, %xmm3
; X32-NEXT: movaps %xmm1, %xmm4
; X32-NEXT: blendvps %xmm0, %xmm3, %xmm4
; X32-NEXT: cmpeqps %xmm2, %xmm1
; X32-NEXT: movaps %xmm1, %xmm0
; X32-NEXT: blendvps %xmm0, %xmm2, %xmm4
; X32-NEXT: movss %xmm4, {{[0-9]+}}(%esp)
[DAG] Improve Aliasing of operations to static alloca Re-recommiting after landing DAG extension-crash fix. Recommiting after adding check to avoid miscomputing alias information on addresses of the same base but different subindices. Memory accesses offset from frame indices may alias, e.g., we may merge write from function arguments passed on the stack when they are contiguous. As a result, when checking aliasing, we consider the underlying frame index's offset from the stack pointer. Static allocs are realized as stack objects in SelectionDAG, but its offset is not set until post-DAG causing DAGCombiner's alias check to consider access to static allocas to frequently alias. Modify isAlias to consider access between static allocas and access from other frame objects to be considered aliasing. Many test changes are included here. Most are fixes for tests which indirectly relied on our aliasing ability and needed to be modified to preserve their original intent. The remaining tests have minor improvements due to relaxed ordering. The exception is CodeGen/X86/2011-10-19-widen_vselect.ll which has a minor degradation dispite though the pre-legalized DAG is improved. Reviewers: rnk, mkuper, jonpa, hfinkel, uweigand Reviewed By: rnk Subscribers: sdardis, nemanjai, javed.absar, llvm-commits Differential Revision: https://reviews.llvm.org/D33345 llvm-svn: 308350
2017-07-19 04:06:24 +08:00
; X32-NEXT: movshdup {{.*#+}} xmm0 = xmm4[1,1,3,3]
; X32-NEXT: movss %xmm0, {{[0-9]+}}(%esp)
; X32-NEXT: movss %xmm4, {{[0-9]+}}(%esp)
; X32-NEXT: movss %xmm0, {{[0-9]+}}(%esp)
[X86][SSE] Regenerate vselect widening tests and add 32-bit test target llvm-svn: 295665
2017-02-20 23:16:43 +08:00
; X32-NEXT: addl $60, %esp
; X32-NEXT: retl
;
; X64-LABEL: full_test:
[CodeGen] Unify MBB reference format in both MIR and debug output As part of the unification of the debug format and the MIR format, print MBB references as '%bb.5'. The MIR printer prints the IR name of a MBB only for block definitions. * find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#" << ([a-zA-Z0-9_]+)->getNumber\(\)/" << printMBBReference(*\1)/g' * find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#" << ([a-zA-Z0-9_]+)\.getNumber\(\)/" << printMBBReference(\1)/g' * find . \( -name "*.txt" -o -name "*.s" -o -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#([0-9]+)/%bb.\1/g' * grep -nr 'BB#' and fix Differential Revision: https://reviews.llvm.org/D40422 llvm-svn: 319665
2017-12-05 01:18:51 +08:00
; X64: # %bb.0: # %entry
[X86][SSE] Regenerate vselect widening tests and add 32-bit test target llvm-svn: 295665
2017-02-20 23:16:43 +08:00
; X64-NEXT: movsd {{.*#+}} xmm2 = mem[0],zero
; X64-NEXT: cvttps2dq %xmm2, %xmm0
; X64-NEXT: cvtdq2ps %xmm0, %xmm1
; X64-NEXT: xorps %xmm0, %xmm0
; X64-NEXT: cmpltps %xmm2, %xmm0
; X64-NEXT: movaps {{.*#+}} xmm3 = <1,1,u,u>
; X64-NEXT: addps %xmm1, %xmm3
; X64-NEXT: movaps %xmm1, %xmm4
; X64-NEXT: blendvps %xmm0, %xmm3, %xmm4
; X64-NEXT: cmpeqps %xmm2, %xmm1
; X64-NEXT: movaps %xmm1, %xmm0
; X64-NEXT: blendvps %xmm0, %xmm2, %xmm4
; X64-NEXT: movlps %xmm4, -{{[0-9]+}}(%rsp)
; X64-NEXT: movlps %xmm4, -{{[0-9]+}}(%rsp)
; X64-NEXT: retq
Add support for the vector-widening of vselect and vector-setcc llvm-svn: 142488
2011-10-19 17:45:11 +08:00
entry:
%Cy300 = alloca <4 x float>
%Cy11a = alloca <2 x float>
%Cy118 = alloca <2 x float>
%Cy119 = alloca <2 x float>
br label %B1
B1: ; preds = %entry
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction Essentially the same as the GEP change in r230786. A similar migration script can be used to update test cases, though a few more test case improvements/changes were required this time around: (r229269-r229278) import fileinput import sys import re pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)") for line in sys.stdin: sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line)) Reviewers: rafael, dexonsmith, grosser Differential Revision: http://reviews.llvm.org/D7649 llvm-svn: 230794
2015-02-28 05:17:42 +08:00
%0 = load <2 x float>, <2 x float>* %Cy119
Add support for the vector-widening of vselect and vector-setcc llvm-svn: 142488
2011-10-19 17:45:11 +08:00
%1 = fptosi <2 x float> %0 to <2 x i32>
%2 = sitofp <2 x i32> %1 to <2 x float>
%3 = fcmp ogt <2 x float> %0, zeroinitializer
%4 = fadd <2 x float> %2, <float 1.000000e+00, float 1.000000e+00>
%5 = select <2 x i1> %3, <2 x float> %4, <2 x float> %2
%6 = fcmp oeq <2 x float> %2, %0
%7 = select <2 x i1> %6, <2 x float> %0, <2 x float> %5
store <2 x float> %7, <2 x float>* %Cy118
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction Essentially the same as the GEP change in r230786. A similar migration script can be used to update test cases, though a few more test case improvements/changes were required this time around: (r229269-r229278) import fileinput import sys import re pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)") for line in sys.stdin: sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line)) Reviewers: rafael, dexonsmith, grosser Differential Revision: http://reviews.llvm.org/D7649 llvm-svn: 230794
2015-02-28 05:17:42 +08:00
%8 = load <2 x float>, <2 x float>* %Cy118
Add support for the vector-widening of vselect and vector-setcc llvm-svn: 142488
2011-10-19 17:45:11 +08:00
store <2 x float> %8, <2 x float>* %Cy11a
ret void
}