forked from OSchip/llvm-project
29 lines
975 B
LLVM
29 lines
975 B
LLVM
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; RUN: llc -march=hexagon < %s | FileCheck %s
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; CHECK: r{{[0-9]*}} += sfmpy(r{{[0-9]*}},r{{[0-9]*}},p{{[0-3]}}):scale
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target triple = "hexagon"
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@g0 = private unnamed_addr constant [65 x i8] c"%f : Q6_R_sfmpyacc_RRp_scale(FLT_MIN,FLT_MIN,FLT_MIN,CHAR_MIN)\0A\00", align 1
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; Function Attrs: nounwind
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declare i32 @f0(i8*, ...) #0
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; Function Attrs: nounwind
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define i32 @f1() #0 {
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b0:
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%v0 = alloca i32, align 4
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%v1 = alloca i32, align 4
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store i32 0, i32* %v0
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store i32 0, i32* %v1, align 4
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%v2 = call float @llvm.hexagon.F2.sffma.sc(float 0x3810000000000000, float 0x3810000000000000, float 0x3810000000000000, i32 0)
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%v3 = fpext float %v2 to double
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%v4 = call i32 (i8*, ...) @f0(i8* getelementptr inbounds ([65 x i8], [65 x i8]* @g0, i32 0, i32 0), double %v3) #0
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ret i32 0
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}
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; Function Attrs: readnone
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declare float @llvm.hexagon.F2.sffma.sc(float, float, float, i32) #1
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attributes #0 = { nounwind "target-cpu"="hexagonv55" }
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attributes #1 = { readnone }
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