2018-07-12 04:25:49 +08:00
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; RUN: llc -march=amdgcn -verify-machineinstrs < %s | FileCheck -allow-deprecated-dag-overlap %s -check-prefixes=GCN,FUNC,SI
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; RUN: llc -march=amdgcn -mcpu=tonga -mattr=-flat-for-global -verify-machineinstrs < %s | FileCheck -allow-deprecated-dag-overlap %s -check-prefixes=GCN,FUNC,VI
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; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck -allow-deprecated-dag-overlap %s -check-prefix=EG -check-prefix=FUNC
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2016-07-23 01:01:21 +08:00
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declare float @llvm.fabs.f32(float) #1
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2013-04-19 10:10:53 +08:00
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2014-12-03 05:02:20 +08:00
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; FUNC-LABEL: {{^}}fp_to_uint_f32_to_i32:
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2014-09-26 07:16:18 +08:00
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; EG: FLT_TO_UINT {{\** *}}T{{[0-9]+\.[XYZW], PV\.[XYZW]}}
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2014-12-03 05:02:20 +08:00
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2016-11-12 08:19:11 +08:00
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; GCN: v_cvt_u32_f32_e32
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; GCN: s_endpgm
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2017-03-22 05:39:51 +08:00
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define amdgpu_kernel void @fp_to_uint_f32_to_i32 (i32 addrspace(1)* %out, float %in) {
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2014-09-26 07:16:18 +08:00
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%conv = fptoui float %in to i32
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store i32 %conv, i32 addrspace(1)* %out
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ret void
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}
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2014-12-03 05:02:20 +08:00
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; FUNC-LABEL: {{^}}fp_to_uint_v2f32_to_v2i32:
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2014-07-11 06:40:21 +08:00
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; EG: FLT_TO_UINT {{\** *}}T{{[0-9]+\.[XYZW], PV\.[XYZW]}}
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; EG: FLT_TO_UINT {{\** *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
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2014-12-03 05:02:20 +08:00
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2016-11-12 08:19:11 +08:00
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; GCN: v_cvt_u32_f32_e32
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; GCN: v_cvt_u32_f32_e32
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2017-03-22 05:39:51 +08:00
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define amdgpu_kernel void @fp_to_uint_v2f32_to_v2i32(<2 x i32> addrspace(1)* %out, <2 x float> %in) {
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2013-08-01 23:23:42 +08:00
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%result = fptoui <2 x float> %in to <2 x i32>
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store <2 x i32> %result, <2 x i32> addrspace(1)* %out
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ret void
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}
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2014-12-03 05:02:20 +08:00
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; FUNC-LABEL: {{^}}fp_to_uint_v4f32_to_v4i32:
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2014-07-11 06:40:21 +08:00
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; EG: FLT_TO_UINT {{\** *}}T{{[0-9]+\.[XYZW], PV\.[XYZW]}}
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; EG: FLT_TO_UINT {{\** *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
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; EG: FLT_TO_UINT {{\** *}}T{{[0-9]+\.[XYZW], PV\.[XYZW]}}
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; EG: FLT_TO_UINT {{\** *}}T{{[0-9]+\.[XYZW], PV\.[XYZW]}}
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2016-11-12 08:19:11 +08:00
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; GCN: v_cvt_u32_f32_e32
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; GCN: v_cvt_u32_f32_e32
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; GCN: v_cvt_u32_f32_e32
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; GCN: v_cvt_u32_f32_e32
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2013-04-19 10:10:53 +08:00
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2017-03-22 05:39:51 +08:00
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define amdgpu_kernel void @fp_to_uint_v4f32_to_v4i32(<4 x i32> addrspace(1)* %out, <4 x float> addrspace(1)* %in) {
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2015-02-28 05:17:42 +08:00
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%value = load <4 x float>, <4 x float> addrspace(1) * %in
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2013-04-19 10:10:53 +08:00
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%result = fptoui <4 x float> %value to <4 x i32>
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store <4 x i32> %result, <4 x i32> addrspace(1)* %out
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ret void
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}
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2014-07-11 06:40:21 +08:00
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2014-12-03 05:02:20 +08:00
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; FUNC: {{^}}fp_to_uint_f32_to_i64:
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2014-07-11 06:40:21 +08:00
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; EG-DAG: AND_INT
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; EG-DAG: LSHR
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; EG-DAG: SUB_INT
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; EG-DAG: AND_INT
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; EG-DAG: ASHR
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; EG-DAG: AND_INT
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; EG-DAG: OR_INT
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; EG-DAG: SUB_INT
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; EG-DAG: LSHL
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; EG-DAG: LSHL
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; EG-DAG: SUB_INT
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; EG-DAG: LSHR
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; EG-DAG: LSHR
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; EG-DAG: SETGT_UINT
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; EG-DAG: SETGT_INT
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; EG-DAG: XOR_INT
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; EG-DAG: XOR_INT
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; EG: SUB_INT
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; EG-DAG: SUB_INT
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2014-07-26 13:49:40 +08:00
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; EG-DAG: CNDE_INT
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; EG-DAG: CNDE_INT
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2014-07-11 06:40:21 +08:00
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2016-11-12 08:19:11 +08:00
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; GCN: s_endpgm
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2017-03-22 05:39:51 +08:00
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define amdgpu_kernel void @fp_to_uint_f32_to_i64(i64 addrspace(1)* %out, float %x) {
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2014-07-11 06:40:21 +08:00
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%conv = fptoui float %x to i64
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store i64 %conv, i64 addrspace(1)* %out
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ret void
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}
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2014-12-03 05:02:20 +08:00
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; FUNC: {{^}}fp_to_uint_v2f32_to_v2i64:
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2014-07-11 06:40:21 +08:00
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; EG-DAG: AND_INT
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; EG-DAG: LSHR
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; EG-DAG: SUB_INT
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; EG-DAG: AND_INT
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; EG-DAG: ASHR
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; EG-DAG: AND_INT
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; EG-DAG: OR_INT
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; EG-DAG: SUB_INT
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; EG-DAG: LSHL
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; EG-DAG: LSHL
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; EG-DAG: SUB_INT
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; EG-DAG: LSHR
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; EG-DAG: LSHR
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; EG-DAG: SETGT_UINT
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; EG-DAG: SETGT_INT
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; EG-DAG: XOR_INT
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; EG-DAG: XOR_INT
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; EG-DAG: SUB_INT
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; EG-DAG: SUB_INT
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2014-07-26 13:49:40 +08:00
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; EG-DAG: CNDE_INT
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; EG-DAG: CNDE_INT
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2014-07-11 06:40:21 +08:00
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; EG-DAG: AND_INT
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; EG-DAG: LSHR
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; EG-DAG: SUB_INT
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; EG-DAG: AND_INT
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; EG-DAG: ASHR
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; EG-DAG: AND_INT
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; EG-DAG: OR_INT
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; EG-DAG: SUB_INT
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; EG-DAG: LSHL
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; EG-DAG: LSHL
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; EG-DAG: SUB_INT
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; EG-DAG: LSHR
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; EG-DAG: LSHR
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; EG-DAG: SETGT_UINT
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; EG-DAG: SETGT_INT
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; EG-DAG: XOR_INT
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; EG-DAG: XOR_INT
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; EG-DAG: SUB_INT
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; EG-DAG: SUB_INT
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2014-07-26 13:49:40 +08:00
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; EG-DAG: CNDE_INT
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; EG-DAG: CNDE_INT
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2014-07-11 06:40:21 +08:00
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2016-11-12 08:19:11 +08:00
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; GCN: s_endpgm
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2017-03-22 05:39:51 +08:00
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define amdgpu_kernel void @fp_to_uint_v2f32_to_v2i64(<2 x i64> addrspace(1)* %out, <2 x float> %x) {
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2014-07-11 06:40:21 +08:00
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%conv = fptoui <2 x float> %x to <2 x i64>
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store <2 x i64> %conv, <2 x i64> addrspace(1)* %out
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ret void
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}
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2014-12-03 05:02:20 +08:00
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; FUNC: {{^}}fp_to_uint_v4f32_to_v4i64:
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2014-07-11 06:40:21 +08:00
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; EG-DAG: AND_INT
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; EG-DAG: LSHR
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; EG-DAG: SUB_INT
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; EG-DAG: AND_INT
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; EG-DAG: ASHR
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; EG-DAG: AND_INT
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; EG-DAG: OR_INT
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; EG-DAG: SUB_INT
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; EG-DAG: LSHL
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; EG-DAG: LSHL
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; EG-DAG: SUB_INT
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; EG-DAG: LSHR
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; EG-DAG: LSHR
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; EG-DAG: SETGT_UINT
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; EG-DAG: SETGT_INT
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; EG-DAG: XOR_INT
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; EG-DAG: XOR_INT
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; EG-DAG: SUB_INT
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; EG-DAG: SUB_INT
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2014-07-26 13:49:40 +08:00
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; EG-DAG: CNDE_INT
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; EG-DAG: CNDE_INT
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2014-07-11 06:40:21 +08:00
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; EG-DAG: AND_INT
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; EG-DAG: LSHR
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; EG-DAG: SUB_INT
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; EG-DAG: AND_INT
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; EG-DAG: ASHR
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; EG-DAG: AND_INT
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; EG-DAG: OR_INT
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; EG-DAG: SUB_INT
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; EG-DAG: LSHL
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; EG-DAG: LSHL
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; EG-DAG: SUB_INT
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; EG-DAG: LSHR
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; EG-DAG: LSHR
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; EG-DAG: SETGT_UINT
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; EG-DAG: SETGT_INT
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; EG-DAG: XOR_INT
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; EG-DAG: XOR_INT
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; EG-DAG: SUB_INT
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; EG-DAG: SUB_INT
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2014-07-26 13:49:40 +08:00
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; EG-DAG: CNDE_INT
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; EG-DAG: CNDE_INT
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2014-07-11 06:40:21 +08:00
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; EG-DAG: AND_INT
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; EG-DAG: LSHR
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; EG-DAG: SUB_INT
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; EG-DAG: AND_INT
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; EG-DAG: ASHR
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; EG-DAG: AND_INT
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; EG-DAG: OR_INT
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; EG-DAG: SUB_INT
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; EG-DAG: LSHL
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; EG-DAG: LSHL
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; EG-DAG: SUB_INT
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; EG-DAG: LSHR
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; EG-DAG: LSHR
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; EG-DAG: SETGT_UINT
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; EG-DAG: SETGT_INT
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; EG-DAG: XOR_INT
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; EG-DAG: XOR_INT
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; EG-DAG: SUB_INT
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; EG-DAG: SUB_INT
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2014-07-26 13:49:40 +08:00
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; EG-DAG: CNDE_INT
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; EG-DAG: CNDE_INT
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2014-07-11 06:40:21 +08:00
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; EG-DAG: AND_INT
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; EG-DAG: LSHR
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; EG-DAG: SUB_INT
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; EG-DAG: AND_INT
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; EG-DAG: ASHR
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; EG-DAG: AND_INT
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; EG-DAG: OR_INT
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; EG-DAG: SUB_INT
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; EG-DAG: LSHL
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; EG-DAG: LSHL
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; EG-DAG: SUB_INT
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; EG-DAG: LSHR
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; EG-DAG: LSHR
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; EG-DAG: SETGT_UINT
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; EG-DAG: SETGT_INT
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; EG-DAG: XOR_INT
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; EG-DAG: XOR_INT
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; EG-DAG: SUB_INT
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; EG-DAG: SUB_INT
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2014-07-26 13:49:40 +08:00
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; EG-DAG: CNDE_INT
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; EG-DAG: CNDE_INT
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2014-07-11 06:40:21 +08:00
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2016-11-12 08:19:11 +08:00
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; GCN: s_endpgm
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2017-03-22 05:39:51 +08:00
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define amdgpu_kernel void @fp_to_uint_v4f32_to_v4i64(<4 x i64> addrspace(1)* %out, <4 x float> %x) {
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2014-07-11 06:40:21 +08:00
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%conv = fptoui <4 x float> %x to <4 x i64>
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store <4 x i64> %conv, <4 x i64> addrspace(1)* %out
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ret void
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}
|
2016-07-23 01:01:21 +08:00
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; FUNC-LABEL: {{^}}fp_to_uint_f32_to_i1:
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2016-11-12 08:19:11 +08:00
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; GCN: v_cmp_eq_f32_e64 s{{\[[0-9]+:[0-9]+\]}}, 1.0, s{{[0-9]+}}
|
2016-07-23 01:01:21 +08:00
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; EG: AND_INT
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; EG: SETE_DX10 {{[*]?}} T{{[0-9]+}}.{{[XYZW]}}, KC0[2].Z, 1.0,
|
2017-03-22 05:39:51 +08:00
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define amdgpu_kernel void @fp_to_uint_f32_to_i1(i1 addrspace(1)* %out, float %in) #0 {
|
2016-07-23 01:01:21 +08:00
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%conv = fptoui float %in to i1
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store i1 %conv, i1 addrspace(1)* %out
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ret void
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}
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|
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|
|
|
; FUNC-LABEL: {{^}}fp_to_uint_fabs_f32_to_i1:
|
2016-11-12 08:19:11 +08:00
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|
; GCN: v_cmp_eq_f32_e64 s{{\[[0-9]+:[0-9]+\]}}, 1.0, |s{{[0-9]+}}|
|
2017-03-22 05:39:51 +08:00
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|
define amdgpu_kernel void @fp_to_uint_fabs_f32_to_i1(i1 addrspace(1)* %out, float %in) #0 {
|
2016-07-23 01:01:21 +08:00
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%in.fabs = call float @llvm.fabs.f32(float %in)
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%conv = fptoui float %in.fabs to i1
|
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store i1 %conv, i1 addrspace(1)* %out
|
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ret void
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|
|
}
|
|
|
|
|
2016-11-12 08:19:11 +08:00
|
|
|
; FUNC-LABEL: {{^}}fp_to_uint_f32_to_i16:
|
2016-11-17 12:00:46 +08:00
|
|
|
; The reason different instructions are used on SI and VI is because for
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; SI fp_to_uint is legalized by the type legalizer and for VI it is
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|
; legalized by the dag legalizer and they legalize fp_to_uint differently.
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|
; SI: v_cvt_u32_f32_e32 [[VAL:v[0-9]+]], s{{[0-9]+}}
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; VI: v_cvt_i32_f32_e32 [[VAL:v[0-9]+]], s{{[0-9]+}}
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|
; GCN: buffer_store_short [[VAL]]
|
2017-03-22 05:39:51 +08:00
|
|
|
define amdgpu_kernel void @fp_to_uint_f32_to_i16(i16 addrspace(1)* %out, float %in) #0 {
|
2016-11-12 08:19:11 +08:00
|
|
|
%uint = fptoui float %in to i16
|
|
|
|
store i16 %uint, i16 addrspace(1)* %out
|
|
|
|
ret void
|
|
|
|
}
|
|
|
|
|
2016-07-23 01:01:21 +08:00
|
|
|
attributes #0 = { nounwind }
|
|
|
|
attributes #1 = { nounwind readnone }
|