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llvm-project/clang/test/Preprocessor/aarch64-target-features.c

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Add support for AArch64 target. In cooperation with the LLVM patch, this should implement all scalar front-end parts of the C and C++ ABIs for AArch64. This patch excludes the NEON support also reviewed due to an outbreak of batshit insanity in our legal department. That will be committed soon bringing the changes to precisely what has been approved. Further reviews would be gratefully received. llvm-svn: 174055
2013-01-31 20:13:10 +08:00
// RUN: %clang -target aarch64-none-linux-gnu -x c -E -dM %s -o - | FileCheck %s
[ARM64] Add ARM64 RUN lines to a bunch of tests that had AARCH64 RUN lines. This covers all tests in tests/Driver and tests/Preprocessor, but there are some failing tests in test/Sema that need looking into. llvm-svn: 206464
2014-04-17 20:51:36 +08:00
// RUN: %clang -target arm64-none-linux-gnu -x c -E -dM %s -o - | FileCheck %s
Clean up predefined macros for AArch64 to follow ACLE 2.0. llvm-svn: 195068
2013-11-19 09:33:17 +08:00
// CHECK: __AARCH64EL__ 1
// CHECK: __ARM_64BIT_STATE 1
Implement ACLE 2.0 macros of chapters 6.4 and 6.5 for [ARM] and [Aarch64] targets. Differential Revision: http://reviews.llvm.org/D12244 Change-Id: Iffd4e822c15e18668fe8868278230ff232ef50aa llvm-svn: 246768
2015-09-03 22:40:57 +08:00
// CHECK-NOT: __ARM_32BIT_STATE
Clean up predefined macros for AArch64 to follow ACLE 2.0. llvm-svn: 195068
2013-11-19 09:33:17 +08:00
// CHECK: __ARM_ACLE 200
// CHECK: __ARM_ALIGN_MAX_STACK_PWR 4
AArch64: bring predefines in line with most recent ACLE document The prefixes and names used are now identical to 32-bit ARM, which is also expected to remain unchanged. If we made this change after a release, we'd probably have to support both variants for a while, but I think since AArch64 exists only on trunk now, it's acceptable to simply swap them now. llvm-svn: 178870
2013-04-05 22:08:55 +08:00
// CHECK: __ARM_ARCH 8
Clean up predefined macros for AArch64 to follow ACLE 2.0. llvm-svn: 195068
2013-11-19 09:33:17 +08:00
// CHECK: __ARM_ARCH_ISA_A64 1
Implement ACLE 2.0 macros of chapters 6.4 and 6.5 for [ARM] and [Aarch64] targets. Differential Revision: http://reviews.llvm.org/D12244 Change-Id: Iffd4e822c15e18668fe8868278230ff232ef50aa llvm-svn: 246768
2015-09-03 22:40:57 +08:00
// CHECK-NOT: __ARM_ARCH_ISA_ARM
// CHECK-NOT: __ARM_ARCH_ISA_THUMB
// CHECK-NOT: __ARM_FEATURE_QBIT
// CHECK-NOT: __ARM_FEATURE_DSP
// CHECK-NOT: __ARM_FEATURE_SAT
// CHECK-NOT: __ARM_FEATURE_SIMD32
AArch64: bring predefines in line with most recent ACLE document The prefixes and names used are now identical to 32-bit ARM, which is also expected to remain unchanged. If we made this change after a release, we'd probably have to support both variants for a while, but I think since AArch64 exists only on trunk now, it's acceptable to simply swap them now. llvm-svn: 178870
2013-04-05 22:08:55 +08:00
// CHECK: __ARM_ARCH_PROFILE 'A'
// CHECK-NOT: __ARM_FEATURE_BIG_ENDIAN
// CHECK: __ARM_FEATURE_CLZ 1
[ARM64/AArch64] Hook up CRC32 subtarget feature to the driver llvm-svn: 207841
2014-05-02 23:17:51 +08:00
// CHECK-NOT: __ARM_FEATURE_CRC32 1
Clean up predefined macros for AArch64 to follow ACLE 2.0. llvm-svn: 195068
2013-11-19 09:33:17 +08:00
// CHECK-NOT: __ARM_FEATURE_CRYPTO 1
[ARM] Add ACLE predefines: maxmin, rounding and h/w integer division Patch by Assad Hashmi! llvm-svn: 217760
2014-09-15 19:25:38 +08:00
// CHECK: __ARM_FEATURE_DIRECTED_ROUNDING 1
Clean up predefined macros for AArch64 to follow ACLE 2.0. llvm-svn: 195068
2013-11-19 09:33:17 +08:00
// CHECK: __ARM_FEATURE_DIV 1
AArch64: bring predefines in line with most recent ACLE document The prefixes and names used are now identical to 32-bit ARM, which is also expected to remain unchanged. If we made this change after a release, we'd probably have to support both variants for a while, but I think since AArch64 exists only on trunk now, it's acceptable to simply swap them now. llvm-svn: 178870
2013-04-05 22:08:55 +08:00
// CHECK: __ARM_FEATURE_FMA 1
[ARM] Add ACLE predefines: maxmin, rounding and h/w integer division Patch by Assad Hashmi! llvm-svn: 217760
2014-09-15 19:25:38 +08:00
// CHECK: __ARM_FEATURE_IDIV 1
Implement ACLE 2.0 macros of chapters 6.4 and 6.5 for [ARM] and [Aarch64] targets. Differential Revision: http://reviews.llvm.org/D12244 Change-Id: Iffd4e822c15e18668fe8868278230ff232ef50aa llvm-svn: 246768
2015-09-03 22:40:57 +08:00
// CHECK: __ARM_FEATURE_LDREX 0xF
[ARM] Add ACLE predefines: maxmin, rounding and h/w integer division Patch by Assad Hashmi! llvm-svn: 217760
2014-09-15 19:25:38 +08:00
// CHECK: __ARM_FEATURE_NUMERIC_MAXMIN 1
AArch64: bring predefines in line with most recent ACLE document The prefixes and names used are now identical to 32-bit ARM, which is also expected to remain unchanged. If we made this change after a release, we'd probably have to support both variants for a while, but I think since AArch64 exists only on trunk now, it's acceptable to simply swap them now. llvm-svn: 178870
2013-04-05 22:08:55 +08:00
// CHECK: __ARM_FEATURE_UNALIGNED 1
Implement ACLE 2.0 macros of chapters 6.4 and 6.5 for [ARM] and [Aarch64] targets. Differential Revision: http://reviews.llvm.org/D12244 Change-Id: Iffd4e822c15e18668fe8868278230ff232ef50aa llvm-svn: 246768
2015-09-03 22:40:57 +08:00
// CHECK: __ARM_FP 0xE
[AArch64] Define the macro __ARM_FP16_ARGS The ACLE (ARM C Language Extensions) 2.0 defines that the predefined macro __ARM_FP16_ARGS should be defined if __fp16 can be used as an argument and result. The support for __fp16 to be used as an argument and result is already implemented for AArch64 so this change is just adding the missing macro. Differential Revision: http://reviews.llvm.org/D12240 llvm-svn: 245833
2015-08-24 18:11:14 +08:00
// CHECK: __ARM_FP16_ARGS 1
AArch64: bring predefines in line with most recent ACLE document The prefixes and names used are now identical to 32-bit ARM, which is also expected to remain unchanged. If we made this change after a release, we'd probably have to support both variants for a while, but I think since AArch64 exists only on trunk now, it's acceptable to simply swap them now. llvm-svn: 178870
2013-04-05 22:08:55 +08:00
// CHECK: __ARM_FP16_FORMAT_IEEE 1
Clean up predefined macros for AArch64 to follow ACLE 2.0. llvm-svn: 195068
2013-11-19 09:33:17 +08:00
// CHECK-NOT: __ARM_FP_FAST 1
Enable AArch64 NEON by default. llvm-svn: 201384
2014-02-14 12:37:46 +08:00
// CHECK: __ARM_NEON 1
Implement ACLE 2.0 macros of chapters 6.4 and 6.5 for [ARM] and [Aarch64] targets. Differential Revision: http://reviews.llvm.org/D12244 Change-Id: Iffd4e822c15e18668fe8868278230ff232ef50aa llvm-svn: 246768
2015-09-03 22:40:57 +08:00
// CHECK: __ARM_NEON_FP 0xE
Clean up predefined macros for AArch64 to follow ACLE 2.0. llvm-svn: 195068
2013-11-19 09:33:17 +08:00
// CHECK: __ARM_PCS_AAPCS64 1
Implement ACLE 2.0 macros of chapters 6.6 and 6.7 for [ARM] and [Aarch64] targets. Differential Revision: http://reviews.llvm.org/D12633 llvm-svn: 249140
2015-10-02 22:56:37 +08:00
// CHECK-NOT: __ARM_PCS 1
// CHECK-NOT: __ARM_PCS_VFP 1
Clean up predefined macros for AArch64 to follow ACLE 2.0. llvm-svn: 195068
2013-11-19 09:33:17 +08:00
// CHECK-NOT: __ARM_SIZEOF_MINIMAL_ENUM 1
// CHECK-NOT: __ARM_SIZEOF_WCHAR_T 2
[AArch64] Add support for handling the +sve target feature. This also adds the appropriate predefine for SVE if enabled. Differential Revision: https://reviews.llvm.org/D35118 llvm-svn: 307919
2017-07-13 23:36:01 +08:00
// CHECK-NOT: __ARM_FEATURE_SVE
[AAch64] Add the __ARM_FEATURE_DOTPROD macro definition This matches what GCC does. https://github.com/gcc-mirror/gcc/blob/master/gcc/config/aarch64/aarch64-c.c Differential Revision: https://reviews.llvm.org/D45544 llvm-svn: 330229
2018-04-18 06:38:40 +08:00
// CHECK-NOT: __ARM_FEATURE_DOTPROD
[clang][AARCH64] Add __ARM_FEATURE_{PAC, BTI}_DEFAULT defines Summary: As defined by Arm C Language Extensions (ACLE) these macro defines should be set to specific values depending on -mbranch-protection. Reviewers: chill Reviewed By: chill Subscribers: danielkiss, cfe-commits, kristof.beyls Tags: #clang Differential Revision: https://reviews.llvm.org/D77134
2020-04-02 18:10:41 +08:00
// CHECK-NOT: __ARM_FEATURE_PAC_DEFAULT
// CHECK-NOT: __ARM_FEATURE_BTI_DEFAULT
Add support for AArch64 target. In cooperation with the LLVM patch, this should implement all scalar front-end parts of the C and C++ ABIs for AArch64. This patch excludes the NEON support also reviewed due to an outbreak of batshit insanity in our legal department. That will be committed soon bringing the changes to precisely what has been approved. Further reviews would be gratefully received. llvm-svn: 174055
2013-01-31 20:13:10 +08:00
[AArch64] Implement Clang CLI interface proposal about "-march". 1. Revert "Add default feature for CPUs on AArch64 target in Clang" at r210625. Then, all enabled feature will by passed explicitly by -target-feature in -cc1 option. 2. Get "-mfpu" deprecated. 3. Implement support of "-march". Usage is: -march=armv8-a+[no]feature For instance, "-march=armv8-a+neon+crc+nocrypto". Here "armv8-a" is necessary, and CPU names are not acceptable. Candidate features are fp, neon, crc and crypto. Where conflicting feature modifiers are specified, the right-most feature is used. 4. Implement support of "-mtune". Usage is: -march=CPU_NAME For instance, "-march=cortex-a57". This option will ONLY get micro-architectural feature enabled specifying to target CPU, like "+zcm" and "+zcz" for cyclone. Any architectural features WON'T be modified. 5. Change usage of "-mcpu" to "-mcpu=CPU_NAME+[no]feature", which is an alias to "-march={feature of CPU_NAME}+[no]feature" and "-mtune=CPU_NAME" together. Where this option is used in conjunction with -march or -mtune, those options take precedence over the appropriate part of this option. llvm-svn: 213353
2014-07-18 15:03:22 +08:00
// RUN: %clang -target aarch64-none-linux-gnu -march=armv8-a+crypto -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-CRYPTO %s
// RUN: %clang -target arm64-none-linux-gnu -march=armv8-a+crypto -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-CRYPTO %s
Clean up predefined macros for AArch64 to follow ACLE 2.0. llvm-svn: 195068
2013-11-19 09:33:17 +08:00
// CHECK-CRYPTO: __ARM_FEATURE_CRYPTO 1
Add support for AArch64 target. In cooperation with the LLVM patch, this should implement all scalar front-end parts of the C and C++ ABIs for AArch64. This patch excludes the NEON support also reviewed due to an outbreak of batshit insanity in our legal department. That will be committed soon bringing the changes to precisely what has been approved. Further reviews would be gratefully received. llvm-svn: 174055
2013-01-31 20:13:10 +08:00
[ARM64/AArch64] Hook up CRC32 subtarget feature to the driver llvm-svn: 207841
2014-05-02 23:17:51 +08:00
// RUN: %clang -target aarch64-none-linux-gnu -mcrc -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-CRC32 %s
// RUN: %clang -target arm64-none-linux-gnu -mcrc -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-CRC32 %s
[AArch64] Implement Clang CLI interface proposal about "-march". 1. Revert "Add default feature for CPUs on AArch64 target in Clang" at r210625. Then, all enabled feature will by passed explicitly by -target-feature in -cc1 option. 2. Get "-mfpu" deprecated. 3. Implement support of "-march". Usage is: -march=armv8-a+[no]feature For instance, "-march=armv8-a+neon+crc+nocrypto". Here "armv8-a" is necessary, and CPU names are not acceptable. Candidate features are fp, neon, crc and crypto. Where conflicting feature modifiers are specified, the right-most feature is used. 4. Implement support of "-mtune". Usage is: -march=CPU_NAME For instance, "-march=cortex-a57". This option will ONLY get micro-architectural feature enabled specifying to target CPU, like "+zcm" and "+zcz" for cyclone. Any architectural features WON'T be modified. 5. Change usage of "-mcpu" to "-mcpu=CPU_NAME+[no]feature", which is an alias to "-march={feature of CPU_NAME}+[no]feature" and "-mtune=CPU_NAME" together. Where this option is used in conjunction with -march or -mtune, those options take precedence over the appropriate part of this option. llvm-svn: 213353
2014-07-18 15:03:22 +08:00
// RUN: %clang -target aarch64-none-linux-gnu -march=armv8-a+crc -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-CRC32 %s
// RUN: %clang -target arm64-none-linux-gnu -march=armv8-a+crc -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-CRC32 %s
[ARM64/AArch64] Hook up CRC32 subtarget feature to the driver llvm-svn: 207841
2014-05-02 23:17:51 +08:00
// CHECK-CRC32: __ARM_FEATURE_CRC32 1
Implement ACLE 2.0 macros of chapters 6.6 and 6.7 for [ARM] and [Aarch64] targets. Differential Revision: http://reviews.llvm.org/D12633 llvm-svn: 249140
2015-10-02 22:56:37 +08:00
// RUN: %clang -target aarch64-none-linux-gnu -fno-math-errno -fno-signed-zeros\
// RUN: -fno-trapping-math -fassociative-math -freciprocal-math\
// RUN: -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-FASTMATH %s
Add support for AArch64 target. In cooperation with the LLVM patch, this should implement all scalar front-end parts of the C and C++ ABIs for AArch64. This patch excludes the NEON support also reviewed due to an outbreak of batshit insanity in our legal department. That will be committed soon bringing the changes to precisely what has been approved. Further reviews would be gratefully received. llvm-svn: 174055
2013-01-31 20:13:10 +08:00
// RUN: %clang -target aarch64-none-linux-gnu -ffast-math -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-FASTMATH %s
[ARM64/AArch64] Define the correct value for __ARM_NEON_FP llvm-svn: 207842
2014-05-02 23:18:38 +08:00
// RUN: %clang -target arm64-none-linux-gnu -ffast-math -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-FASTMATH %s
Clean up predefined macros for AArch64 to follow ACLE 2.0. llvm-svn: 195068
2013-11-19 09:33:17 +08:00
// CHECK-FASTMATH: __ARM_FP_FAST 1
Add support for AArch64 target. In cooperation with the LLVM patch, this should implement all scalar front-end parts of the C and C++ ABIs for AArch64. This patch excludes the NEON support also reviewed due to an outbreak of batshit insanity in our legal department. That will be committed soon bringing the changes to precisely what has been approved. Further reviews would be gratefully received. llvm-svn: 174055
2013-01-31 20:13:10 +08:00
// RUN: %clang -target aarch64-none-linux-gnu -fshort-wchar -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-SHORTWCHAR %s
[ARM64/AArch64] Define the correct value for __ARM_NEON_FP llvm-svn: 207842
2014-05-02 23:18:38 +08:00
// RUN: %clang -target arm64-none-linux-gnu -fshort-wchar -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-SHORTWCHAR %s
AArch64: bring predefines in line with most recent ACLE document The prefixes and names used are now identical to 32-bit ARM, which is also expected to remain unchanged. If we made this change after a release, we'd probably have to support both variants for a while, but I think since AArch64 exists only on trunk now, it's acceptable to simply swap them now. llvm-svn: 178870
2013-04-05 22:08:55 +08:00
// CHECK-SHORTWCHAR: __ARM_SIZEOF_WCHAR_T 2
Add support for AArch64 target. In cooperation with the LLVM patch, this should implement all scalar front-end parts of the C and C++ ABIs for AArch64. This patch excludes the NEON support also reviewed due to an outbreak of batshit insanity in our legal department. That will be committed soon bringing the changes to precisely what has been approved. Further reviews would be gratefully received. llvm-svn: 174055
2013-01-31 20:13:10 +08:00
// RUN: %clang -target aarch64-none-linux-gnu -fshort-enums -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-SHORTENUMS %s
[ARM64/AArch64] Define the correct value for __ARM_NEON_FP llvm-svn: 207842
2014-05-02 23:18:38 +08:00
// RUN: %clang -target arm64-none-linux-gnu -fshort-enums -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-SHORTENUMS %s
AArch64: bring predefines in line with most recent ACLE document The prefixes and names used are now identical to 32-bit ARM, which is also expected to remain unchanged. If we made this change after a release, we'd probably have to support both variants for a while, but I think since AArch64 exists only on trunk now, it's acceptable to simply swap them now. llvm-svn: 178870
2013-04-05 22:08:55 +08:00
// CHECK-SHORTENUMS: __ARM_SIZEOF_MINIMAL_ENUM 1
Add support for AArch64 target. In cooperation with the LLVM patch, this should implement all scalar front-end parts of the C and C++ ABIs for AArch64. This patch excludes the NEON support also reviewed due to an outbreak of batshit insanity in our legal department. That will be committed soon bringing the changes to precisely what has been approved. Further reviews would be gratefully received. llvm-svn: 174055
2013-01-31 20:13:10 +08:00
[AArch64] Implement Clang CLI interface proposal about "-march". 1. Revert "Add default feature for CPUs on AArch64 target in Clang" at r210625. Then, all enabled feature will by passed explicitly by -target-feature in -cc1 option. 2. Get "-mfpu" deprecated. 3. Implement support of "-march". Usage is: -march=armv8-a+[no]feature For instance, "-march=armv8-a+neon+crc+nocrypto". Here "armv8-a" is necessary, and CPU names are not acceptable. Candidate features are fp, neon, crc and crypto. Where conflicting feature modifiers are specified, the right-most feature is used. 4. Implement support of "-mtune". Usage is: -march=CPU_NAME For instance, "-march=cortex-a57". This option will ONLY get micro-architectural feature enabled specifying to target CPU, like "+zcm" and "+zcz" for cyclone. Any architectural features WON'T be modified. 5. Change usage of "-mcpu" to "-mcpu=CPU_NAME+[no]feature", which is an alias to "-march={feature of CPU_NAME}+[no]feature" and "-mtune=CPU_NAME" together. Where this option is used in conjunction with -march or -mtune, those options take precedence over the appropriate part of this option. llvm-svn: 213353
2014-07-18 15:03:22 +08:00
// RUN: %clang -target aarch64-none-linux-gnu -march=armv8-a+simd -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-NEON %s
// RUN: %clang -target arm64-none-linux-gnu -march=armv8-a+simd -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-NEON %s
Clean up predefined macros for AArch64 to follow ACLE 2.0. llvm-svn: 195068
2013-11-19 09:33:17 +08:00
// CHECK-NEON: __ARM_NEON 1
Implement ACLE 2.0 macros of chapters 6.4 and 6.5 for [ARM] and [Aarch64] targets. Differential Revision: http://reviews.llvm.org/D12244 Change-Id: Iffd4e822c15e18668fe8868278230ff232ef50aa llvm-svn: 246768
2015-09-03 22:40:57 +08:00
// CHECK-NEON: __ARM_NEON_FP 0xE
[AArch64] Add default features for CPUs on AArch64 target. For ARM target, we can use CRYPTO and CRC features if we select cortex-a57 by '-mcpu', but for AArch64 target, it doesn't work unless adding with '-mfpu=crypto-neon-fp-armv8'. To keep consistency between front-end and back-end and get end-users more easier to use, we'd better add default feature for CPUs on AArch64 target as well. llvm-svn: 210625
2014-06-11 09:42:16 +08:00
ARMV8-A archkind and target defines helper functions This introduces helper functions that set target defines for different ARMV8-A architecture kinds. It fixes an issue that the v8.1 define ARM_FEATURE_QRDMX was not set for v8.2. These helper functions make things more “scalable” if we want to add ARMv8.3 at some point, and a cleanup has been done to hold the architecture kind in one variable (instead of one for each). Differential Revision: https://reviews.llvm.org/D34686 llvm-svn: 306805
2017-06-30 16:07:34 +08:00
// RUN: %clang -target aarch64-none-eabi -march=armv8.1-a -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-QRDMX %s
// RUN: %clang -target aarch64-none-eabi -march=armv8.2-a -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-QRDMX %s
// CHECK-QRDMX: __ARM_FEATURE_QRDMX 1
ARM v8.1a adds Advanced SIMD instructions for Rounding Double Multiply Add/Subtract. The following instructions are added to AArch32 instruction set: - VQRDMLAH: Vector Saturating Rounding Doubling Multiply Accumulate Returning High Half - VQRDMLSH: Vector Saturating Rounding Doubling Multiply Subtract Returning High Half The following instructions are added to AArch64 instruction set: - SQRDMLAH: Signed Saturating Rounding Doubling Multiply Accumulate Returning High Half - SQRDMLSH: Signed Saturating Rounding Doubling Multiply Subtract Returning High Half This patch adds intrinsic and ACLE macro support for these instructions, as well as corresponding tests. Differential Revision: http://reviews.llvm.org/D14982 llvm-svn: 254250
2015-11-29 18:43:59 +08:00
[AArch64] Implement Clang CLI interface proposal about "-march". 1. Revert "Add default feature for CPUs on AArch64 target in Clang" at r210625. Then, all enabled feature will by passed explicitly by -target-feature in -cc1 option. 2. Get "-mfpu" deprecated. 3. Implement support of "-march". Usage is: -march=armv8-a+[no]feature For instance, "-march=armv8-a+neon+crc+nocrypto". Here "armv8-a" is necessary, and CPU names are not acceptable. Candidate features are fp, neon, crc and crypto. Where conflicting feature modifiers are specified, the right-most feature is used. 4. Implement support of "-mtune". Usage is: -march=CPU_NAME For instance, "-march=cortex-a57". This option will ONLY get micro-architectural feature enabled specifying to target CPU, like "+zcm" and "+zcz" for cyclone. Any architectural features WON'T be modified. 5. Change usage of "-mcpu" to "-mcpu=CPU_NAME+[no]feature", which is an alias to "-march={feature of CPU_NAME}+[no]feature" and "-mtune=CPU_NAME" together. Where this option is used in conjunction with -march or -mtune, those options take precedence over the appropriate part of this option. llvm-svn: 213353
2014-07-18 15:03:22 +08:00
// RUN: %clang -target aarch64 -march=arm64 -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-ARCH-NOT-ACCEPT %s
// RUN: %clang -target aarch64 -march=aarch64 -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-ARCH-NOT-ACCEPT %s
// CHECK-ARCH-NOT-ACCEPT: error: the clang compiler does not support
[AArch64] Add default features for CPUs on AArch64 target. For ARM target, we can use CRYPTO and CRC features if we select cortex-a57 by '-mcpu', but for AArch64 target, it doesn't work unless adding with '-mfpu=crypto-neon-fp-armv8'. To keep consistency between front-end and back-end and get end-users more easier to use, we'd better add default feature for CPUs on AArch64 target as well. llvm-svn: 210625
2014-06-11 09:42:16 +08:00
[AArch64] Implement Clang CLI interface proposal about "-march". 1. Revert "Add default feature for CPUs on AArch64 target in Clang" at r210625. Then, all enabled feature will by passed explicitly by -target-feature in -cc1 option. 2. Get "-mfpu" deprecated. 3. Implement support of "-march". Usage is: -march=armv8-a+[no]feature For instance, "-march=armv8-a+neon+crc+nocrypto". Here "armv8-a" is necessary, and CPU names are not acceptable. Candidate features are fp, neon, crc and crypto. Where conflicting feature modifiers are specified, the right-most feature is used. 4. Implement support of "-mtune". Usage is: -march=CPU_NAME For instance, "-march=cortex-a57". This option will ONLY get micro-architectural feature enabled specifying to target CPU, like "+zcm" and "+zcz" for cyclone. Any architectural features WON'T be modified. 5. Change usage of "-mcpu" to "-mcpu=CPU_NAME+[no]feature", which is an alias to "-march={feature of CPU_NAME}+[no]feature" and "-mtune=CPU_NAME" together. Where this option is used in conjunction with -march or -mtune, those options take precedence over the appropriate part of this option. llvm-svn: 213353
2014-07-18 15:03:22 +08:00
// RUN: %clang -target aarch64 -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-GENERIC %s
// RUN: %clang -target aarch64 -march=armv8-a -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-GENERIC %s
// CHECK-GENERIC: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-feature" "+neon"
[AArch64] Add default features for CPUs on AArch64 target. For ARM target, we can use CRYPTO and CRC features if we select cortex-a57 by '-mcpu', but for AArch64 target, it doesn't work unless adding with '-mfpu=crypto-neon-fp-armv8'. To keep consistency between front-end and back-end and get end-users more easier to use, we'd better add default feature for CPUs on AArch64 target as well. llvm-svn: 210625
2014-06-11 09:42:16 +08:00
[AArch64] Implement Clang CLI interface proposal about "-march". 1. Revert "Add default feature for CPUs on AArch64 target in Clang" at r210625. Then, all enabled feature will by passed explicitly by -target-feature in -cc1 option. 2. Get "-mfpu" deprecated. 3. Implement support of "-march". Usage is: -march=armv8-a+[no]feature For instance, "-march=armv8-a+neon+crc+nocrypto". Here "armv8-a" is necessary, and CPU names are not acceptable. Candidate features are fp, neon, crc and crypto. Where conflicting feature modifiers are specified, the right-most feature is used. 4. Implement support of "-mtune". Usage is: -march=CPU_NAME For instance, "-march=cortex-a57". This option will ONLY get micro-architectural feature enabled specifying to target CPU, like "+zcm" and "+zcz" for cyclone. Any architectural features WON'T be modified. 5. Change usage of "-mcpu" to "-mcpu=CPU_NAME+[no]feature", which is an alias to "-march={feature of CPU_NAME}+[no]feature" and "-mtune=CPU_NAME" together. Where this option is used in conjunction with -march or -mtune, those options take precedence over the appropriate part of this option. llvm-svn: 213353
2014-07-18 15:03:22 +08:00
// RUN: %clang -target aarch64 -mtune=cyclone -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-MTUNE-CYCLONE %s
[AArch64] Add support for handling the +sve target feature. This also adds the appropriate predefine for SVE if enabled. Differential Revision: https://reviews.llvm.org/D35118 llvm-svn: 307919
2017-07-13 23:36:01 +08:00
// RUN: %clang -target aarch64-none-linux-gnu -march=armv8-a+sve -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-SVE %s
[AArch64] Disable __ARM_FEATURE_SVE without ACLE. The Arm C Language Extensions for SVE document specifies that __ARM_FEATURE_SVE should be set when the compiler supports SVE and implements all the extensions described in the document. This is currently not yet the case, so the feature should be disabled until the compiler can provide all the extensions as described. Reviewers: c-rhodes, rengolin, rovka, ktkachov Reviewed By: rengolin Differential Revision: https://reviews.llvm.org/D65404 llvm-svn: 367301
2019-07-30 18:14:39 +08:00
// CHECK-SVE-NOT: __ARM_FEATURE_SVE 1
[AArch64] Add support for handling the +sve target feature. This also adds the appropriate predefine for SVE if enabled. Differential Revision: https://reviews.llvm.org/D35118 llvm-svn: 307919
2017-07-13 23:36:01 +08:00
[AAch64] Add the __ARM_FEATURE_DOTPROD macro definition This matches what GCC does. https://github.com/gcc-mirror/gcc/blob/master/gcc/config/aarch64/aarch64-c.c Differential Revision: https://reviews.llvm.org/D45544 llvm-svn: 330229
2018-04-18 06:38:40 +08:00
// RUN: %clang -target aarch64-none-linux-gnu -march=armv8.2a+dotprod -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-DOTPROD %s
// CHECK-DOTPROD: __ARM_FEATURE_DOTPROD 1
[AArch64] Implement FP16FML intrinsics Generate the FP16FML intrinsics into arm_neon.h (AArch64 only for now). Add two new type modifiers to NeonEmitter to handle the new prototypes. Define __ARM_FEATURE_FP16FML when +fp16fml is enabled and guard the intrinsics with the macro in arm_neon.h. Based on a patch by Gao Yiling. Differential Revision: https://reviews.llvm.org/D53633 llvm-svn: 345344
2018-10-26 07:47:00 +08:00
// On ARMv8.2-A and above, +fp16fml implies +fp16.
// On ARMv8.4-A and above, +fp16 implies +fp16fml.
// RUN: %clang -target aarch64-none-linux-gnueabi -march=armv8.2-a+nofp16fml+fp16 -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=CHECK-FULLFP16-NOFML --check-prefix=CHECK-FULLFP16-VECTOR-SCALAR %s
// RUN: %clang -target aarch64-none-linux-gnueabi -march=armv8.2-a+nofp16+fp16fml -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=CHECK-FULLFP16-FML --check-prefix=CHECK-FULLFP16-VECTOR-SCALAR %s
// RUN: %clang -target aarch64-none-linux-gnueabi -march=armv8.2-a+fp16+nofp16fml -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=CHECK-FULLFP16-NOFML --check-prefix=CHECK-FULLFP16-VECTOR-SCALAR %s
// RUN: %clang -target aarch64-none-linux-gnueabi -march=armv8-a+fp16fml -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=CHECK-FULLFP16-FML --check-prefix=CHECK-FULLFP16-VECTOR-SCALAR %s
// RUN: %clang -target aarch64-none-linux-gnueabi -march=armv8-a+fp16 -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=CHECK-FULLFP16-NOFML --check-prefix=CHECK-FULLFP16-VECTOR-SCALAR %s
// RUN: %clang -target aarch64-none-linux-gnueabi -march=armv8.4-a+nofp16fml+fp16 -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=CHECK-FULLFP16-FML --check-prefix=CHECK-FULLFP16-VECTOR-SCALAR %s
// RUN: %clang -target aarch64-none-linux-gnueabi -march=armv8.4-a+nofp16+fp16fml -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=CHECK-FULLFP16-FML --check-prefix=CHECK-FULLFP16-VECTOR-SCALAR %s
// RUN: %clang -target aarch64-none-linux-gnueabi -march=armv8.4-a+fp16+nofp16fml -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=CHECK-FULLFP16-NOFML --check-prefix=CHECK-FULLFP16-VECTOR-SCALAR %s
// RUN: %clang -target aarch64-none-linux-gnueabi -march=armv8.4-a+fp16fml -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=CHECK-FULLFP16-FML --check-prefix=CHECK-FULLFP16-VECTOR-SCALAR %s
// RUN: %clang -target aarch64-none-linux-gnueabi -march=armv8.4-a+fp16 -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=CHECK-FULLFP16-FML --check-prefix=CHECK-FULLFP16-VECTOR-SCALAR %s
// CHECK-FULLFP16-FML: #define __ARM_FEATURE_FP16FML 1
// CHECK-FULLFP16-NOFML-NOT: #define __ARM_FEATURE_FP16FML 1
[AAch64] Tests for ACLE FP16 macros This adds some missing tests for the AArch64 FP16 macros. Differential Revision: https://reviews.llvm.org/D44512 llvm-svn: 327623
2018-03-15 21:36:30 +08:00
// CHECK-FULLFP16-VECTOR-SCALAR: #define __ARM_FEATURE_FP16_SCALAR_ARITHMETIC 1
// CHECK-FULLFP16-VECTOR-SCALAR: #define __ARM_FEATURE_FP16_VECTOR_ARITHMETIC 1
// CHECK-FULLFP16-VECTOR-SCALAR: #define __ARM_FP 0xE
// CHECK-FULLFP16-VECTOR-SCALAR: #define __ARM_FP16_FORMAT_IEEE 1
[ARM][AArch64] Add feature +fp16fml Armv8.4-A adds a few FP16 instructions that can optionally be implemented in CPUs of Armv8.2-A and above. This patch adds a feature to clang to permit selection of these instructions. This interacts with the +fp16 option as follows: Prior to Armv8.4-A: *) +fp16fml implies +fp16 *) +nofp16 implies +nofp16fml From Armv8.4-A: *) The above conditions apply, additionally: +fp16 implies +fp16fml Patch by Bernard Ogden. Differential Revision: https://reviews.llvm.org/D50229 llvm-svn: 342862
2018-09-24 15:55:20 +08:00
// +fp16fml+nosimd doesn't make sense as the fp16fml instructions all require SIMD.
// However, as +fp16fml implies +fp16 there is a set of defines that we would expect.
// RUN: %clang -target aarch64-none-linux-gnueabi -march=armv8-a+fp16fml+nosimd -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=CHECK-FULLFP16-SCALAR %s
// RUN: %clang -target aarch64-none-linux-gnueabi -march=armv8-a+fp16+nosimd -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=CHECK-FULLFP16-SCALAR %s
// RUN: %clang -target aarch64-none-linux-gnueabi -march=armv8.4-a+fp16fml+nosimd -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=CHECK-FULLFP16-SCALAR %s
// RUN: %clang -target aarch64-none-linux-gnueabi -march=armv8.4-a+fp16+nosimd -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=CHECK-FULLFP16-SCALAR %s
[AArch64] Implement FP16FML intrinsics Generate the FP16FML intrinsics into arm_neon.h (AArch64 only for now). Add two new type modifiers to NeonEmitter to handle the new prototypes. Define __ARM_FEATURE_FP16FML when +fp16fml is enabled and guard the intrinsics with the macro in arm_neon.h. Based on a patch by Gao Yiling. Differential Revision: https://reviews.llvm.org/D53633 llvm-svn: 345344
2018-10-26 07:47:00 +08:00
// CHECK-FULLFP16-SCALAR-NOT: #define __ARM_FEATURE_FP16FML 1
[AAch64] Tests for ACLE FP16 macros This adds some missing tests for the AArch64 FP16 macros. Differential Revision: https://reviews.llvm.org/D44512 llvm-svn: 327623
2018-03-15 21:36:30 +08:00
// CHECK-FULLFP16-SCALAR: #define __ARM_FEATURE_FP16_SCALAR_ARITHMETIC 1
// CHECK-FULLFP16-SCALAR-NOT: #define __ARM_FEATURE_FP16_VECTOR_ARITHMETIC 1
// CHECK-FULLFP16-SCALAR: #define __ARM_FP 0xE
// CHECK-FULLFP16-SCALAR: #define __ARM_FP16_FORMAT_IEEE 1
[ARM][AArch64] Add feature +fp16fml Armv8.4-A adds a few FP16 instructions that can optionally be implemented in CPUs of Armv8.2-A and above. This patch adds a feature to clang to permit selection of these instructions. This interacts with the +fp16 option as follows: Prior to Armv8.4-A: *) +fp16fml implies +fp16 *) +nofp16 implies +nofp16fml From Armv8.4-A: *) The above conditions apply, additionally: +fp16 implies +fp16fml Patch by Bernard Ogden. Differential Revision: https://reviews.llvm.org/D50229 llvm-svn: 342862
2018-09-24 15:55:20 +08:00
// RUN: %clang -target aarch64-none-linux-gnueabi -march=armv8.2-a -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=CHECK-FULLFP16-NOFML-VECTOR-SCALAR %s
// RUN: %clang -target aarch64-none-linux-gnueabi -march=armv8.2-a+nofp16 -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=CHECK-FULLFP16-NOFML-VECTOR-SCALAR %s
// RUN: %clang -target aarch64-none-linux-gnueabi -march=armv8.2-a+nofp16fml -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=CHECK-FULLFP16-NOFML-VECTOR-SCALAR %s
// RUN: %clang -target aarch64-none-linux-gnueabi -march=armv8.2-a+fp16fml+nofp16 -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=CHECK-FULLFP16-NOFML-VECTOR-SCALAR %s
// RUN: %clang -target aarch64-none-linux-gnueabi -march=armv8.4-a -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=CHECK-FULLFP16-NOFML-VECTOR-SCALAR %s
// RUN: %clang -target aarch64-none-linux-gnueabi -march=armv8.4-a+nofp16 -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=CHECK-FULLFP16-NOFML-VECTOR-SCALAR %s
// RUN: %clang -target aarch64-none-linux-gnueabi -march=armv8.4-a+nofp16fml -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=CHECK-FULLFP16-NOFML-VECTOR-SCALAR %s
// RUN: %clang -target aarch64-none-linux-gnueabi -march=armv8.4-a+fp16fml+nofp16 -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=CHECK-FULLFP16-NOFML-VECTOR-SCALAR %s
[AArch64] Implement FP16FML intrinsics Generate the FP16FML intrinsics into arm_neon.h (AArch64 only for now). Add two new type modifiers to NeonEmitter to handle the new prototypes. Define __ARM_FEATURE_FP16FML when +fp16fml is enabled and guard the intrinsics with the macro in arm_neon.h. Based on a patch by Gao Yiling. Differential Revision: https://reviews.llvm.org/D53633 llvm-svn: 345344
2018-10-26 07:47:00 +08:00
// CHECK-FULLFP16-NOFML-VECTOR-SCALAR-NOT: #define __ARM_FEATURE_FP16FML 1
[ARM][AArch64] Add feature +fp16fml Armv8.4-A adds a few FP16 instructions that can optionally be implemented in CPUs of Armv8.2-A and above. This patch adds a feature to clang to permit selection of these instructions. This interacts with the +fp16 option as follows: Prior to Armv8.4-A: *) +fp16fml implies +fp16 *) +nofp16 implies +nofp16fml From Armv8.4-A: *) The above conditions apply, additionally: +fp16 implies +fp16fml Patch by Bernard Ogden. Differential Revision: https://reviews.llvm.org/D50229 llvm-svn: 342862
2018-09-24 15:55:20 +08:00
// CHECK-FULLFP16-NOFML-VECTOR-SCALAR-NOT: #define __ARM_FEATURE_FP16_SCALAR_ARITHMETIC 1
// CHECK-FULLFP16-NOFML-VECTOR-SCALAR-NOT: #define __ARM_FEATURE_FP16_VECTOR_ARITHMETIC 1
[AArch64] Implement FP16FML intrinsics Generate the FP16FML intrinsics into arm_neon.h (AArch64 only for now). Add two new type modifiers to NeonEmitter to handle the new prototypes. Define __ARM_FEATURE_FP16FML when +fp16fml is enabled and guard the intrinsics with the macro in arm_neon.h. Based on a patch by Gao Yiling. Differential Revision: https://reviews.llvm.org/D53633 llvm-svn: 345344
2018-10-26 07:47:00 +08:00
// CHECK-FULLFP16-NOFML-VECTOR-SCALAR: #define __ARM_FP 0xE
// CHECK-FULLFP16-NOFML-VECTOR-SCALAR: #define __ARM_FP16_FORMAT_IEEE 1
[ARM][AArch64] Add feature +fp16fml Armv8.4-A adds a few FP16 instructions that can optionally be implemented in CPUs of Armv8.2-A and above. This patch adds a feature to clang to permit selection of these instructions. This interacts with the +fp16 option as follows: Prior to Armv8.4-A: *) +fp16fml implies +fp16 *) +nofp16 implies +nofp16fml From Armv8.4-A: *) The above conditions apply, additionally: +fp16 implies +fp16fml Patch by Bernard Ogden. Differential Revision: https://reviews.llvm.org/D50229 llvm-svn: 342862
2018-09-24 15:55:20 +08:00
Allow case-insensitive values for -mtune for AArch64 target in line with GCC. GCC allows case-insensitive values for -mcpu, -march and -mtune options. This patch implements the same behaviour for the -mtune option for the AArch64 target. Differential Revision: http://reviews.llvm.org/D10563 llvm-svn: 242663
2015-07-20 19:28:20 +08:00
// ================== Check whether -mtune accepts mixed-case features.
// RUN: %clang -target aarch64 -mtune=CYCLONE -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-MTUNE-CYCLONE %s
[AArch64] Implement Clang CLI interface proposal about "-march". 1. Revert "Add default feature for CPUs on AArch64 target in Clang" at r210625. Then, all enabled feature will by passed explicitly by -target-feature in -cc1 option. 2. Get "-mfpu" deprecated. 3. Implement support of "-march". Usage is: -march=armv8-a+[no]feature For instance, "-march=armv8-a+neon+crc+nocrypto". Here "armv8-a" is necessary, and CPU names are not acceptable. Candidate features are fp, neon, crc and crypto. Where conflicting feature modifiers are specified, the right-most feature is used. 4. Implement support of "-mtune". Usage is: -march=CPU_NAME For instance, "-march=cortex-a57". This option will ONLY get micro-architectural feature enabled specifying to target CPU, like "+zcm" and "+zcz" for cyclone. Any architectural features WON'T be modified. 5. Change usage of "-mcpu" to "-mcpu=CPU_NAME+[no]feature", which is an alias to "-march={feature of CPU_NAME}+[no]feature" and "-mtune=CPU_NAME" together. Where this option is used in conjunction with -march or -mtune, those options take precedence over the appropriate part of this option. llvm-svn: 213353
2014-07-18 15:03:22 +08:00
// CHECK-MTUNE-CYCLONE: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-feature" "+neon" "-target-feature" "+zcm" "-target-feature" "+zcz"
AArch64: add missing Apple CPU names and use them by default. Apple's CPUs are called A7-A13 in official communication, occasionally with weird suffixes which we probably don't need to care about. This adds each one and describes its features. It also switches the default CPU to the canonical name for Cyclone, but leaves legacy support in so that existing bitcode still compiles.
2019-11-15 20:39:56 +08:00
// RUN: %clang -target aarch64 -mcpu=apple-a7 -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-MCPU-APPLE-A7 %s
// RUN: %clang -target aarch64 -mcpu=apple-a8 -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-MCPU-APPLE-A7 %s
// RUN: %clang -target aarch64 -mcpu=apple-a9 -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-MCPU-APPLE-A7 %s
// RUN: %clang -target aarch64 -mcpu=apple-a10 -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-MCPU-APPLE-A10 %s
// RUN: %clang -target aarch64 -mcpu=apple-a11 -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-MCPU-APPLE-A11 %s
// RUN: %clang -target aarch64 -mcpu=apple-a12 -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-MCPU-APPLE-A12 %s
// RUN: %clang -target aarch64 -mcpu=apple-a13 -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-MCPU-APPLE-A13 %s
// RUN: %clang -target aarch64 -mcpu=apple-s4 -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-MCPU-APPLE-A12 %s
// RUN: %clang -target aarch64 -mcpu=apple-s5 -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-MCPU-APPLE-A12 %s
// RUN: %clang -target aarch64 -mcpu=cyclone -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-MCPU-APPLE-A7 %s
[AArch64] Add Cortex-A34 Support for clang and llvm This patch upstreams support for the AArch64 Armv8-A cpu Cortex-A34. In detail adding support for: - mcpu option in clang - AArch64 Target Features in clang - llvm AArch64 TargetParser definitions details of the cpu can be found here: https://developer.arm.com/ip-products/processors/cortex-a/cortex-a34 Reviewers: SjoerdMeijer Reviewed By: SjoerdMeijer Subscribers: SjoerdMeijer, kristof.beyls, hiraditya, cfe-commits, llvm-commits Tags: #clang, #llvm Differential Revision: https://reviews.llvm.org/D74483 Change-Id: Ida101fc544ca183a0a0e61a1277c8957855fde0b
2020-02-12 00:57:25 +08:00
// RUN: %clang -target aarch64 -mcpu=cortex-a34 -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-MCPU-A34 %s
Teaches clang about Cortex-A35. Adds support for the new Cortex-A35 ARMv8-A core. Differential Revision: http://reviews.llvm.org/D15142 llvm-svn: 254505
2015-12-02 20:03:42 +08:00
// RUN: %clang -target aarch64 -mcpu=cortex-a35 -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-MCPU-A35 %s
[AArch64] Implement Clang CLI interface proposal about "-march". 1. Revert "Add default feature for CPUs on AArch64 target in Clang" at r210625. Then, all enabled feature will by passed explicitly by -target-feature in -cc1 option. 2. Get "-mfpu" deprecated. 3. Implement support of "-march". Usage is: -march=armv8-a+[no]feature For instance, "-march=armv8-a+neon+crc+nocrypto". Here "armv8-a" is necessary, and CPU names are not acceptable. Candidate features are fp, neon, crc and crypto. Where conflicting feature modifiers are specified, the right-most feature is used. 4. Implement support of "-mtune". Usage is: -march=CPU_NAME For instance, "-march=cortex-a57". This option will ONLY get micro-architectural feature enabled specifying to target CPU, like "+zcm" and "+zcz" for cyclone. Any architectural features WON'T be modified. 5. Change usage of "-mcpu" to "-mcpu=CPU_NAME+[no]feature", which is an alias to "-march={feature of CPU_NAME}+[no]feature" and "-mtune=CPU_NAME" together. Where this option is used in conjunction with -march or -mtune, those options take precedence over the appropriate part of this option. llvm-svn: 213353
2014-07-18 15:03:22 +08:00
// RUN: %clang -target aarch64 -mcpu=cortex-a53 -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-MCPU-A53 %s
// RUN: %clang -target aarch64 -mcpu=cortex-a57 -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-MCPU-A57 %s
Teaches the Clang driver to accept Cortex-A72 A previous commit added Cortex-A72 to LLVM, this teaches Clang to accept it as well. Patch by Ranjeet Singh. llvm-svn: 228141
2015-02-04 21:31:56 +08:00
// RUN: %clang -target aarch64 -mcpu=cortex-a72 -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-MCPU-A72 %s
This adds target support and tests for Cortex-A73 Differential Revision: http://reviews.llvm.org/D20864 llvm-svn: 271507
2016-06-02 18:48:37 +08:00
// RUN: %clang -target aarch64 -mcpu=cortex-a73 -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-MCPU-CORTEX-A73 %s
Add support for Samsung Exynos M3 (NFC) llvm-svn: 289614
2016-12-14 07:31:57 +08:00
// RUN: %clang -target aarch64 -mcpu=exynos-m3 -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-MCPU-M1 %s
[test] Update support for Exynos M4 (NFC) Update test cases for Exynos M4. llvm-svn: 350954
2019-01-12 02:54:41 +08:00
// RUN: %clang -target aarch64 -mcpu=exynos-m4 -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-MCPU-M4 %s
[clang] Add support for Exynos M5 (NFC) Add Exynos M5 test cases. llvm-svn: 356794
2019-03-23 02:44:09 +08:00
// RUN: %clang -target aarch64 -mcpu=exynos-m5 -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-MCPU-M4 %s
[Driver] Add support for Qualcomm's Kryo CPU. http://reviews.llvm.org/D17124 llvm-svn: 260555
2016-02-12 02:09:31 +08:00
// RUN: %clang -target aarch64 -mcpu=kryo -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-MCPU-KRYO %s
[AArch64] Vulcan is now ThunderXT99 Broadcom Vulcan is now Cavium ThunderX2T99. LLVM Bugzilla: http://bugs.llvm.org/show_bug.cgi?id=32113 Corresponding LLVM change: https://reviews.llvm.org/rL297190 Changes to clang to support the change. Patch by Joel Jones llvm-svn: 297227
2017-03-08 05:24:53 +08:00
// RUN: %clang -target aarch64 -mcpu=thunderx2t99 -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-MCPU-THUNDERX2T99 %s
[AArch64] Add support for Fujitsu A64FX A64FX is an Armv8.2-A CPU used in FUJITSU Supercomputer PRIMEHPC FX1000, PRIMEHPC FX700, and supercomputer Fugaku. https://www.fujitsu.com/global/products/computing/servers/supercomputer/specifications/ Differential Revision: https://reviews.llvm.org/D75594
2020-03-03 20:52:27 +08:00
// RUN: %clang -target aarch64 -mcpu=a64fx -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-MCPU-A64FX %s
AArch64: add missing Apple CPU names and use them by default. Apple's CPUs are called A7-A13 in official communication, occasionally with weird suffixes which we probably don't need to care about. This adds each one and describes its features. It also switches the default CPU to the canonical name for Cyclone, but leaves legacy support in so that existing bitcode still compiles.
2019-11-15 20:39:56 +08:00
// CHECK-MCPU-APPLE-A7: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-feature" "+fp-armv8" "-target-feature" "+neon" "-target-feature" "+crypto" "-target-feature" "+zcm" "-target-feature" "+zcz" "-target-feature" "+sha2" "-target-feature" "+aes"
// CHECK-MCPU-APPLE-A10: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-feature" "+fp-armv8" "-target-feature" "+neon" "-target-feature" "+crc" "-target-feature" "+crypto" "-target-feature" "+rdm" "-target-feature" "+zcm" "-target-feature" "+zcz" "-target-feature" "+sha2" "-target-feature" "+aes"
// CHECK-MCPU-APPLE-A11: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-feature" "+v8.2a" "-target-feature" "+fp-armv8" "-target-feature" "+neon" "-target-feature" "+crc" "-target-feature" "+crypto" "-target-feature" "+ras" "-target-feature" "+lse" "-target-feature" "+rdm" "-target-feature" "+zcm" "-target-feature" "+zcz" "-target-feature" "+sha2" "-target-feature" "+aes"
// CHECK-MCPU-APPLE-A12: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-feature" "+v8.3a" "-target-feature" "+fp-armv8" "-target-feature" "+neon" "-target-feature" "+crc" "-target-feature" "+crypto" "-target-feature" "+fullfp16" "-target-feature" "+ras" "-target-feature" "+lse" "-target-feature" "+rdm" "-target-feature" "+rcpc" "-target-feature" "+zcm" "-target-feature" "+zcz" "-target-feature" "+sha2" "-target-feature" "+aes"
[AArch64] Add Cortex-A34 Support for clang and llvm This patch upstreams support for the AArch64 Armv8-A cpu Cortex-A34. In detail adding support for: - mcpu option in clang - AArch64 Target Features in clang - llvm AArch64 TargetParser definitions details of the cpu can be found here: https://developer.arm.com/ip-products/processors/cortex-a/cortex-a34 Reviewers: SjoerdMeijer Reviewed By: SjoerdMeijer Subscribers: SjoerdMeijer, kristof.beyls, hiraditya, cfe-commits, llvm-commits Tags: #clang, #llvm Differential Revision: https://reviews.llvm.org/D74483 Change-Id: Ida101fc544ca183a0a0e61a1277c8957855fde0b
2020-02-12 00:57:25 +08:00
// CHECK-MCPU-A34: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-feature" "+neon" "-target-feature" "+crc"
AArch64: add missing Apple CPU names and use them by default. Apple's CPUs are called A7-A13 in official communication, occasionally with weird suffixes which we probably don't need to care about. This adds each one and describes its features. It also switches the default CPU to the canonical name for Cyclone, but leaves legacy support in so that existing bitcode still compiles.
2019-11-15 20:39:56 +08:00
// CHECK-MCPU-APPLE-A13: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-feature" "+v8.4a" "-target-feature" "+fp-armv8" "-target-feature" "+neon" "-target-feature" "+crc" "-target-feature" "+crypto" "-target-feature" "+dotprod" "-target-feature" "+fullfp16" "-target-feature" "+ras" "-target-feature" "+lse" "-target-feature" "+rdm" "-target-feature" "+rcpc" "-target-feature" "+zcm" "-target-feature" "+zcz" "-target-feature" "+fp16fml" "-target-feature" "+sm4" "-target-feature" "+sha3" "-target-feature" "+sha2" "-target-feature" "+aes"
Teaches clang about Cortex-A35. Adds support for the new Cortex-A35 ARMv8-A core. Differential Revision: http://reviews.llvm.org/D15142 llvm-svn: 254505
2015-12-02 20:03:42 +08:00
// CHECK-MCPU-A35: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-feature" "+neon" "-target-feature" "+crc" "-target-feature" "+crypto"
[AArch64] Implement Clang CLI interface proposal about "-march". 1. Revert "Add default feature for CPUs on AArch64 target in Clang" at r210625. Then, all enabled feature will by passed explicitly by -target-feature in -cc1 option. 2. Get "-mfpu" deprecated. 3. Implement support of "-march". Usage is: -march=armv8-a+[no]feature For instance, "-march=armv8-a+neon+crc+nocrypto". Here "armv8-a" is necessary, and CPU names are not acceptable. Candidate features are fp, neon, crc and crypto. Where conflicting feature modifiers are specified, the right-most feature is used. 4. Implement support of "-mtune". Usage is: -march=CPU_NAME For instance, "-march=cortex-a57". This option will ONLY get micro-architectural feature enabled specifying to target CPU, like "+zcm" and "+zcz" for cyclone. Any architectural features WON'T be modified. 5. Change usage of "-mcpu" to "-mcpu=CPU_NAME+[no]feature", which is an alias to "-march={feature of CPU_NAME}+[no]feature" and "-mtune=CPU_NAME" together. Where this option is used in conjunction with -march or -mtune, those options take precedence over the appropriate part of this option. llvm-svn: 213353
2014-07-18 15:03:22 +08:00
// CHECK-MCPU-A53: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-feature" "+neon" "-target-feature" "+crc" "-target-feature" "+crypto"
// CHECK-MCPU-A57: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-feature" "+neon" "-target-feature" "+crc" "-target-feature" "+crypto"
Teaches the Clang driver to accept Cortex-A72 A previous commit added Cortex-A72 to LLVM, this teaches Clang to accept it as well. Patch by Ranjeet Singh. llvm-svn: 228141
2015-02-04 21:31:56 +08:00
// CHECK-MCPU-A72: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-feature" "+neon" "-target-feature" "+crc" "-target-feature" "+crypto"
This adds target support and tests for Cortex-A73 Differential Revision: http://reviews.llvm.org/D20864 llvm-svn: 271507
2016-06-02 18:48:37 +08:00
// CHECK-MCPU-CORTEX-A73: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-feature" "+neon" "-target-feature" "+crc" "-target-feature" "+crypto"
[AArch64] Teaches clang about Samsung Exynos-M1 Adds core tuning support for new Samsung Exynos-M1 core (ARMv8-A). Differential Revision: http://reviews.llvm.org/D15664 llvm-svn: 256829
2016-01-05 20:53:24 +08:00
// CHECK-MCPU-M1: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-feature" "+neon" "-target-feature" "+crc" "-target-feature" "+crypto"
[test] Update support for Exynos M4 (NFC) Update test cases for Exynos M4. llvm-svn: 350954
2019-01-12 02:54:41 +08:00
// CHECK-MCPU-M4: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-feature" "+neon" "-target-feature" "+crc" "-target-feature" "+crypto" "-target-feature" "+dotprod" "-target-feature" "+fullfp16"
[Driver] Add support for Qualcomm's Kryo CPU. http://reviews.llvm.org/D17124 llvm-svn: 260555
2016-02-12 02:09:31 +08:00
// CHECK-MCPU-KRYO: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-feature" "+neon" "-target-feature" "+crc" "-target-feature" "+crypto"
[AArch64] Vulcan is now ThunderXT99 Broadcom Vulcan is now Cavium ThunderX2T99. LLVM Bugzilla: http://bugs.llvm.org/show_bug.cgi?id=32113 Corresponding LLVM change: https://reviews.llvm.org/rL297190 Changes to clang to support the change. Patch by Joel Jones llvm-svn: 297227
2017-03-08 05:24:53 +08:00
// CHECK-MCPU-THUNDERX2T99: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-feature" "+neon" "-target-feature" "+crc" "-target-feature" "+crypto"
[AArch64] Add support for Fujitsu A64FX A64FX is an Armv8.2-A CPU used in FUJITSU Supercomputer PRIMEHPC FX1000, PRIMEHPC FX700, and supercomputer Fugaku. https://www.fujitsu.com/global/products/computing/servers/supercomputer/specifications/ Differential Revision: https://reviews.llvm.org/D75594
2020-03-03 20:52:27 +08:00
// CHECK-MCPU-A64FX: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-feature" "+v8.2a" "-target-feature" "+fp-armv8" "-target-feature" "+neon" "-target-feature" "+crc" "-target-feature" "+crypto" "-target-feature" "+fullfp16" "-target-feature" "+ras" "-target-feature" "+lse" "-target-feature" "+rdm" "-target-feature" "+sve" "-target-feature" "+sha2"
[AArch64] Implement Clang CLI interface proposal about "-march". 1. Revert "Add default feature for CPUs on AArch64 target in Clang" at r210625. Then, all enabled feature will by passed explicitly by -target-feature in -cc1 option. 2. Get "-mfpu" deprecated. 3. Implement support of "-march". Usage is: -march=armv8-a+[no]feature For instance, "-march=armv8-a+neon+crc+nocrypto". Here "armv8-a" is necessary, and CPU names are not acceptable. Candidate features are fp, neon, crc and crypto. Where conflicting feature modifiers are specified, the right-most feature is used. 4. Implement support of "-mtune". Usage is: -march=CPU_NAME For instance, "-march=cortex-a57". This option will ONLY get micro-architectural feature enabled specifying to target CPU, like "+zcm" and "+zcz" for cyclone. Any architectural features WON'T be modified. 5. Change usage of "-mcpu" to "-mcpu=CPU_NAME+[no]feature", which is an alias to "-march={feature of CPU_NAME}+[no]feature" and "-mtune=CPU_NAME" together. Where this option is used in conjunction with -march or -mtune, those options take precedence over the appropriate part of this option. llvm-svn: 213353
2014-07-18 15:03:22 +08:00
AArch64: set all processor features from -arch if nothing else present Darwin's "-arch arm64" option implies full Cyclone CPU, for both architectural and tuning purposes. So if neither of the explicit options have been given, forward that on to the proper invocation. rdar://problem/18906227 llvm-svn: 221631
2014-11-11 05:17:23 +08:00
// RUN: %clang -target x86_64-apple-macosx -arch arm64 -### -c %s 2>&1 | FileCheck --check-prefix=CHECK-ARCH-ARM64 %s
AArch64: add missing Apple CPU names and use them by default. Apple's CPUs are called A7-A13 in official communication, occasionally with weird suffixes which we probably don't need to care about. This adds each one and describes its features. It also switches the default CPU to the canonical name for Cyclone, but leaves legacy support in so that existing bitcode still compiles.
2019-11-15 20:39:56 +08:00
// CHECK-ARCH-ARM64: "-target-cpu" "apple-a7" "-target-feature" "+fp-armv8" "-target-feature" "+neon" "-target-feature" "+crypto" "-target-feature" "+zcm" "-target-feature" "+zcz"
AArch64: set all processor features from -arch if nothing else present Darwin's "-arch arm64" option implies full Cyclone CPU, for both architectural and tuning purposes. So if neither of the explicit options have been given, forward that on to the proper invocation. rdar://problem/18906227 llvm-svn: 221631
2014-11-11 05:17:23 +08:00
AArch64: add arm64_32 support to Clang.
2018-09-18 17:34:39 +08:00
// RUN: %clang -target x86_64-apple-macosx -arch arm64_32 -### -c %s 2>&1 | FileCheck --check-prefix=CHECK-ARCH-ARM64_32 %s
AArch64: add missing Apple CPU names and use them by default. Apple's CPUs are called A7-A13 in official communication, occasionally with weird suffixes which we probably don't need to care about. This adds each one and describes its features. It also switches the default CPU to the canonical name for Cyclone, but leaves legacy support in so that existing bitcode still compiles.
2019-11-15 20:39:56 +08:00
// CHECK-ARCH-ARM64_32: "-target-cpu" "apple-s4" "-target-feature" "+v8.3a" "-target-feature" "+fp-armv8" "-target-feature" "+neon" "-target-feature" "+crc" "-target-feature" "+crypto" "-target-feature" "+fullfp16" "-target-feature" "+ras" "-target-feature" "+lse" "-target-feature" "+rdm" "-target-feature" "+rcpc" "-target-feature" "+zcm" "-target-feature" "+zcz" "-target-feature" "+sha2" "-target-feature" "+aes"
AArch64: add arm64_32 support to Clang.
2018-09-18 17:34:39 +08:00
[AArch64] Implement Clang CLI interface proposal about "-march". 1. Revert "Add default feature for CPUs on AArch64 target in Clang" at r210625. Then, all enabled feature will by passed explicitly by -target-feature in -cc1 option. 2. Get "-mfpu" deprecated. 3. Implement support of "-march". Usage is: -march=armv8-a+[no]feature For instance, "-march=armv8-a+neon+crc+nocrypto". Here "armv8-a" is necessary, and CPU names are not acceptable. Candidate features are fp, neon, crc and crypto. Where conflicting feature modifiers are specified, the right-most feature is used. 4. Implement support of "-mtune". Usage is: -march=CPU_NAME For instance, "-march=cortex-a57". This option will ONLY get micro-architectural feature enabled specifying to target CPU, like "+zcm" and "+zcz" for cyclone. Any architectural features WON'T be modified. 5. Change usage of "-mcpu" to "-mcpu=CPU_NAME+[no]feature", which is an alias to "-march={feature of CPU_NAME}+[no]feature" and "-mtune=CPU_NAME" together. Where this option is used in conjunction with -march or -mtune, those options take precedence over the appropriate part of this option. llvm-svn: 213353
2014-07-18 15:03:22 +08:00
// RUN: %clang -target aarch64 -march=armv8-a+fp+simd+crc+crypto -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-MARCH-1 %s
// RUN: %clang -target aarch64 -march=armv8-a+nofp+nosimd+nocrc+nocrypto+fp+simd+crc+crypto -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-MARCH-1 %s
// RUN: %clang -target aarch64 -march=armv8-a+nofp+nosimd+nocrc+nocrypto -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-MARCH-2 %s
// RUN: %clang -target aarch64 -march=armv8-a+fp+simd+crc+crypto+nofp+nosimd+nocrc+nocrypto -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-MARCH-2 %s
// RUN: %clang -target aarch64 -march=armv8-a+nosimd -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-MARCH-3 %s
// CHECK-MARCH-1: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-feature" "+fp-armv8" "-target-feature" "+neon" "-target-feature" "+crc" "-target-feature" "+crypto"
// CHECK-MARCH-2: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-feature" "-fp-armv8" "-target-feature" "-neon" "-target-feature" "-crc" "-target-feature" "-crypto"
// CHECK-MARCH-3: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-feature" "-neon"
[AArch64][ARM] Context sensitive meaning of crypto For AArch64, crypto means: - sm4 + sha3 + sha2 + aes for Armv8.4-A and up, and - sha2 + aes for Armv8.3-A and earlier. For AArch32: Crypto means sha2 + aes, because the Armv8.2-A crypto instructions were added to AArch64 only. Differential Revision: https://reviews.llvm.org/D50179 llvm-svn: 343758
2018-10-04 15:38:53 +08:00
// Check +sm4:
//
// RUN: %clang -target aarch64 -march=armv8.2a+sm4 -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-SM4 %s
// CHECK-SM4: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-feature" "+v8.2a" "-target-feature" "+sm4"
//
// Check +sha3:
//
// RUN: %clang -target aarch64 -march=armv8.2a+sha3 -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-SHA3 %s
// CHECK-SHA3: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-feature" "+v8.2a" "-target-feature" "+sha3"
//
// Check +sha2:
//
// RUN: %clang -target aarch64 -march=armv8.3a+sha2 -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-SHA2 %s
// CHECK-SHA2: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-feature" "+v8.{{.}}a" "-target-feature" "+sha2"
//
// Check +aes:
//
// RUN: %clang -target aarch64 -march=armv8.3a+aes -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-AES %s
// CHECK-AES: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-feature" "+v8.{{.}}a" "-target-feature" "+aes"
//
// Check -sm4:
//
// RUN: %clang -target aarch64 -march=armv8.2a+noSM4 -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-NO-SM4 %s
// CHECK-NO-SM4: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-feature" "+v8.2a" "-target-feature" "-sm4"
//
// Check -sha3:
//
// RUN: %clang -target aarch64 -march=armv8.2a+noSHA3 -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-NO-SHA3 %s
// CHECK-NO-SHA3: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-feature" "+v8.2a" "-target-feature" "-sha3"
//
// Check -sha2:
//
// RUN: %clang -target aarch64 -march=armv8.2a+noSHA2 -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-NO-SHA2 %s
// CHECK-NO-SHA2: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-feature" "+v8.2a" "-target-feature" "-sha2"
//
// Check -aes:
//
// RUN: %clang -target aarch64 -march=armv8.2a+noAES -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-NO-AES %s
// CHECK-NO-AES: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-feature" "+v8.2a" "-target-feature" "-aes"
//
//
// Arch <= ARMv8.3: crypto = sha2 + aes
// -------------------------------------
//
// Check +crypto:
//
// RUN: %clang -target aarch64 -march=armv8a+crypto -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-CRYPTO83 %s
// RUN: %clang -target aarch64 -march=armv8.1a+crypto -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-CRYPTO83 %s
// RUN: %clang -target aarch64 -march=armv8.2a+crypto -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-CRYPTO83 %s
// RUN: %clang -target aarch64 -march=armv8.3a+crypto -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-CRYPTO83 %s
// RUN: %clang -target aarch64 -march=armv8a+crypto+nocrypto+crypto -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-CRYPTO83 %s
// CHECK-CRYPTO83: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-feature" "+crypto" "-target-feature" "+sha2" "-target-feature" "+aes"
//
// Check -crypto:
//
// RUN: %clang -target aarch64 -march=armv8a+nocrypto -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-NOCRYPTO8A %s
// RUN: %clang -target aarch64 -march=armv8.1a+nocrypto -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-NOCRYPTO81 %s
// RUN: %clang -target aarch64 -march=armv8.2a+nocrypto -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-NOCRYPTO82 %s
// RUN: %clang -target aarch64 -march=armv8.3a+nocrypto -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-NOCRYPTO82 %s
// RUN: %clang -target aarch64 -march=armv8.3a+nocrypto+crypto+nocrypto -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-NOCRYPTO82 %s
// CHECK-NOCRYPTO8A: "-target-feature" "+neon" "-target-feature" "-crypto" "-target-feature" "-sha2" "-target-feature" "-aes" "-target-abi" "aapcs"
// CHECK-NOCRYPTO81: "-target-feature" "+neon" "-target-feature" "+v8.1a" "-target-feature" "-crypto" "-target-feature" "-sha2" "-target-feature" "-aes" "-target-abi" "aapcs"
// CHECK-NOCRYPTO82: "-target-feature" "+neon" "-target-feature" "+v8.{{.}}a" "-target-feature" "-crypto" "-target-feature" "-sha2" "-target-feature" "-aes" "-target-feature" "-sm4" "-target-feature" "-sha3" "-target-abi" "aapcs"
//
// Check +crypto -sha2 -aes:
//
// RUN: %clang -target aarch64 -march=armv8.1a+crypto+nosha2+noaes -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-CRYPTO83-NOSHA2-NOAES %s
// CHECK-CRYPTO83-NOSHA2-NOAES-NOT: "-target-feature" "+sha2" "-target-feature" "+aes"
//
// Check -crypto +sha2 +aes:
//
// RUN: %clang -target aarch64 -march=armv8.1a+nocrypto+sha2+aes -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-NOCRYPTO83-SHA2-AES %s
// CHECK-NOCRYPTO83-SHA2-AES: "-target-feature" "+sha2" "-target-feature" "+aes"
//
//
// Arch >= ARMv8.4: crypto = sm4 + sha3 + sha2 + aes
// --------------------------------------------------
//
// Check +crypto:
//
// RUN: %clang -target aarch64 -march=armv8.4a+crypto -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-CRYPTO84 %s
// CHECK-CRYPTO84: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-feature" "+v8.4a" "-target-feature" "+crypto" "-target-feature" "+sm4" "-target-feature" "+sha3" "-target-feature" "+sha2" "-target-feature" "+aes"
//
// Check -crypto:
//
// RUN: %clang -target aarch64 -march=armv8.4a+nocrypto -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-NOCRYPTO84 %s
// CHECK-NOCRYPTO84-NOT: "-target-feature" "+crypto" "-target-feature" "+sm4" "-target-feature" "+sha3" "-target-feature" "+sha2" "-target-feature" "+aes"
//
// Check +crypto -sm4 -sha3:
//
// RUN: %clang -target aarch64 -march=armv8.4a+crypto+sm4+nosm4+sha3+nosha3 -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-CRYPTO84-NOSMSHA %s
// CHECK-CRYPTO84-NOSMSHA: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-feature" "+v8.4a" "-target-feature" "+crypto" "-target-feature" "-sm4" "-target-feature" "-sha3" "-target-feature" "+sha2" "-target-feature" "+aes"
//
//
[AArch64] Implement Clang CLI interface proposal about "-march". 1. Revert "Add default feature for CPUs on AArch64 target in Clang" at r210625. Then, all enabled feature will by passed explicitly by -target-feature in -cc1 option. 2. Get "-mfpu" deprecated. 3. Implement support of "-march". Usage is: -march=armv8-a+[no]feature For instance, "-march=armv8-a+neon+crc+nocrypto". Here "armv8-a" is necessary, and CPU names are not acceptable. Candidate features are fp, neon, crc and crypto. Where conflicting feature modifiers are specified, the right-most feature is used. 4. Implement support of "-mtune". Usage is: -march=CPU_NAME For instance, "-march=cortex-a57". This option will ONLY get micro-architectural feature enabled specifying to target CPU, like "+zcm" and "+zcz" for cyclone. Any architectural features WON'T be modified. 5. Change usage of "-mcpu" to "-mcpu=CPU_NAME+[no]feature", which is an alias to "-march={feature of CPU_NAME}+[no]feature" and "-mtune=CPU_NAME" together. Where this option is used in conjunction with -march or -mtune, those options take precedence over the appropriate part of this option. llvm-svn: 213353
2014-07-18 15:03:22 +08:00
// RUN: %clang -target aarch64 -mcpu=cyclone+nocrypto -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-MCPU-1 %s
// RUN: %clang -target aarch64 -mcpu=cyclone+crypto+nocrypto -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-MCPU-1 %s
// RUN: %clang -target aarch64 -mcpu=generic+crc -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-MCPU-2 %s
// RUN: %clang -target aarch64 -mcpu=generic+nocrc+crc -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-MCPU-2 %s
// RUN: %clang -target aarch64 -mcpu=cortex-a53+nosimd -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-MCPU-3 %s
Allow case-insensitive values for -mcpu for AArch64 target in line with GCC. GCC allows case-insensitive values for -mcpu, -march and -mtune options. This patch implements the same behaviour for the -mcpu option for the AArch64 target. llvm-svn: 239619
2015-06-13 01:33:37 +08:00
// ================== Check whether -mcpu accepts mixed-case features.
// RUN: %clang -target aarch64 -mcpu=cyclone+NOCRYPTO -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-MCPU-1 %s
// RUN: %clang -target aarch64 -mcpu=cyclone+CRYPTO+nocrypto -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-MCPU-1 %s
// RUN: %clang -target aarch64 -mcpu=generic+Crc -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-MCPU-2 %s
// RUN: %clang -target aarch64 -mcpu=GENERIC+nocrc+CRC -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-MCPU-2 %s
// RUN: %clang -target aarch64 -mcpu=cortex-a53+noSIMD -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-MCPU-3 %s
AArch64: fix Cyclone CPU features list. It turns out we don't have CRC after all. Who knew? llvm-svn: 261758
2016-02-25 01:57:48 +08:00
// CHECK-MCPU-1: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-feature" "+neon" "-target-feature" "-crypto" "-target-feature" "+zcm" "-target-feature" "+zcz"
[AArch64] Implement Clang CLI interface proposal about "-march". 1. Revert "Add default feature for CPUs on AArch64 target in Clang" at r210625. Then, all enabled feature will by passed explicitly by -target-feature in -cc1 option. 2. Get "-mfpu" deprecated. 3. Implement support of "-march". Usage is: -march=armv8-a+[no]feature For instance, "-march=armv8-a+neon+crc+nocrypto". Here "armv8-a" is necessary, and CPU names are not acceptable. Candidate features are fp, neon, crc and crypto. Where conflicting feature modifiers are specified, the right-most feature is used. 4. Implement support of "-mtune". Usage is: -march=CPU_NAME For instance, "-march=cortex-a57". This option will ONLY get micro-architectural feature enabled specifying to target CPU, like "+zcm" and "+zcz" for cyclone. Any architectural features WON'T be modified. 5. Change usage of "-mcpu" to "-mcpu=CPU_NAME+[no]feature", which is an alias to "-march={feature of CPU_NAME}+[no]feature" and "-mtune=CPU_NAME" together. Where this option is used in conjunction with -march or -mtune, those options take precedence over the appropriate part of this option. llvm-svn: 213353
2014-07-18 15:03:22 +08:00
// CHECK-MCPU-2: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-feature" "+neon" "-target-feature" "+crc"
// CHECK-MCPU-3: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-feature" "-neon"
// RUN: %clang -target aarch64 -mcpu=cyclone+nocrc+nocrypto -march=armv8-a -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-MCPU-MARCH %s
// RUN: %clang -target aarch64 -march=armv8-a -mcpu=cyclone+nocrc+nocrypto -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-MCPU-MARCH %s
// CHECK-MCPU-MARCH: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-feature" "+neon" "-target-feature" "+zcm" "-target-feature" "+zcz"
// RUN: %clang -target aarch64 -mcpu=cortex-a53 -mtune=cyclone -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-MCPU-MTUNE %s
// RUN: %clang -target aarch64 -mtune=cyclone -mcpu=cortex-a53 -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-MCPU-MTUNE %s
Allow case-insensitive values for -mtune for AArch64 target in line with GCC. GCC allows case-insensitive values for -mcpu, -march and -mtune options. This patch implements the same behaviour for the -mtune option for the AArch64 target. Differential Revision: http://reviews.llvm.org/D10563 llvm-svn: 242663
2015-07-20 19:28:20 +08:00
// ================== Check whether -mtune accepts mixed-case features.
// RUN: %clang -target aarch64 -mcpu=cortex-a53 -mtune=CYCLONE -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-MCPU-MTUNE %s
// RUN: %clang -target aarch64 -mtune=CyclonE -mcpu=cortex-a53 -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-MCPU-MTUNE %s
[AArch64] Implement Clang CLI interface proposal about "-march". 1. Revert "Add default feature for CPUs on AArch64 target in Clang" at r210625. Then, all enabled feature will by passed explicitly by -target-feature in -cc1 option. 2. Get "-mfpu" deprecated. 3. Implement support of "-march". Usage is: -march=armv8-a+[no]feature For instance, "-march=armv8-a+neon+crc+nocrypto". Here "armv8-a" is necessary, and CPU names are not acceptable. Candidate features are fp, neon, crc and crypto. Where conflicting feature modifiers are specified, the right-most feature is used. 4. Implement support of "-mtune". Usage is: -march=CPU_NAME For instance, "-march=cortex-a57". This option will ONLY get micro-architectural feature enabled specifying to target CPU, like "+zcm" and "+zcz" for cyclone. Any architectural features WON'T be modified. 5. Change usage of "-mcpu" to "-mcpu=CPU_NAME+[no]feature", which is an alias to "-march={feature of CPU_NAME}+[no]feature" and "-mtune=CPU_NAME" together. Where this option is used in conjunction with -march or -mtune, those options take precedence over the appropriate part of this option. llvm-svn: 213353
2014-07-18 15:03:22 +08:00
// CHECK-MCPU-MTUNE: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-feature" "+neon" "-target-feature" "+crc" "-target-feature" "+crypto" "-target-feature" "+zcm" "-target-feature" "+zcz"
// RUN: %clang -target aarch64 -mcpu=generic+neon -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-ERROR-NEON %s
// RUN: %clang -target aarch64 -mcpu=generic+noneon -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-ERROR-NEON %s
// RUN: %clang -target aarch64 -march=armv8-a+neon -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-ERROR-NEON %s
// RUN: %clang -target aarch64 -march=armv8-a+noneon -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-ERROR-NEON %s
// CHECK-ERROR-NEON: error: [no]neon is not accepted as modifier, please use [no]simd instead
[AArch64] Add v8.1a architecture Add support for AArch64 v8.1 architecture. Briefly it is described on http://community.arm.com/groups/processors/blog/2014/12/02/the-armv8-a-architecture-and-its-ongoing-development Reviewers: jmolloy Subscribers: cfe-commits Differential Revision: http://reviews.llvm.org/D8493 llvm-svn: 235110
2015-04-16 23:53:09 +08:00
// RUN: %clang -target aarch64 -march=armv8.1a+crypto -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-V81A-FEATURE-1 %s
// RUN: %clang -target aarch64 -march=armv8.1a+nocrypto -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-V81A-FEATURE-2 %s
// RUN: %clang -target aarch64 -march=armv8.1a+nosimd -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-V81A-FEATURE-3 %s
Allow case-insensitive values for -march for AArch64 target in line with GCC. GCC allows case-insensitive values for -mcpu, -march and -mtune options. This patch implements the same behaviour for the -march option for the AArch64 target. llvm-svn: 240019
2015-06-18 22:23:12 +08:00
// ================== Check whether -march accepts mixed-case features.
// RUN: %clang -target aarch64 -march=ARMV8.1A+CRYPTO -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-V81A-FEATURE-1 %s
// RUN: %clang -target aarch64 -march=Armv8.1a+NOcrypto -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-V81A-FEATURE-2 %s
// RUN: %clang -target aarch64 -march=armv8.1a+noSIMD -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-V81A-FEATURE-3 %s
[AArch64] Add v8.1a architecture Add support for AArch64 v8.1 architecture. Briefly it is described on http://community.arm.com/groups/processors/blog/2014/12/02/the-armv8-a-architecture-and-its-ongoing-development Reviewers: jmolloy Subscribers: cfe-commits Differential Revision: http://reviews.llvm.org/D8493 llvm-svn: 235110
2015-04-16 23:53:09 +08:00
// CHECK-V81A-FEATURE-1: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-feature" "+neon" "-target-feature" "+v8.1a" "-target-feature" "+crypto"
// CHECK-V81A-FEATURE-2: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-feature" "+neon" "-target-feature" "+v8.1a" "-target-feature" "-crypto"
// CHECK-V81A-FEATURE-3: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-feature" "+v8.1a" "-target-feature" "-neon"
[AArch64] Add support for MTE intrinsics This provides intrinsics support for Memory Tagging Extension (MTE), which was introduced with the Armv8.5-a architecture. These intrinsics are available when __ARM_FEATURE_MEMORY_TAGGING is defined. Each intrinsic is described in detail in the ACLE Q1 2019 documentation: https://developer.arm.com/docs/101028/latest Reviewed By: Tim Nortover, David Spickett Differential Revision: https://reviews.llvm.org/D60485 llvm-svn: 359348
2019-04-27 05:08:11 +08:00
// ================== Check Memory Tagging Extensions (MTE).
// RUN: %clang -target arm64-none-linux-gnu -march=armv8.5-a+memtag -x c -E -dM %s -o - 2>&1 | FileCheck -check-prefix=CHECK-MEMTAG %s
// CHECK-MEMTAG: __ARM_FEATURE_MEMORY_TAGGING 1
[clang][AARCH64] Add __ARM_FEATURE_{PAC, BTI}_DEFAULT defines Summary: As defined by Arm C Language Extensions (ACLE) these macro defines should be set to specific values depending on -mbranch-protection. Reviewers: chill Reviewed By: chill Subscribers: danielkiss, cfe-commits, kristof.beyls Tags: #clang Differential Revision: https://reviews.llvm.org/D77134
2020-04-02 18:10:41 +08:00
// ================== Check Pointer Authentication Extension (PAuth).
// RUN: %clang -target arm64-none-linux-gnu -march=armv8-a -x c -E -dM %s -o - | FileCheck -check-prefix=CHECK-PAUTH-OFF %s
// RUN: %clang -target arm64-none-linux-gnu -march=armv8.5-a -x c -E -dM %s -o - | FileCheck -check-prefix=CHECK-PAUTH-OFF %s
// RUN: %clang -target arm64-none-linux-gnu -march=armv8-a -mbranch-protection=none -x c -E -dM %s -o - | FileCheck -check-prefix=CHECK-PAUTH-OFF %s
// RUN: %clang -target arm64-none-linux-gnu -march=armv8-a -mbranch-protection=bti -x c -E -dM %s -o - | FileCheck -check-prefix=CHECK-PAUTH-OFF %s
// RUN: %clang -target arm64-none-linux-gnu -march=armv8-a -mbranch-protection=standard -x c -E -dM %s -o - | FileCheck -check-prefix=CHECK-PAUTH %s
// RUN: %clang -target arm64-none-linux-gnu -march=armv8-a -mbranch-protection=pac-ret -x c -E -dM %s -o - | FileCheck -check-prefix=CHECK-PAUTH %s
// RUN: %clang -target arm64-none-linux-gnu -march=armv8-a -mbranch-protection=pac-ret+b-key -x c -E -dM %s -o - | FileCheck -check-prefix=CHECK-PAUTH-BKEY %s
// RUN: %clang -target arm64-none-linux-gnu -march=armv8-a -mbranch-protection=pac-ret+leaf -x c -E -dM %s -o - | FileCheck -check-prefix=CHECK-PAUTH-ALL %s
// RUN: %clang -target arm64-none-linux-gnu -march=armv8-a -mbranch-protection=pac-ret+leaf+b-key -x c -E -dM %s -o - | FileCheck -check-prefix=CHECK-PAUTH-BKEY-ALL %s
// CHECK-PAUTH-OFF-NOT: __ARM_FEATURE_PAC_DEFAULT
// CHECK-PAUTH: #define __ARM_FEATURE_PAC_DEFAULT 1
// CHECK-PAUTH-BKEY: #define __ARM_FEATURE_PAC_DEFAULT 2
// CHECK-PAUTH-ALL: #define __ARM_FEATURE_PAC_DEFAULT 5
// CHECK-PAUTH-BKEY-ALL: #define __ARM_FEATURE_PAC_DEFAULT 6
// ================== Check Branch Target Identification (BTI).
// RUN: %clang -target arm64-none-linux-gnu -march=armv8-a -x c -E -dM %s -o - | FileCheck -check-prefix=CHECK-BTI-OFF %s
// RUN: %clang -target arm64-none-linux-gnu -march=armv8.5-a -x c -E -dM %s -o - | FileCheck -check-prefix=CHECK-BTI-OFF %s
// RUN: %clang -target arm64-none-linux-gnu -march=armv8-a -mbranch-protection=none -x c -E -dM %s -o - | FileCheck -check-prefix=CHECK-BTI-OFF %s
// RUN: %clang -target arm64-none-linux-gnu -march=armv8-a -mbranch-protection=pac-ret -x c -E -dM %s -o - | FileCheck -check-prefix=CHECK-BTI-OFF %s
// RUN: %clang -target arm64-none-linux-gnu -march=armv8-a -mbranch-protection=pac-ret+leaf -x c -E -dM %s -o - | FileCheck -check-prefix=CHECK-BTI-OFF %s
// RUN: %clang -target arm64-none-linux-gnu -march=armv8-a -mbranch-protection=pac-ret+b-key -x c -E -dM %s -o - | FileCheck -check-prefix=CHECK-BTI-OFF %s
// RUN: %clang -target arm64-none-linux-gnu -march=armv8-a -mbranch-protection=pac-ret+leaf+b-key -x c -E -dM %s -o - | FileCheck -check-prefix=CHECK-BTI-OFF %s
// RUN: %clang -target arm64-none-linux-gnu -march=armv8-a -mbranch-protection=standard -x c -E -dM %s -o - | FileCheck -check-prefix=CHECK-BTI %s
// RUN: %clang -target arm64-none-linux-gnu -march=armv8-a -mbranch-protection=bti -x c -E -dM %s -o - | FileCheck -check-prefix=CHECK-BTI %s
// RUN: %clang -target arm64-none-linux-gnu -march=armv8-a -mbranch-protection=pac-ret+bti -x c -E -dM %s -o - | FileCheck -check-prefix=CHECK-BTI %s
// CHECK-BTI-OFF-NOT: __ARM_FEATURE_BTI_DEFAULT
// CHECK-BTI: #define __ARM_FEATURE_BTI_DEFAULT 1