maxjhandsome
/
llvm-project
forked from OSchip/llvm-project
1
0
Fork 0
Code Issues Pull Requests Packages Releases Wiki Activity
llvm-project/llvm/test/Transforms/InstCombine/trunc.ll

627 lines
19 KiB
LLVM
Raw Normal View History

auto-generate checks llvm-svn: 281755
2016-09-17 01:48:16 +08:00
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
filecheckize llvm-svn: 112235
2010-08-27 06:23:39 +08:00
; RUN: opt < %s -instcombine -S | FileCheck %s
teach the truncation optimization that an entire chain of computation can be truncated if it is fed by a sext/zext that doesn't have to be exactly equal to the truncation result type. llvm-svn: 112285
2010-08-28 04:32:06 +08:00
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
Instcombine zext(trunc(x) & mask) to x&mask, even if the trunc has multiple users. llvm-svn: 73656
2009-06-18 07:17:05 +08:00
Generalize the zext(trunc(t) & C) instcombine to work even with C is not a low-bits mask, and add a similar instcombine for zext((trunc(t) & C) ^ C). llvm-svn: 73705
2009-06-19 00:30:21 +08:00
; Instcombine should be able to eliminate all of these ext casts.
Instcombine zext(trunc(x) & mask) to x&mask, even if the trunc has multiple users. llvm-svn: 73656
2009-06-18 07:17:05 +08:00
declare void @use(i32)
filecheckize llvm-svn: 112235
2010-08-27 06:23:39 +08:00
define i64 @test1(i64 %a) {
auto-generate checks llvm-svn: 281755
2016-09-17 01:48:16 +08:00
; CHECK-LABEL: @test1(
; CHECK-NEXT: [[B:%.*]] = trunc i64 %a to i32
; CHECK-NEXT: [[C:%.*]] = and i64 %a, 15
; CHECK-NEXT: call void @use(i32 [[B]])
; CHECK-NEXT: ret i64 [[C]]
;
Instcombine zext(trunc(x) & mask) to x&mask, even if the trunc has multiple users. llvm-svn: 73656
2009-06-18 07:17:05 +08:00
%b = trunc i64 %a to i32
%c = and i32 %b, 15
%d = zext i32 %c to i64
call void @use(i32 %b)
ret i64 %d
}
auto-generate checks llvm-svn: 281755
2016-09-17 01:48:16 +08:00
filecheckize llvm-svn: 112235
2010-08-27 06:23:39 +08:00
define i64 @test2(i64 %a) {
auto-generate checks llvm-svn: 281755
2016-09-17 01:48:16 +08:00
; CHECK-LABEL: @test2(
; CHECK-NEXT: [[B:%.*]] = trunc i64 %a to i32
; CHECK-NEXT: [[D1:%.*]] = shl i64 %a, 36
[InstCombine] fix auto-generated FileCheck-captured variable refs The script at utils/update_test_checks.py has (had?) a bug when variables start with the same sequence of letters (clearly, not all of the time). llvm-svn: 302674
2017-05-10 22:40:04 +08:00
; CHECK-NEXT: [[D:%.*]] = ashr exact i64 [[D1]], 36
auto-generate checks llvm-svn: 281755
2016-09-17 01:48:16 +08:00
; CHECK-NEXT: call void @use(i32 [[B]])
; CHECK-NEXT: ret i64 [[D]]
;
Instcombine zext(trunc(x) & mask) to x&mask, even if the trunc has multiple users. llvm-svn: 73656
2009-06-18 07:17:05 +08:00
%b = trunc i64 %a to i32
%c = shl i32 %b, 4
%q = ashr i32 %c, 4
%d = sext i32 %q to i64
call void @use(i32 %b)
ret i64 %d
}
auto-generate checks llvm-svn: 281755
2016-09-17 01:48:16 +08:00
filecheckize llvm-svn: 112235
2010-08-27 06:23:39 +08:00
define i64 @test3(i64 %a) {
auto-generate checks llvm-svn: 281755
2016-09-17 01:48:16 +08:00
; CHECK-LABEL: @test3(
; CHECK-NEXT: [[B:%.*]] = trunc i64 %a to i32
; CHECK-NEXT: [[C:%.*]] = and i64 %a, 8
; CHECK-NEXT: call void @use(i32 [[B]])
; CHECK-NEXT: ret i64 [[C]]
;
Generalize the zext(trunc(t) & C) instcombine to work even with C is not a low-bits mask, and add a similar instcombine for zext((trunc(t) & C) ^ C). llvm-svn: 73705
2009-06-19 00:30:21 +08:00
%b = trunc i64 %a to i32
%c = and i32 %b, 8
%d = zext i32 %c to i64
call void @use(i32 %b)
ret i64 %d
}
auto-generate checks llvm-svn: 281755
2016-09-17 01:48:16 +08:00
filecheckize llvm-svn: 112235
2010-08-27 06:23:39 +08:00
define i64 @test4(i64 %a) {
auto-generate checks llvm-svn: 281755
2016-09-17 01:48:16 +08:00
; CHECK-LABEL: @test4(
; CHECK-NEXT: [[B:%.*]] = trunc i64 %a to i32
; CHECK-NEXT: [[C:%.*]] = and i64 %a, 8
; CHECK-NEXT: [[X:%.*]] = xor i64 [[C]], 8
; CHECK-NEXT: call void @use(i32 [[B]])
; CHECK-NEXT: ret i64 [[X]]
;
Generalize the zext(trunc(t) & C) instcombine to work even with C is not a low-bits mask, and add a similar instcombine for zext((trunc(t) & C) ^ C). llvm-svn: 73705
2009-06-19 00:30:21 +08:00
%b = trunc i64 %a to i32
%c = and i32 %b, 8
%x = xor i32 %c, 8
%d = zext i32 %x to i64
call void @use(i32 %b)
ret i64 %d
}
Add an instcombine to clean up a common pattern produced by the SRoA "promote to large integer" code, eliminating some type conversions like this: %94 = zext i16 %93 to i32 ; <i32> [#uses=2] %96 = lshr i32 %94, 8 ; <i32> [#uses=1] %101 = trunc i32 %96 to i8 ; <i8> [#uses=1] This also unblocks other xforms from happening, now clang is able to compile: struct S { float A, B, C, D; }; float foo(struct S A) { return A.A + A.B+A.C+A.D; } into: _foo: ## @foo ## BB#0: ## %entry pshufd $1, %xmm0, %xmm2 addss %xmm0, %xmm2 movdqa %xmm1, %xmm3 addss %xmm2, %xmm3 pshufd $1, %xmm1, %xmm0 addss %xmm3, %xmm0 ret on x86-64, instead of: _foo: ## @foo ## BB#0: ## %entry movd %xmm0, %rax shrq $32, %rax movd %eax, %xmm2 addss %xmm0, %xmm2 movapd %xmm1, %xmm3 addss %xmm2, %xmm3 movd %xmm1, %rax shrq $32, %rax movd %eax, %xmm0 addss %xmm3, %xmm0 ret This seems pretty close to optimal to me, at least without using horizontal adds. This also triggers in lots of other code, including SPEC. llvm-svn: 112278
2010-08-28 02:31:05 +08:00
define i32 @test5(i32 %A) {
auto-generate checks llvm-svn: 281755
2016-09-17 01:48:16 +08:00
; CHECK-LABEL: @test5(
; CHECK-NEXT: [[C:%.*]] = lshr i32 %A, 16
; CHECK-NEXT: ret i32 [[C]]
;
Add an instcombine to clean up a common pattern produced by the SRoA "promote to large integer" code, eliminating some type conversions like this: %94 = zext i16 %93 to i32 ; <i32> [#uses=2] %96 = lshr i32 %94, 8 ; <i32> [#uses=1] %101 = trunc i32 %96 to i8 ; <i8> [#uses=1] This also unblocks other xforms from happening, now clang is able to compile: struct S { float A, B, C, D; }; float foo(struct S A) { return A.A + A.B+A.C+A.D; } into: _foo: ## @foo ## BB#0: ## %entry pshufd $1, %xmm0, %xmm2 addss %xmm0, %xmm2 movdqa %xmm1, %xmm3 addss %xmm2, %xmm3 pshufd $1, %xmm1, %xmm0 addss %xmm3, %xmm0 ret on x86-64, instead of: _foo: ## @foo ## BB#0: ## %entry movd %xmm0, %rax shrq $32, %rax movd %eax, %xmm2 addss %xmm0, %xmm2 movapd %xmm1, %xmm3 addss %xmm2, %xmm3 movd %xmm1, %rax shrq $32, %rax movd %eax, %xmm0 addss %xmm3, %xmm0 ret This seems pretty close to optimal to me, at least without using horizontal adds. This also triggers in lots of other code, including SPEC. llvm-svn: 112278
2010-08-28 02:31:05 +08:00
%B = zext i32 %A to i128
%C = lshr i128 %B, 16
%D = trunc i128 %C to i32
ret i32 %D
}
define i32 @test6(i64 %A) {
auto-generate checks llvm-svn: 281755
2016-09-17 01:48:16 +08:00
; CHECK-LABEL: @test6(
; CHECK-NEXT: [[C:%.*]] = lshr i64 %A, 32
; CHECK-NEXT: [[D:%.*]] = trunc i64 [[C]] to i32
; CHECK-NEXT: ret i32 [[D]]
;
Add an instcombine to clean up a common pattern produced by the SRoA "promote to large integer" code, eliminating some type conversions like this: %94 = zext i16 %93 to i32 ; <i32> [#uses=2] %96 = lshr i32 %94, 8 ; <i32> [#uses=1] %101 = trunc i32 %96 to i8 ; <i8> [#uses=1] This also unblocks other xforms from happening, now clang is able to compile: struct S { float A, B, C, D; }; float foo(struct S A) { return A.A + A.B+A.C+A.D; } into: _foo: ## @foo ## BB#0: ## %entry pshufd $1, %xmm0, %xmm2 addss %xmm0, %xmm2 movdqa %xmm1, %xmm3 addss %xmm2, %xmm3 pshufd $1, %xmm1, %xmm0 addss %xmm3, %xmm0 ret on x86-64, instead of: _foo: ## @foo ## BB#0: ## %entry movd %xmm0, %rax shrq $32, %rax movd %eax, %xmm2 addss %xmm0, %xmm2 movapd %xmm1, %xmm3 addss %xmm2, %xmm3 movd %xmm1, %rax shrq $32, %rax movd %eax, %xmm0 addss %xmm3, %xmm0 ret This seems pretty close to optimal to me, at least without using horizontal adds. This also triggers in lots of other code, including SPEC. llvm-svn: 112278
2010-08-28 02:31:05 +08:00
%B = zext i64 %A to i128
%C = lshr i128 %B, 32
%D = trunc i128 %C to i32
ret i32 %D
}
[InstCombine] Consider more cases where SimplifyDemandedUseBits does not convert AShr to LShr. There are cases where AShr have better chance to be optimized than LShr, especially when the demanded bits are not known to be Zero, and also known to be similar to the sign bit. Differential Revision: https://reviews.llvm.org/D36936 llvm-svn: 311773
2017-08-25 19:07:54 +08:00
; Test case where 'ashr' demanded bits does not contain any of the high bits,
; but does contain sign bits, where the sign bit is not known to be zero.
define i16 @ashr_mul_sign_bits(i8 %X, i8 %Y) {
; CHECK-LABEL: @ashr_mul_sign_bits(
; CHECK-NEXT: [[A:%.*]] = sext i8 %X to i16
; CHECK-NEXT: [[B:%.*]] = sext i8 %Y to i16
; CHECK-NEXT: [[C:%.*]] = mul nsw i16 [[A]], [[B]]
; CHECK-NEXT: [[D:%.*]] = ashr i16 [[C]], 3
; CHECK-NEXT: ret i16 [[D]]
%A = sext i8 %X to i32
%B = sext i8 %Y to i32
%C = mul i32 %A, %B
%D = ashr i32 %C, 3
%E = trunc i32 %D to i16
ret i16 %E
}
[InstCombine] Teach ComputeNumSignBitsImpl to handle integer multiply instruction. Differential Revision: https://reviews.llvm.org/D36679 llvm-svn: 311206
2017-08-19 06:56:55 +08:00
define i16 @ashr_mul(i8 %X, i8 %Y) {
; CHECK-LABEL: @ashr_mul(
; CHECK-NEXT: [[A:%.*]] = sext i8 %X to i16
; CHECK-NEXT: [[B:%.*]] = sext i8 %Y to i16
; CHECK-NEXT: [[C:%.*]] = mul nsw i16 [[A]], [[B]]
; CHECK-NEXT: [[D:%.*]] = ashr i16 [[C]], 8
; CHECK-NEXT: ret i16 [[D]]
%A = sext i8 %X to i20
%B = sext i8 %Y to i20
%C = mul i20 %A, %B
%D = ashr i20 %C, 8
%E = trunc i20 %D to i16
ret i16 %E
}
[InstCombine] Teach canEvaluateTruncated to handle arithmetic shift (including those with vector splat shift amount) Differential Revision: https://reviews.llvm.org/D36784 llvm-svn: 311050
2017-08-17 06:42:38 +08:00
define i32 @trunc_ashr(i32 %X) {
; CHECK-LABEL: @trunc_ashr(
; CHECK-NEXT: [[B:%.*]] = or i32 [[X:%.*]], -2147483648
; CHECK-NEXT: [[C:%.*]] = ashr i32 [[B]], 8
; CHECK-NEXT: ret i32 [[C]]
;
%A = zext i32 %X to i36
%B = or i36 %A, -2147483648 ; 0xF80000000
%C = ashr i36 %B, 8
%T = trunc i36 %C to i32
ret i32 %T
}
define <2 x i32> @trunc_ashr_vec(<2 x i32> %X) {
; CHECK-LABEL: @trunc_ashr_vec(
; CHECK-NEXT: [[B:%.*]] = or <2 x i32> [[X:%.*]], <i32 -2147483648, i32 -2147483648>
; CHECK-NEXT: [[C:%.*]] = ashr <2 x i32> [[B]], <i32 8, i32 8>
; CHECK-NEXT: ret <2 x i32> [[C]]
;
%A = zext <2 x i32> %X to <2 x i36>
%B = or <2 x i36> %A, <i36 -2147483648, i36 -2147483648> ; 0xF80000000
%C = ashr <2 x i36> %B, <i36 8, i36 8>
%T = trunc <2 x i36> %C to <2 x i32>
ret <2 x i32> %T
}
Add an instcombine to clean up a common pattern produced by the SRoA "promote to large integer" code, eliminating some type conversions like this: %94 = zext i16 %93 to i32 ; <i32> [#uses=2] %96 = lshr i32 %94, 8 ; <i32> [#uses=1] %101 = trunc i32 %96 to i8 ; <i8> [#uses=1] This also unblocks other xforms from happening, now clang is able to compile: struct S { float A, B, C, D; }; float foo(struct S A) { return A.A + A.B+A.C+A.D; } into: _foo: ## @foo ## BB#0: ## %entry pshufd $1, %xmm0, %xmm2 addss %xmm0, %xmm2 movdqa %xmm1, %xmm3 addss %xmm2, %xmm3 pshufd $1, %xmm1, %xmm0 addss %xmm3, %xmm0 ret on x86-64, instead of: _foo: ## @foo ## BB#0: ## %entry movd %xmm0, %rax shrq $32, %rax movd %eax, %xmm2 addss %xmm0, %xmm2 movapd %xmm1, %xmm3 addss %xmm2, %xmm3 movd %xmm1, %rax shrq $32, %rax movd %eax, %xmm0 addss %xmm3, %xmm0 ret This seems pretty close to optimal to me, at least without using horizontal adds. This also triggers in lots of other code, including SPEC. llvm-svn: 112278
2010-08-28 02:31:05 +08:00
define i92 @test7(i64 %A) {
auto-generate checks llvm-svn: 281755
2016-09-17 01:48:16 +08:00
; CHECK-LABEL: @test7(
[InstCombine] narrow lshr with constant Name: narrow_shift Pre: C1 < 8 %zx = zext i8 %x to i32 %l = lshr i32 %zx, C1 => %narrowC = trunc i32 C1 to i8 %ns = lshr i8 %x, %narrowC %l = zext i8 %ns to i32 http://rise4fun.com/Alive/jIV This isn't directly applicable to PR34046 as written, but we need to have more narrowing folds like this to be sure that rotate patterns are recognized. llvm-svn: 310060
2017-08-04 23:42:47 +08:00
; CHECK-NEXT: [[TMP1:%.*]] = lshr i64 %A, 32
; CHECK-NEXT: [[D:%.*]] = zext i64 [[TMP1]] to i92
; CHECK-NEXT: ret i92 [[D]]
auto-generate checks llvm-svn: 281755
2016-09-17 01:48:16 +08:00
;
Add an instcombine to clean up a common pattern produced by the SRoA "promote to large integer" code, eliminating some type conversions like this: %94 = zext i16 %93 to i32 ; <i32> [#uses=2] %96 = lshr i32 %94, 8 ; <i32> [#uses=1] %101 = trunc i32 %96 to i8 ; <i8> [#uses=1] This also unblocks other xforms from happening, now clang is able to compile: struct S { float A, B, C, D; }; float foo(struct S A) { return A.A + A.B+A.C+A.D; } into: _foo: ## @foo ## BB#0: ## %entry pshufd $1, %xmm0, %xmm2 addss %xmm0, %xmm2 movdqa %xmm1, %xmm3 addss %xmm2, %xmm3 pshufd $1, %xmm1, %xmm0 addss %xmm3, %xmm0 ret on x86-64, instead of: _foo: ## @foo ## BB#0: ## %entry movd %xmm0, %rax shrq $32, %rax movd %eax, %xmm2 addss %xmm0, %xmm2 movapd %xmm1, %xmm3 addss %xmm2, %xmm3 movd %xmm1, %rax shrq $32, %rax movd %eax, %xmm0 addss %xmm3, %xmm0 ret This seems pretty close to optimal to me, at least without using horizontal adds. This also triggers in lots of other code, including SPEC. llvm-svn: 112278
2010-08-28 02:31:05 +08:00
%B = zext i64 %A to i128
%C = lshr i128 %B, 32
%D = trunc i128 %C to i92
ret i92 %D
teach the truncation optimization that an entire chain of computation can be truncated if it is fed by a sext/zext that doesn't have to be exactly equal to the truncation result type. llvm-svn: 112285
2010-08-28 04:32:06 +08:00
}
define i64 @test8(i32 %A, i32 %B) {
auto-generate checks llvm-svn: 281755
2016-09-17 01:48:16 +08:00
; CHECK-LABEL: @test8(
; CHECK-NEXT: [[TMP38:%.*]] = zext i32 %A to i64
; CHECK-NEXT: [[TMP32:%.*]] = zext i32 %B to i64
; CHECK-NEXT: [[TMP33:%.*]] = shl nuw i64 [[TMP32]], 32
; CHECK-NEXT: [[INS35:%.*]] = or i64 [[TMP33]], [[TMP38]]
; CHECK-NEXT: ret i64 [[INS35]]
;
teach the truncation optimization that an entire chain of computation can be truncated if it is fed by a sext/zext that doesn't have to be exactly equal to the truncation result type. llvm-svn: 112285
2010-08-28 04:32:06 +08:00
%tmp38 = zext i32 %A to i128
%tmp32 = zext i32 %B to i128
%tmp33 = shl i128 %tmp32, 32
%ins35 = or i128 %tmp33, %tmp38
%tmp42 = trunc i128 %ins35 to i64
ret i64 %tmp42
}
implement an instcombine xform that canonicalizes casts outside of and-with-constant operations. This fixes rdar://8808586 which observed that we used to compile: union xy { struct x { _Bool b[15]; } x; __attribute__((packed)) struct y { __attribute__((packed)) unsigned long b0to7; __attribute__((packed)) unsigned int b8to11; __attribute__((packed)) unsigned short b12to13; __attribute__((packed)) unsigned char b14; } y; }; struct x foo(union xy *xy) { return xy->x; } into: _foo: ## @foo movq (%rdi), %rax movabsq $1095216660480, %rcx ## imm = 0xFF00000000 andq %rax, %rcx movabsq $-72057594037927936, %rdx ## imm = 0xFF00000000000000 andq %rax, %rdx movzbl %al, %esi orq %rdx, %rsi movq %rax, %rdx andq $65280, %rdx ## imm = 0xFF00 orq %rsi, %rdx movq %rax, %rsi andq $16711680, %rsi ## imm = 0xFF0000 orq %rdx, %rsi movl %eax, %edx andl $-16777216, %edx ## imm = 0xFFFFFFFFFF000000 orq %rsi, %rdx orq %rcx, %rdx movabsq $280375465082880, %rcx ## imm = 0xFF0000000000 movq %rax, %rsi andq %rcx, %rsi orq %rdx, %rsi movabsq $71776119061217280, %r8 ## imm = 0xFF000000000000 andq %r8, %rax orq %rsi, %rax movzwl 12(%rdi), %edx movzbl 14(%rdi), %esi shlq $16, %rsi orl %edx, %esi movq %rsi, %r9 shlq $32, %r9 movl 8(%rdi), %edx orq %r9, %rdx andq %rdx, %rcx movzbl %sil, %esi shlq $32, %rsi orq %rcx, %rsi movl %edx, %ecx andl $-16777216, %ecx ## imm = 0xFFFFFFFFFF000000 orq %rsi, %rcx movq %rdx, %rsi andq $16711680, %rsi ## imm = 0xFF0000 orq %rcx, %rsi movq %rdx, %rcx andq $65280, %rcx ## imm = 0xFF00 orq %rsi, %rcx movzbl %dl, %esi orq %rcx, %rsi andq %r8, %rdx orq %rsi, %rdx ret We now compile this into: _foo: ## @foo ## BB#0: ## %entry movzwl 12(%rdi), %eax movzbl 14(%rdi), %ecx shlq $16, %rcx orl %eax, %ecx shlq $32, %rcx movl 8(%rdi), %edx orq %rcx, %rdx movq (%rdi), %rax ret A small improvement :-) llvm-svn: 123520
2011-01-15 14:32:33 +08:00
define i8 @test9(i32 %X) {
auto-generate checks llvm-svn: 281755
2016-09-17 01:48:16 +08:00
; CHECK-LABEL: @test9(
[InstCombine] add tests for trunc(shuffle X, C, M); NFC llvm-svn: 295513
2017-02-18 07:16:54 +08:00
; CHECK-NEXT: [[TMP1:%.*]] = trunc i32 %X to i8
; CHECK-NEXT: [[Z:%.*]] = and i8 [[TMP1]], 42
auto-generate checks llvm-svn: 281755
2016-09-17 01:48:16 +08:00
; CHECK-NEXT: ret i8 [[Z]]
;
implement an instcombine xform that canonicalizes casts outside of and-with-constant operations. This fixes rdar://8808586 which observed that we used to compile: union xy { struct x { _Bool b[15]; } x; __attribute__((packed)) struct y { __attribute__((packed)) unsigned long b0to7; __attribute__((packed)) unsigned int b8to11; __attribute__((packed)) unsigned short b12to13; __attribute__((packed)) unsigned char b14; } y; }; struct x foo(union xy *xy) { return xy->x; } into: _foo: ## @foo movq (%rdi), %rax movabsq $1095216660480, %rcx ## imm = 0xFF00000000 andq %rax, %rcx movabsq $-72057594037927936, %rdx ## imm = 0xFF00000000000000 andq %rax, %rdx movzbl %al, %esi orq %rdx, %rsi movq %rax, %rdx andq $65280, %rdx ## imm = 0xFF00 orq %rsi, %rdx movq %rax, %rsi andq $16711680, %rsi ## imm = 0xFF0000 orq %rdx, %rsi movl %eax, %edx andl $-16777216, %edx ## imm = 0xFFFFFFFFFF000000 orq %rsi, %rdx orq %rcx, %rdx movabsq $280375465082880, %rcx ## imm = 0xFF0000000000 movq %rax, %rsi andq %rcx, %rsi orq %rdx, %rsi movabsq $71776119061217280, %r8 ## imm = 0xFF000000000000 andq %r8, %rax orq %rsi, %rax movzwl 12(%rdi), %edx movzbl 14(%rdi), %esi shlq $16, %rsi orl %edx, %esi movq %rsi, %r9 shlq $32, %r9 movl 8(%rdi), %edx orq %r9, %rdx andq %rdx, %rcx movzbl %sil, %esi shlq $32, %rsi orq %rcx, %rsi movl %edx, %ecx andl $-16777216, %ecx ## imm = 0xFFFFFFFFFF000000 orq %rsi, %rcx movq %rdx, %rsi andq $16711680, %rsi ## imm = 0xFF0000 orq %rcx, %rsi movq %rdx, %rcx andq $65280, %rcx ## imm = 0xFF00 orq %rsi, %rcx movzbl %dl, %esi orq %rcx, %rsi andq %r8, %rdx orq %rsi, %rdx ret We now compile this into: _foo: ## @foo ## BB#0: ## %entry movzwl 12(%rdi), %eax movzbl 14(%rdi), %ecx shlq $16, %rcx orl %eax, %ecx shlq $32, %rcx movl 8(%rdi), %edx orq %rcx, %rdx movq (%rdi), %rax ret A small improvement :-) llvm-svn: 123520
2011-01-15 14:32:33 +08:00
%Y = and i32 %X, 42
%Z = trunc i32 %Y to i8
ret i8 %Z
}
; rdar://8808586
define i8 @test10(i32 %X) {
auto-generate checks llvm-svn: 281755
2016-09-17 01:48:16 +08:00
; CHECK-LABEL: @test10(
; CHECK-NEXT: [[Y:%.*]] = trunc i32 %X to i8
; CHECK-NEXT: [[Z:%.*]] = and i8 [[Y]], 42
; CHECK-NEXT: ret i8 [[Z]]
;
implement an instcombine xform that canonicalizes casts outside of and-with-constant operations. This fixes rdar://8808586 which observed that we used to compile: union xy { struct x { _Bool b[15]; } x; __attribute__((packed)) struct y { __attribute__((packed)) unsigned long b0to7; __attribute__((packed)) unsigned int b8to11; __attribute__((packed)) unsigned short b12to13; __attribute__((packed)) unsigned char b14; } y; }; struct x foo(union xy *xy) { return xy->x; } into: _foo: ## @foo movq (%rdi), %rax movabsq $1095216660480, %rcx ## imm = 0xFF00000000 andq %rax, %rcx movabsq $-72057594037927936, %rdx ## imm = 0xFF00000000000000 andq %rax, %rdx movzbl %al, %esi orq %rdx, %rsi movq %rax, %rdx andq $65280, %rdx ## imm = 0xFF00 orq %rsi, %rdx movq %rax, %rsi andq $16711680, %rsi ## imm = 0xFF0000 orq %rdx, %rsi movl %eax, %edx andl $-16777216, %edx ## imm = 0xFFFFFFFFFF000000 orq %rsi, %rdx orq %rcx, %rdx movabsq $280375465082880, %rcx ## imm = 0xFF0000000000 movq %rax, %rsi andq %rcx, %rsi orq %rdx, %rsi movabsq $71776119061217280, %r8 ## imm = 0xFF000000000000 andq %r8, %rax orq %rsi, %rax movzwl 12(%rdi), %edx movzbl 14(%rdi), %esi shlq $16, %rsi orl %edx, %esi movq %rsi, %r9 shlq $32, %r9 movl 8(%rdi), %edx orq %r9, %rdx andq %rdx, %rcx movzbl %sil, %esi shlq $32, %rsi orq %rcx, %rsi movl %edx, %ecx andl $-16777216, %ecx ## imm = 0xFFFFFFFFFF000000 orq %rsi, %rcx movq %rdx, %rsi andq $16711680, %rsi ## imm = 0xFF0000 orq %rcx, %rsi movq %rdx, %rcx andq $65280, %rcx ## imm = 0xFF00 orq %rsi, %rcx movzbl %dl, %esi orq %rcx, %rsi andq %r8, %rdx orq %rsi, %rdx ret We now compile this into: _foo: ## @foo ## BB#0: ## %entry movzwl 12(%rdi), %eax movzbl 14(%rdi), %ecx shlq $16, %rcx orl %eax, %ecx shlq $32, %rcx movl 8(%rdi), %edx orq %rcx, %rdx movq (%rdi), %rax ret A small improvement :-) llvm-svn: 123520
2011-01-15 14:32:33 +08:00
%Y = trunc i32 %X to i8
%Z = and i8 %Y, 42
ret i8 %Z
}
[InstCombine] add tests to show missing trunc optimizations llvm-svn: 253609
2015-11-20 06:11:52 +08:00
; PR25543
; https://llvm.org/bugs/show_bug.cgi?id=25543
[InstCombine] fold trunc ([lshr] (bitcast vector) ) --> extractelement (PR25543) This is a fix for PR25543: https://llvm.org/bugs/show_bug.cgi?id=25543 The idea is to take the existing fold of: bitcast ( trunc ( lshr ( bitcast X))) --> extractelement (bitcast X) ( http://reviews.llvm.org/rL112232 ) And break it into less specific transforms so we'll catch more cases such as the example in the bug report: bitcast ( trunc ( lshr ( bitcast X))) --> bitcast ( extractelement (bitcast X)) --> extractelement (bitcast X) Enabling patches for this change: http://reviews.llvm.org/rL255399 (combine bitcasts) http://reviews.llvm.org/rL255433 (canonicalize extractelement(bitcast X)) Differential Revision: http://reviews.llvm.org/D15392 llvm-svn: 255504
2015-12-15 00:16:54 +08:00
; This is an extractelement.
[InstCombine] add tests to show missing trunc optimizations llvm-svn: 253609
2015-11-20 06:11:52 +08:00
define i32 @trunc_bitcast1(<4 x i32> %v) {
auto-generate checks llvm-svn: 281755
2016-09-17 01:48:16 +08:00
; CHECK-LABEL: @trunc_bitcast1(
; CHECK-NEXT: [[EXT:%.*]] = extractelement <4 x i32> %v, i32 1
; CHECK-NEXT: ret i32 [[EXT]]
;
[InstCombine] add tests to show missing trunc optimizations llvm-svn: 253609
2015-11-20 06:11:52 +08:00
%bc = bitcast <4 x i32> %v to i128
%shr = lshr i128 %bc, 32
%ext = trunc i128 %shr to i32
ret i32 %ext
}
[InstCombine] fold trunc ([lshr] (bitcast vector) ) --> extractelement (PR25543) This is a fix for PR25543: https://llvm.org/bugs/show_bug.cgi?id=25543 The idea is to take the existing fold of: bitcast ( trunc ( lshr ( bitcast X))) --> extractelement (bitcast X) ( http://reviews.llvm.org/rL112232 ) And break it into less specific transforms so we'll catch more cases such as the example in the bug report: bitcast ( trunc ( lshr ( bitcast X))) --> bitcast ( extractelement (bitcast X)) --> extractelement (bitcast X) Enabling patches for this change: http://reviews.llvm.org/rL255399 (combine bitcasts) http://reviews.llvm.org/rL255433 (canonicalize extractelement(bitcast X)) Differential Revision: http://reviews.llvm.org/D15392 llvm-svn: 255504
2015-12-15 00:16:54 +08:00
; A bitcast may still be required.
[InstCombine] add tests to show missing trunc optimizations llvm-svn: 253609
2015-11-20 06:11:52 +08:00
define i32 @trunc_bitcast2(<2 x i64> %v) {
auto-generate checks llvm-svn: 281755
2016-09-17 01:48:16 +08:00
; CHECK-LABEL: @trunc_bitcast2(
; CHECK-NEXT: [[BC1:%.*]] = bitcast <2 x i64> %v to <4 x i32>
; CHECK-NEXT: [[EXT:%.*]] = extractelement <4 x i32> [[BC1]], i32 2
; CHECK-NEXT: ret i32 [[EXT]]
;
[InstCombine] add tests to show missing trunc optimizations llvm-svn: 253609
2015-11-20 06:11:52 +08:00
%bc = bitcast <2 x i64> %v to i128
%shr = lshr i128 %bc, 64
%ext = trunc i128 %shr to i32
ret i32 %ext
}
[InstCombine] fold trunc ([lshr] (bitcast vector) ) --> extractelement (PR25543) This is a fix for PR25543: https://llvm.org/bugs/show_bug.cgi?id=25543 The idea is to take the existing fold of: bitcast ( trunc ( lshr ( bitcast X))) --> extractelement (bitcast X) ( http://reviews.llvm.org/rL112232 ) And break it into less specific transforms so we'll catch more cases such as the example in the bug report: bitcast ( trunc ( lshr ( bitcast X))) --> bitcast ( extractelement (bitcast X)) --> extractelement (bitcast X) Enabling patches for this change: http://reviews.llvm.org/rL255399 (combine bitcasts) http://reviews.llvm.org/rL255433 (canonicalize extractelement(bitcast X)) Differential Revision: http://reviews.llvm.org/D15392 llvm-svn: 255504
2015-12-15 00:16:54 +08:00
; The right shift is optional.
[InstCombine] add tests to show missing trunc optimizations llvm-svn: 253609
2015-11-20 06:11:52 +08:00
define i32 @trunc_bitcast3(<4 x i32> %v) {
auto-generate checks llvm-svn: 281755
2016-09-17 01:48:16 +08:00
; CHECK-LABEL: @trunc_bitcast3(
; CHECK-NEXT: [[EXT:%.*]] = extractelement <4 x i32> %v, i32 0
; CHECK-NEXT: ret i32 [[EXT]]
;
[InstCombine] add tests to show missing trunc optimizations llvm-svn: 253609
2015-11-20 06:11:52 +08:00
%bc = bitcast <4 x i32> %v to i128
%ext = trunc i128 %bc to i32
ret i32 %ext
}
Reapply "InstCombine: Reduce trunc (shl x, K) width." This reapplies r272987 with a fix for infinitely looping when the truncated value is another shift of a constant. llvm-svn: 281379
2016-09-14 03:43:57 +08:00
define i32 @trunc_shl_31_i32_i64(i64 %val) {
auto-generate checks llvm-svn: 281755
2016-09-17 01:48:16 +08:00
; CHECK-LABEL: @trunc_shl_31_i32_i64(
; CHECK-NEXT: [[VAL_TR:%.*]] = trunc i64 %val to i32
; CHECK-NEXT: [[TRUNC:%.*]] = shl i32 [[VAL_TR]], 31
; CHECK-NEXT: ret i32 [[TRUNC]]
;
Reapply "InstCombine: Reduce trunc (shl x, K) width." This reapplies r272987 with a fix for infinitely looping when the truncated value is another shift of a constant. llvm-svn: 281379
2016-09-14 03:43:57 +08:00
%shl = shl i64 %val, 31
%trunc = trunc i64 %shl to i32
ret i32 %trunc
}
define i32 @trunc_shl_nsw_31_i32_i64(i64 %val) {
auto-generate checks llvm-svn: 281755
2016-09-17 01:48:16 +08:00
; CHECK-LABEL: @trunc_shl_nsw_31_i32_i64(
; CHECK-NEXT: [[VAL_TR:%.*]] = trunc i64 %val to i32
; CHECK-NEXT: [[TRUNC:%.*]] = shl i32 [[VAL_TR]], 31
; CHECK-NEXT: ret i32 [[TRUNC]]
;
Reapply "InstCombine: Reduce trunc (shl x, K) width." This reapplies r272987 with a fix for infinitely looping when the truncated value is another shift of a constant. llvm-svn: 281379
2016-09-14 03:43:57 +08:00
%shl = shl nsw i64 %val, 31
%trunc = trunc i64 %shl to i32
ret i32 %trunc
}
define i32 @trunc_shl_nuw_31_i32_i64(i64 %val) {
auto-generate checks llvm-svn: 281755
2016-09-17 01:48:16 +08:00
; CHECK-LABEL: @trunc_shl_nuw_31_i32_i64(
; CHECK-NEXT: [[VAL_TR:%.*]] = trunc i64 %val to i32
; CHECK-NEXT: [[TRUNC:%.*]] = shl i32 [[VAL_TR]], 31
; CHECK-NEXT: ret i32 [[TRUNC]]
;
Reapply "InstCombine: Reduce trunc (shl x, K) width." This reapplies r272987 with a fix for infinitely looping when the truncated value is another shift of a constant. llvm-svn: 281379
2016-09-14 03:43:57 +08:00
%shl = shl nuw i64 %val, 31
%trunc = trunc i64 %shl to i32
ret i32 %trunc
}
define i32 @trunc_shl_nsw_nuw_31_i32_i64(i64 %val) {
auto-generate checks llvm-svn: 281755
2016-09-17 01:48:16 +08:00
; CHECK-LABEL: @trunc_shl_nsw_nuw_31_i32_i64(
; CHECK-NEXT: [[VAL_TR:%.*]] = trunc i64 %val to i32
; CHECK-NEXT: [[TRUNC:%.*]] = shl i32 [[VAL_TR]], 31
; CHECK-NEXT: ret i32 [[TRUNC]]
;
Reapply "InstCombine: Reduce trunc (shl x, K) width." This reapplies r272987 with a fix for infinitely looping when the truncated value is another shift of a constant. llvm-svn: 281379
2016-09-14 03:43:57 +08:00
%shl = shl nsw nuw i64 %val, 31
%trunc = trunc i64 %shl to i32
ret i32 %trunc
}
define i16 @trunc_shl_15_i16_i64(i64 %val) {
auto-generate checks llvm-svn: 281755
2016-09-17 01:48:16 +08:00
; CHECK-LABEL: @trunc_shl_15_i16_i64(
; CHECK-NEXT: [[VAL_TR:%.*]] = trunc i64 %val to i16
; CHECK-NEXT: [[TRUNC:%.*]] = shl i16 [[VAL_TR]], 15
; CHECK-NEXT: ret i16 [[TRUNC]]
;
Reapply "InstCombine: Reduce trunc (shl x, K) width." This reapplies r272987 with a fix for infinitely looping when the truncated value is another shift of a constant. llvm-svn: 281379
2016-09-14 03:43:57 +08:00
%shl = shl i64 %val, 15
%trunc = trunc i64 %shl to i16
ret i16 %trunc
}
define i16 @trunc_shl_15_i16_i32(i32 %val) {
auto-generate checks llvm-svn: 281755
2016-09-17 01:48:16 +08:00
; CHECK-LABEL: @trunc_shl_15_i16_i32(
; CHECK-NEXT: [[VAL_TR:%.*]] = trunc i32 %val to i16
; CHECK-NEXT: [[TRUNC:%.*]] = shl i16 [[VAL_TR]], 15
; CHECK-NEXT: ret i16 [[TRUNC]]
;
Reapply "InstCombine: Reduce trunc (shl x, K) width." This reapplies r272987 with a fix for infinitely looping when the truncated value is another shift of a constant. llvm-svn: 281379
2016-09-14 03:43:57 +08:00
%shl = shl i32 %val, 15
%trunc = trunc i32 %shl to i16
ret i16 %trunc
}
define i8 @trunc_shl_7_i8_i64(i64 %val) {
auto-generate checks llvm-svn: 281755
2016-09-17 01:48:16 +08:00
; CHECK-LABEL: @trunc_shl_7_i8_i64(
; CHECK-NEXT: [[VAL_TR:%.*]] = trunc i64 %val to i8
; CHECK-NEXT: [[TRUNC:%.*]] = shl i8 [[VAL_TR]], 7
; CHECK-NEXT: ret i8 [[TRUNC]]
;
Reapply "InstCombine: Reduce trunc (shl x, K) width." This reapplies r272987 with a fix for infinitely looping when the truncated value is another shift of a constant. llvm-svn: 281379
2016-09-14 03:43:57 +08:00
%shl = shl i64 %val, 7
%trunc = trunc i64 %shl to i8
ret i8 %trunc
}
define i2 @trunc_shl_1_i2_i64(i64 %val) {
auto-generate checks llvm-svn: 281755
2016-09-17 01:48:16 +08:00
; CHECK-LABEL: @trunc_shl_1_i2_i64(
; CHECK-NEXT: [[SHL:%.*]] = shl i64 %val, 1
; CHECK-NEXT: [[TRUNC:%.*]] = trunc i64 [[SHL]] to i2
; CHECK-NEXT: ret i2 [[TRUNC]]
;
Reapply "InstCombine: Reduce trunc (shl x, K) width." This reapplies r272987 with a fix for infinitely looping when the truncated value is another shift of a constant. llvm-svn: 281379
2016-09-14 03:43:57 +08:00
%shl = shl i64 %val, 1
%trunc = trunc i64 %shl to i2
ret i2 %trunc
}
define i32 @trunc_shl_1_i32_i64(i64 %val) {
auto-generate checks llvm-svn: 281755
2016-09-17 01:48:16 +08:00
; CHECK-LABEL: @trunc_shl_1_i32_i64(
; CHECK-NEXT: [[VAL_TR:%.*]] = trunc i64 %val to i32
; CHECK-NEXT: [[TRUNC:%.*]] = shl i32 [[VAL_TR]], 1
; CHECK-NEXT: ret i32 [[TRUNC]]
;
Reapply "InstCombine: Reduce trunc (shl x, K) width." This reapplies r272987 with a fix for infinitely looping when the truncated value is another shift of a constant. llvm-svn: 281379
2016-09-14 03:43:57 +08:00
%shl = shl i64 %val, 1
%trunc = trunc i64 %shl to i32
ret i32 %trunc
}
define i32 @trunc_shl_16_i32_i64(i64 %val) {
auto-generate checks llvm-svn: 281755
2016-09-17 01:48:16 +08:00
; CHECK-LABEL: @trunc_shl_16_i32_i64(
; CHECK-NEXT: [[VAL_TR:%.*]] = trunc i64 %val to i32
; CHECK-NEXT: [[TRUNC:%.*]] = shl i32 [[VAL_TR]], 16
; CHECK-NEXT: ret i32 [[TRUNC]]
;
Reapply "InstCombine: Reduce trunc (shl x, K) width." This reapplies r272987 with a fix for infinitely looping when the truncated value is another shift of a constant. llvm-svn: 281379
2016-09-14 03:43:57 +08:00
%shl = shl i64 %val, 16
%trunc = trunc i64 %shl to i32
ret i32 %trunc
}
define i32 @trunc_shl_33_i32_i64(i64 %val) {
auto-generate checks llvm-svn: 281755
2016-09-17 01:48:16 +08:00
; CHECK-LABEL: @trunc_shl_33_i32_i64(
; CHECK-NEXT: ret i32 0
;
Reapply "InstCombine: Reduce trunc (shl x, K) width." This reapplies r272987 with a fix for infinitely looping when the truncated value is another shift of a constant. llvm-svn: 281379
2016-09-14 03:43:57 +08:00
%shl = shl i64 %val, 33
%trunc = trunc i64 %shl to i32
ret i32 %trunc
}
define i32 @trunc_shl_32_i32_i64(i64 %val) {
auto-generate checks llvm-svn: 281755
2016-09-17 01:48:16 +08:00
; CHECK-LABEL: @trunc_shl_32_i32_i64(
; CHECK-NEXT: ret i32 0
;
Reapply "InstCombine: Reduce trunc (shl x, K) width." This reapplies r272987 with a fix for infinitely looping when the truncated value is another shift of a constant. llvm-svn: 281379
2016-09-14 03:43:57 +08:00
%shl = shl i64 %val, 32
%trunc = trunc i64 %shl to i32
ret i32 %trunc
}
; TODO: Should be able to handle vectors
define <2 x i32> @trunc_shl_16_v2i32_v2i64(<2 x i64> %val) {
auto-generate checks llvm-svn: 281755
2016-09-17 01:48:16 +08:00
; CHECK-LABEL: @trunc_shl_16_v2i32_v2i64(
; CHECK-NEXT: [[SHL:%.*]] = shl <2 x i64> %val, <i64 16, i64 16>
; CHECK-NEXT: [[TRUNC:%.*]] = trunc <2 x i64> [[SHL]] to <2 x i32>
; CHECK-NEXT: ret <2 x i32> [[TRUNC]]
;
Reapply "InstCombine: Reduce trunc (shl x, K) width." This reapplies r272987 with a fix for infinitely looping when the truncated value is another shift of a constant. llvm-svn: 281379
2016-09-14 03:43:57 +08:00
%shl = shl <2 x i64> %val, <i64 16, i64 16>
%trunc = trunc <2 x i64> %shl to <2 x i32>
ret <2 x i32> %trunc
}
define <2 x i32> @trunc_shl_nosplat_v2i32_v2i64(<2 x i64> %val) {
auto-generate checks llvm-svn: 281755
2016-09-17 01:48:16 +08:00
; CHECK-LABEL: @trunc_shl_nosplat_v2i32_v2i64(
; CHECK-NEXT: [[SHL:%.*]] = shl <2 x i64> %val, <i64 15, i64 16>
; CHECK-NEXT: [[TRUNC:%.*]] = trunc <2 x i64> [[SHL]] to <2 x i32>
; CHECK-NEXT: ret <2 x i32> [[TRUNC]]
;
Reapply "InstCombine: Reduce trunc (shl x, K) width." This reapplies r272987 with a fix for infinitely looping when the truncated value is another shift of a constant. llvm-svn: 281379
2016-09-14 03:43:57 +08:00
%shl = shl <2 x i64> %val, <i64 15, i64 16>
%trunc = trunc <2 x i64> %shl to <2 x i32>
ret <2 x i32> %trunc
}
define void @trunc_shl_31_i32_i64_multi_use(i64 %val, i32 addrspace(1)* %ptr0, i64 addrspace(1)* %ptr1) {
auto-generate checks llvm-svn: 281755
2016-09-17 01:48:16 +08:00
; CHECK-LABEL: @trunc_shl_31_i32_i64_multi_use(
; CHECK-NEXT: [[SHL:%.*]] = shl i64 %val, 31
; CHECK-NEXT: [[TRUNC:%.*]] = trunc i64 [[SHL]] to i32
; CHECK-NEXT: store volatile i32 [[TRUNC]], i32 addrspace(1)* %ptr0, align 4
; CHECK-NEXT: store volatile i64 [[SHL]], i64 addrspace(1)* %ptr1, align 8
; CHECK-NEXT: ret void
;
Reapply "InstCombine: Reduce trunc (shl x, K) width." This reapplies r272987 with a fix for infinitely looping when the truncated value is another shift of a constant. llvm-svn: 281379
2016-09-14 03:43:57 +08:00
%shl = shl i64 %val, 31
%trunc = trunc i64 %shl to i32
store volatile i32 %trunc, i32 addrspace(1)* %ptr0
store volatile i64 %shl, i64 addrspace(1)* %ptr1
ret void
}
define i32 @trunc_shl_lshr_infloop(i64 %arg) {
auto-generate checks llvm-svn: 281755
2016-09-17 01:48:16 +08:00
; CHECK-LABEL: @trunc_shl_lshr_infloop(
; CHECK-NEXT: [[TMP0:%.*]] = lshr i64 %arg, 1
; CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[TMP0]], 2
; CHECK-NEXT: [[TMP2:%.*]] = trunc i64 [[TMP1]] to i32
; CHECK-NEXT: ret i32 [[TMP2]]
;
Reapply "InstCombine: Reduce trunc (shl x, K) width." This reapplies r272987 with a fix for infinitely looping when the truncated value is another shift of a constant. llvm-svn: 281379
2016-09-14 03:43:57 +08:00
%tmp0 = lshr i64 %arg, 1
%tmp1 = shl i64 %tmp0, 2
%tmp2 = trunc i64 %tmp1 to i32
ret i32 %tmp2
}
define i32 @trunc_shl_ashr_infloop(i64 %arg) {
auto-generate checks llvm-svn: 281755
2016-09-17 01:48:16 +08:00
; CHECK-LABEL: @trunc_shl_ashr_infloop(
; CHECK-NEXT: [[TMP0:%.*]] = ashr i64 %arg, 3
; CHECK-NEXT: [[TMP1:%.*]] = shl nsw i64 [[TMP0]], 2
; CHECK-NEXT: [[TMP2:%.*]] = trunc i64 [[TMP1]] to i32
; CHECK-NEXT: ret i32 [[TMP2]]
;
Reapply "InstCombine: Reduce trunc (shl x, K) width." This reapplies r272987 with a fix for infinitely looping when the truncated value is another shift of a constant. llvm-svn: 281379
2016-09-14 03:43:57 +08:00
%tmp0 = ashr i64 %arg, 3
%tmp1 = shl i64 %tmp0, 2
%tmp2 = trunc i64 %tmp1 to i32
ret i32 %tmp2
}
define i32 @trunc_shl_shl_infloop(i64 %arg) {
auto-generate checks llvm-svn: 281755
2016-09-17 01:48:16 +08:00
; CHECK-LABEL: @trunc_shl_shl_infloop(
; CHECK-NEXT: [[ARG_TR:%.*]] = trunc i64 %arg to i32
; CHECK-NEXT: [[TMP2:%.*]] = shl i32 [[ARG_TR]], 3
; CHECK-NEXT: ret i32 [[TMP2]]
;
Reapply "InstCombine: Reduce trunc (shl x, K) width." This reapplies r272987 with a fix for infinitely looping when the truncated value is another shift of a constant. llvm-svn: 281379
2016-09-14 03:43:57 +08:00
%tmp0 = shl i64 %arg, 1
%tmp1 = shl i64 %tmp0, 2
%tmp2 = trunc i64 %tmp1 to i32
ret i32 %tmp2
}
define i32 @trunc_shl_lshr_var(i64 %arg, i64 %val) {
auto-generate checks llvm-svn: 281755
2016-09-17 01:48:16 +08:00
; CHECK-LABEL: @trunc_shl_lshr_var(
; CHECK-NEXT: [[TMP0:%.*]] = lshr i64 %arg, %val
; CHECK-NEXT: [[TMP0_TR:%.*]] = trunc i64 [[TMP0]] to i32
; CHECK-NEXT: [[TMP2:%.*]] = shl i32 [[TMP0_TR]], 2
; CHECK-NEXT: ret i32 [[TMP2]]
;
Reapply "InstCombine: Reduce trunc (shl x, K) width." This reapplies r272987 with a fix for infinitely looping when the truncated value is another shift of a constant. llvm-svn: 281379
2016-09-14 03:43:57 +08:00
%tmp0 = lshr i64 %arg, %val
%tmp1 = shl i64 %tmp0, 2
%tmp2 = trunc i64 %tmp1 to i32
ret i32 %tmp2
}
define i32 @trunc_shl_ashr_var(i64 %arg, i64 %val) {
auto-generate checks llvm-svn: 281755
2016-09-17 01:48:16 +08:00
; CHECK-LABEL: @trunc_shl_ashr_var(
; CHECK-NEXT: [[TMP0:%.*]] = ashr i64 %arg, %val
; CHECK-NEXT: [[TMP0_TR:%.*]] = trunc i64 [[TMP0]] to i32
; CHECK-NEXT: [[TMP2:%.*]] = shl i32 [[TMP0_TR]], 2
; CHECK-NEXT: ret i32 [[TMP2]]
;
Reapply "InstCombine: Reduce trunc (shl x, K) width." This reapplies r272987 with a fix for infinitely looping when the truncated value is another shift of a constant. llvm-svn: 281379
2016-09-14 03:43:57 +08:00
%tmp0 = ashr i64 %arg, %val
%tmp1 = shl i64 %tmp0, 2
%tmp2 = trunc i64 %tmp1 to i32
ret i32 %tmp2
}
define i32 @trunc_shl_shl_var(i64 %arg, i64 %val) {
auto-generate checks llvm-svn: 281755
2016-09-17 01:48:16 +08:00
; CHECK-LABEL: @trunc_shl_shl_var(
; CHECK-NEXT: [[TMP0:%.*]] = shl i64 %arg, %val
; CHECK-NEXT: [[TMP0_TR:%.*]] = trunc i64 [[TMP0]] to i32
; CHECK-NEXT: [[TMP2:%.*]] = shl i32 [[TMP0_TR]], 2
; CHECK-NEXT: ret i32 [[TMP2]]
;
Reapply "InstCombine: Reduce trunc (shl x, K) width." This reapplies r272987 with a fix for infinitely looping when the truncated value is another shift of a constant. llvm-svn: 281379
2016-09-14 03:43:57 +08:00
%tmp0 = shl i64 %arg, %val
%tmp1 = shl i64 %tmp0, 2
%tmp2 = trunc i64 %tmp1 to i32
ret i32 %tmp2
}
define <8 x i16> @trunc_shl_v8i15_v8i32_15(<8 x i32> %a) {
auto-generate checks llvm-svn: 281755
2016-09-17 01:48:16 +08:00
; CHECK-LABEL: @trunc_shl_v8i15_v8i32_15(
; CHECK-NEXT: [[SHL:%.*]] = shl <8 x i32> %a, <i32 15, i32 15, i32 15, i32 15, i32 15, i32 15, i32 15, i32 15>
; CHECK-NEXT: [[CONV:%.*]] = trunc <8 x i32> [[SHL]] to <8 x i16>
; CHECK-NEXT: ret <8 x i16> [[CONV]]
;
Reapply "InstCombine: Reduce trunc (shl x, K) width." This reapplies r272987 with a fix for infinitely looping when the truncated value is another shift of a constant. llvm-svn: 281379
2016-09-14 03:43:57 +08:00
%shl = shl <8 x i32> %a, <i32 15, i32 15, i32 15, i32 15, i32 15, i32 15, i32 15, i32 15>
%conv = trunc <8 x i32> %shl to <8 x i16>
ret <8 x i16> %conv
}
define <8 x i16> @trunc_shl_v8i16_v8i32_16(<8 x i32> %a) {
auto-generate checks llvm-svn: 281755
2016-09-17 01:48:16 +08:00
; CHECK-LABEL: @trunc_shl_v8i16_v8i32_16(
[InstCombine] allow vector types for constant folding / computeKnownBits (PR24942) computeKnownBits() already works for integer vectors, so allow vector types when calling that from InstCombine. I don't think the change to use m_APInt in computeKnownBits is strictly necessary because we do check for ConstantVector later, but it's more efficient to handle the splat case without needing to loop on vector elements. This should work with InstSimplify, but doesn't yet, so I made that a FIXME comment on the test for PR24942: https://llvm.org/bugs/show_bug.cgi?id=24942 Differential Revision: https://reviews.llvm.org/D24677 llvm-svn: 281777
2016-09-17 05:20:36 +08:00
; CHECK-NEXT: ret <8 x i16> zeroinitializer
auto-generate checks llvm-svn: 281755
2016-09-17 01:48:16 +08:00
;
Reapply "InstCombine: Reduce trunc (shl x, K) width." This reapplies r272987 with a fix for infinitely looping when the truncated value is another shift of a constant. llvm-svn: 281379
2016-09-14 03:43:57 +08:00
%shl = shl <8 x i32> %a, <i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16>
%conv = trunc <8 x i32> %shl to <8 x i16>
ret <8 x i16> %conv
}
define <8 x i16> @trunc_shl_v8i16_v8i32_17(<8 x i32> %a) {
auto-generate checks llvm-svn: 281755
2016-09-17 01:48:16 +08:00
; CHECK-LABEL: @trunc_shl_v8i16_v8i32_17(
[InstCombine] allow vector types for constant folding / computeKnownBits (PR24942) computeKnownBits() already works for integer vectors, so allow vector types when calling that from InstCombine. I don't think the change to use m_APInt in computeKnownBits is strictly necessary because we do check for ConstantVector later, but it's more efficient to handle the splat case without needing to loop on vector elements. This should work with InstSimplify, but doesn't yet, so I made that a FIXME comment on the test for PR24942: https://llvm.org/bugs/show_bug.cgi?id=24942 Differential Revision: https://reviews.llvm.org/D24677 llvm-svn: 281777
2016-09-17 05:20:36 +08:00
; CHECK-NEXT: ret <8 x i16> zeroinitializer
auto-generate checks llvm-svn: 281755
2016-09-17 01:48:16 +08:00
;
Reapply "InstCombine: Reduce trunc (shl x, K) width." This reapplies r272987 with a fix for infinitely looping when the truncated value is another shift of a constant. llvm-svn: 281379
2016-09-14 03:43:57 +08:00
%shl = shl <8 x i32> %a, <i32 17, i32 17, i32 17, i32 17, i32 17, i32 17, i32 17, i32 17>
%conv = trunc <8 x i32> %shl to <8 x i16>
ret <8 x i16> %conv
}
define <8 x i16> @trunc_shl_v8i16_v8i32_4(<8 x i32> %a) {
auto-generate checks llvm-svn: 281755
2016-09-17 01:48:16 +08:00
; CHECK-LABEL: @trunc_shl_v8i16_v8i32_4(
; CHECK-NEXT: [[SHL:%.*]] = shl <8 x i32> %a, <i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4>
; CHECK-NEXT: [[CONV:%.*]] = trunc <8 x i32> [[SHL]] to <8 x i16>
; CHECK-NEXT: ret <8 x i16> [[CONV]]
;
Reapply "InstCombine: Reduce trunc (shl x, K) width." This reapplies r272987 with a fix for infinitely looping when the truncated value is another shift of a constant. llvm-svn: 281379
2016-09-14 03:43:57 +08:00
%shl = shl <8 x i32> %a, <i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4>
%conv = trunc <8 x i32> %shl to <8 x i16>
ret <8 x i16> %conv
Add looping testcase that broke in r272987 llvm-svn: 273081
2016-06-18 13:15:58 +08:00
}
auto-generate checks llvm-svn: 281755
2016-09-17 01:48:16 +08:00
[InstCombine] update trunc(shuffle) tests to reflect IR reality; NFC We're ok shrinking splats, but not shuffles in general. See https://reviews.llvm.org/D30123 for discussion. llvm-svn: 295547
2017-02-18 23:24:31 +08:00
; Although the mask is the same value, we don't create a shuffle for types that the backend may not be able to handle:
; trunc (shuffle X, C, Mask) --> shuffle (trunc X), C', Mask
[InstCombine] add tests for trunc(shuffle X, C, M); NFC llvm-svn: 295513
2017-02-18 07:16:54 +08:00
[InstCombine] update trunc(shuffle) tests to reflect IR reality; NFC We're ok shrinking splats, but not shuffles in general. See https://reviews.llvm.org/D30123 for discussion. llvm-svn: 295547
2017-02-18 23:24:31 +08:00
define <4 x i8> @wide_shuf(<4 x i32> %x) {
; CHECK-LABEL: @wide_shuf(
[InstCombine] add tests for trunc(shuffle X, C, M); NFC llvm-svn: 295513
2017-02-18 07:16:54 +08:00
; CHECK-NEXT: [[SHUF:%.*]] = shufflevector <4 x i32> %x, <4 x i32> <i32 undef, i32 3634, i32 90, i32 undef>, <4 x i32> <i32 1, i32 5, i32 6, i32 2>
; CHECK-NEXT: [[TRUNC:%.*]] = trunc <4 x i32> [[SHUF]] to <4 x i8>
; CHECK-NEXT: ret <4 x i8> [[TRUNC]]
;
%shuf = shufflevector <4 x i32> %x, <4 x i32> <i32 35, i32 3634, i32 90, i32 -1>, <4 x i32> <i32 1, i32 5, i32 6, i32 2>
%trunc = trunc <4 x i32> %shuf to <4 x i8>
ret <4 x i8> %trunc
}
[InstCombine] update trunc(shuffle) tests to reflect IR reality; NFC We're ok shrinking splats, but not shuffles in general. See https://reviews.llvm.org/D30123 for discussion. llvm-svn: 295547
2017-02-18 23:24:31 +08:00
; trunc (shuffle X, undef, SplatMask) --> shuffle (trunc X), undef, SplatMask
[InstCombine] add tests for trunc(shuffle X, C, M); NFC llvm-svn: 295513
2017-02-18 07:16:54 +08:00
[InstCombine] update trunc(shuffle) tests to reflect IR reality; NFC We're ok shrinking splats, but not shuffles in general. See https://reviews.llvm.org/D30123 for discussion. llvm-svn: 295547
2017-02-18 23:24:31 +08:00
define <4 x i8> @wide_splat1(<4 x i32> %x) {
; CHECK-LABEL: @wide_splat1(
[InstCombine] shrink truncated splat shuffle (2nd try) This was committed at r297155 and reverted at r297166 because of an over-reaching clang test. That should be fixed with r297189. This is one part of solving a recent bug report: http://lists.llvm.org/pipermail/llvm-dev/2017-February/110293.html This keeps with our general approach: changing arbitrary shuffles is off-limts, but changing splat is ok. The transform is very similar to the existing shrinkBitwiseLogic() canonicalization. Differential Revision: https://reviews.llvm.org/D30123 llvm-svn: 297232
2017-03-08 05:45:16 +08:00
; CHECK-NEXT: [[TMP1:%.*]] = trunc <4 x i32> %x to <4 x i8>
; CHECK-NEXT: [[TRUNC:%.*]] = shufflevector <4 x i8> [[TMP1]], <4 x i8> undef, <4 x i32> <i32 2, i32 2, i32 2, i32 2>
[InstCombine] add tests for trunc(shuffle X, C, M); NFC llvm-svn: 295513
2017-02-18 07:16:54 +08:00
; CHECK-NEXT: ret <4 x i8> [[TRUNC]]
;
[InstCombine] update trunc(shuffle) tests to reflect IR reality; NFC We're ok shrinking splats, but not shuffles in general. See https://reviews.llvm.org/D30123 for discussion. llvm-svn: 295547
2017-02-18 23:24:31 +08:00
%shuf = shufflevector <4 x i32> %x, <4 x i32> undef, <4 x i32> <i32 2, i32 2, i32 2, i32 2>
[InstCombine] add tests for trunc(shuffle X, C, M); NFC llvm-svn: 295513
2017-02-18 07:16:54 +08:00
%trunc = trunc <4 x i32> %shuf to <4 x i8>
ret <4 x i8> %trunc
}
[InstCombine] update trunc(shuffle) tests to reflect IR reality; NFC We're ok shrinking splats, but not shuffles in general. See https://reviews.llvm.org/D30123 for discussion. llvm-svn: 295547
2017-02-18 23:24:31 +08:00
; Test weird types.
; trunc (shuffle X, undef, SplatMask) --> shuffle (trunc X), undef, SplatMask
define <3 x i31> @wide_splat2(<3 x i33> %x) {
; CHECK-LABEL: @wide_splat2(
[InstCombine] shrink truncated splat shuffle (2nd try) This was committed at r297155 and reverted at r297166 because of an over-reaching clang test. That should be fixed with r297189. This is one part of solving a recent bug report: http://lists.llvm.org/pipermail/llvm-dev/2017-February/110293.html This keeps with our general approach: changing arbitrary shuffles is off-limts, but changing splat is ok. The transform is very similar to the existing shrinkBitwiseLogic() canonicalization. Differential Revision: https://reviews.llvm.org/D30123 llvm-svn: 297232
2017-03-08 05:45:16 +08:00
; CHECK-NEXT: [[TMP1:%.*]] = trunc <3 x i33> %x to <3 x i31>
; CHECK-NEXT: [[TRUNC:%.*]] = shufflevector <3 x i31> [[TMP1]], <3 x i31> undef, <3 x i32> <i32 1, i32 1, i32 1>
[InstCombine] update trunc(shuffle) tests to reflect IR reality; NFC We're ok shrinking splats, but not shuffles in general. See https://reviews.llvm.org/D30123 for discussion. llvm-svn: 295547
2017-02-18 23:24:31 +08:00
; CHECK-NEXT: ret <3 x i31> [[TRUNC]]
;
%shuf = shufflevector <3 x i33> %x, <3 x i33> undef, <3 x i32> <i32 1, i32 1, i32 1>
%trunc = trunc <3 x i33> %shuf to <3 x i31>
ret <3 x i31> %trunc
}
; FIXME:
; trunc (shuffle X, undef, SplatMask) --> shuffle (trunc X), undef, SplatMask
; A mask with undef elements should still be considered a splat mask.
define <3 x i31> @wide_splat3(<3 x i33> %x) {
; CHECK-LABEL: @wide_splat3(
; CHECK-NEXT: [[SHUF:%.*]] = shufflevector <3 x i33> %x, <3 x i33> undef, <3 x i32> <i32 undef, i32 1, i32 1>
; CHECK-NEXT: [[TRUNC:%.*]] = trunc <3 x i33> [[SHUF]] to <3 x i31>
; CHECK-NEXT: ret <3 x i31> [[TRUNC]]
;
%shuf = shufflevector <3 x i33> %x, <3 x i33> undef, <3 x i32> <i32 undef, i32 1, i32 1>
%trunc = trunc <3 x i33> %shuf to <3 x i31>
ret <3 x i31> %trunc
}
[InstCombine] avoid crashing on shuffle shrinkage when input type is not same as result type llvm-svn: 297280
2017-03-08 23:02:23 +08:00
; TODO: The shuffle extends the length of the input vector. Should we shrink this?
define <8 x i8> @wide_lengthening_splat(<4 x i16> %v) {
; CHECK-LABEL: @wide_lengthening_splat(
; CHECK-NEXT: [[SHUF:%.*]] = shufflevector <4 x i16> %v, <4 x i16> undef, <8 x i32> zeroinitializer
; CHECK-NEXT: [[TR:%.*]] = trunc <8 x i16> [[SHUF]] to <8 x i8>
; CHECK-NEXT: ret <8 x i8> [[TR]]
;
%shuf = shufflevector <4 x i16> %v, <4 x i16> %v, <8 x i32> zeroinitializer
%tr = trunc <8 x i16> %shuf to <8 x i8>
ret <8 x i8> %tr
}
[InstCombine] add vector tests for truncated math; NFC llvm-svn: 310122
2017-08-05 04:38:33 +08:00
define <2 x i8> @narrow_add_vec_constant(<2 x i32> %x) {
; CHECK-LABEL: @narrow_add_vec_constant(
[InstCombine] narrow truncated add/sub/mul with constant Name: narrow_sub %sub = sub i32 C1, %x %r = trunc i32 %sub to i8 => %xn = trunc i32 %x to i8 %narrowC = trunc i32 C1 to i8 %r = sub i8 %narrowC, %xn Name: narrow_add %add = add i32 %x, C1 %r = trunc i32 %add to i8 => %xn = trunc i32 %x to i8 %narrowC = trunc i32 C1 to i8 %r = add i8 %xn, %narrowC Name: narrow_mul %mul = mul i32 %x, C1 %r = trunc i32 %mul to i8 => %xn = trunc i32 %x to i8 %narrowC = trunc i32 C1 to i8 %r = mul i8 %xn, %narrowC http://rise4fun.com/Alive/QpS This doesn't solve PR34046 (failure to recognize rotate): https://bugs.llvm.org/show_bug.cgi?id=34046 ...but it reduces an extra complication in the description examples to a form that we can more easily match. llvm-svn: 310141
2017-08-05 06:30:34 +08:00
; CHECK-NEXT: [[TMP1:%.*]] = trunc <2 x i32> %x to <2 x i8>
; CHECK-NEXT: [[TR:%.*]] = add <2 x i8> [[TMP1]], <i8 0, i8 127>
[InstCombine] add vector tests for truncated math; NFC llvm-svn: 310122
2017-08-05 04:38:33 +08:00
; CHECK-NEXT: ret <2 x i8> [[TR]]
;
%add = add <2 x i32> %x, <i32 256, i32 -129>
%tr = trunc <2 x i32> %add to <2 x i8>
ret <2 x i8> %tr
}
[InstCombine] narrow truncated add/sub/mul with constant Name: narrow_sub %sub = sub i32 C1, %x %r = trunc i32 %sub to i8 => %xn = trunc i32 %x to i8 %narrowC = trunc i32 C1 to i8 %r = sub i8 %narrowC, %xn Name: narrow_add %add = add i32 %x, C1 %r = trunc i32 %add to i8 => %xn = trunc i32 %x to i8 %narrowC = trunc i32 C1 to i8 %r = add i8 %xn, %narrowC Name: narrow_mul %mul = mul i32 %x, C1 %r = trunc i32 %mul to i8 => %xn = trunc i32 %x to i8 %narrowC = trunc i32 C1 to i8 %r = mul i8 %xn, %narrowC http://rise4fun.com/Alive/QpS This doesn't solve PR34046 (failure to recognize rotate): https://bugs.llvm.org/show_bug.cgi?id=34046 ...but it reduces an extra complication in the description examples to a form that we can more easily match. llvm-svn: 310141
2017-08-05 06:30:34 +08:00
define <2 x i8> @narrow_mul_vec_constant(<2 x i32> %x) {
; CHECK-LABEL: @narrow_mul_vec_constant(
; CHECK-NEXT: [[TMP1:%.*]] = trunc <2 x i32> %x to <2 x i8>
; CHECK-NEXT: [[TR:%.*]] = mul <2 x i8> [[TMP1]], <i8 0, i8 127>
; CHECK-NEXT: ret <2 x i8> [[TR]]
;
%add = mul <2 x i32> %x, <i32 256, i32 -129>
%tr = trunc <2 x i32> %add to <2 x i8>
ret <2 x i8> %tr
}
[InstCombine] add vector tests for truncated math; NFC llvm-svn: 310122
2017-08-05 04:38:33 +08:00
define <2 x i8> @narrow_sub_vec_constant(<2 x i32> %x) {
; CHECK-LABEL: @narrow_sub_vec_constant(
[InstCombine] narrow truncated add/sub/mul with constant Name: narrow_sub %sub = sub i32 C1, %x %r = trunc i32 %sub to i8 => %xn = trunc i32 %x to i8 %narrowC = trunc i32 C1 to i8 %r = sub i8 %narrowC, %xn Name: narrow_add %add = add i32 %x, C1 %r = trunc i32 %add to i8 => %xn = trunc i32 %x to i8 %narrowC = trunc i32 C1 to i8 %r = add i8 %xn, %narrowC Name: narrow_mul %mul = mul i32 %x, C1 %r = trunc i32 %mul to i8 => %xn = trunc i32 %x to i8 %narrowC = trunc i32 C1 to i8 %r = mul i8 %xn, %narrowC http://rise4fun.com/Alive/QpS This doesn't solve PR34046 (failure to recognize rotate): https://bugs.llvm.org/show_bug.cgi?id=34046 ...but it reduces an extra complication in the description examples to a form that we can more easily match. llvm-svn: 310141
2017-08-05 06:30:34 +08:00
; CHECK-NEXT: [[TMP1:%.*]] = trunc <2 x i32> %x to <2 x i8>
; CHECK-NEXT: [[TR:%.*]] = sub <2 x i8> <i8 0, i8 127>, [[TMP1]]
[InstCombine] add vector tests for truncated math; NFC llvm-svn: 310122
2017-08-05 04:38:33 +08:00
; CHECK-NEXT: ret <2 x i8> [[TR]]
;
%sub = sub <2 x i32> <i32 256, i32 -129>, %x
%tr = trunc <2 x i32> %sub to <2 x i8>
ret <2 x i8> %tr
}