2018-08-29 02:34:24 +08:00
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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -mtriple=amdgcn-amd-amdhsa -verify-machineinstrs -run-pass si-fold-operands,dead-mi-elimination %s -o - | FileCheck -check-prefix=GCN %s
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---
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# Uses a carry out in an instruction that can't be shrunk.
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name: shrink_scalar_imm_vgpr_v_add_i32_e64_other_carry_out_use
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tracksRegLiveness: true
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body: |
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bb.0:
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; GCN-LABEL: name: shrink_scalar_imm_vgpr_v_add_i32_e64_other_carry_out_use
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; GCN: [[S_MOV_B32_:%[0-9]+]]:sreg_32_xm0 = S_MOV_B32 12345
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; GCN: [[DEF:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF
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2018-08-29 02:44:16 +08:00
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; GCN: [[V_ADD_I32_e32_:%[0-9]+]]:vgpr_32 = V_ADD_I32_e32 [[S_MOV_B32_]], [[DEF]], implicit-def $vcc, implicit $exec
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; GCN: [[COPY:%[0-9]+]]:sreg_64_xexec = COPY killed $vcc
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[AMDGPU] Add support for immediate operand for S_ENDPGM
Summary:
Add support for immediate operand in S_ENDPGM
Change-Id: I0c56a076a10980f719fb2a8f16407e9c301013f6
Reviewers: alexshap
Subscribers: qcolombet, arsenm, kzhuravl, jvesely, wdng, nhaehnle, yaxunl, tpr, t-tye, eraman, arphaman, Petar.Avramovic, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D59213
llvm-svn: 355902
2019-03-12 17:52:58 +08:00
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; GCN: S_ENDPGM 0, implicit [[COPY]]
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2018-08-29 02:34:24 +08:00
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%0:sreg_32_xm0 = S_MOV_B32 12345
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%1:vgpr_32 = IMPLICIT_DEF
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%2:vgpr_32 = IMPLICIT_DEF
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%3:vgpr_32 = IMPLICIT_DEF
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2019-03-19 03:35:44 +08:00
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%4:vgpr_32, %5:sreg_64_xexec = V_ADD_I32_e64 %0, %1, 0, implicit $exec
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[AMDGPU] Add support for immediate operand for S_ENDPGM
Summary:
Add support for immediate operand in S_ENDPGM
Change-Id: I0c56a076a10980f719fb2a8f16407e9c301013f6
Reviewers: alexshap
Subscribers: qcolombet, arsenm, kzhuravl, jvesely, wdng, nhaehnle, yaxunl, tpr, t-tye, eraman, arphaman, Petar.Avramovic, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D59213
llvm-svn: 355902
2019-03-12 17:52:58 +08:00
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S_ENDPGM 0, implicit %5
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2018-08-29 02:34:24 +08:00
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...
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---
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2018-08-29 02:44:16 +08:00
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name: shrink_scalar_imm_multi_use_with_used_carry
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tracksRegLiveness: true
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body: |
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bb.0:
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; GCN-LABEL: name: shrink_scalar_imm_multi_use_with_used_carry
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; GCN: [[S_MOV_B32_:%[0-9]+]]:sreg_32_xm0 = S_MOV_B32 12345
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; GCN: [[DEF:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF
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; GCN: [[DEF1:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF
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2019-03-19 03:35:44 +08:00
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; GCN: [[V_ADD_I32_e64_:%[0-9]+]]:vgpr_32, [[V_ADD_I32_e64_1:%[0-9]+]]:sreg_64_xexec = V_ADD_I32_e64 [[S_MOV_B32_]], [[DEF]], 0, implicit $exec
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; GCN: [[V_ADD_I32_e64_2:%[0-9]+]]:vgpr_32, [[V_ADD_I32_e64_3:%[0-9]+]]:sreg_64_xexec = V_ADD_I32_e64 [[S_MOV_B32_]], [[DEF1]], 0, implicit $exec
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[AMDGPU] Add support for immediate operand for S_ENDPGM
Summary:
Add support for immediate operand in S_ENDPGM
Change-Id: I0c56a076a10980f719fb2a8f16407e9c301013f6
Reviewers: alexshap
Subscribers: qcolombet, arsenm, kzhuravl, jvesely, wdng, nhaehnle, yaxunl, tpr, t-tye, eraman, arphaman, Petar.Avramovic, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D59213
llvm-svn: 355902
2019-03-12 17:52:58 +08:00
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; GCN: S_ENDPGM 0, implicit [[V_ADD_I32_e64_1]], implicit [[V_ADD_I32_e64_2]]
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2018-08-29 02:44:16 +08:00
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%0:sreg_32_xm0 = S_MOV_B32 12345
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%1:vgpr_32 = IMPLICIT_DEF
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%2:vgpr_32 = IMPLICIT_DEF
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%3:vgpr_32 = IMPLICIT_DEF
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%4:vgpr_32 = IMPLICIT_DEF
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2019-03-19 03:35:44 +08:00
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%5:vgpr_32, %6:sreg_64_xexec = V_ADD_I32_e64 %0, %1, 0, implicit $exec
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%7:vgpr_32, %8:sreg_64_xexec = V_ADD_I32_e64 %0, %2, 0, implicit $exec
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[AMDGPU] Add support for immediate operand for S_ENDPGM
Summary:
Add support for immediate operand in S_ENDPGM
Change-Id: I0c56a076a10980f719fb2a8f16407e9c301013f6
Reviewers: alexshap
Subscribers: qcolombet, arsenm, kzhuravl, jvesely, wdng, nhaehnle, yaxunl, tpr, t-tye, eraman, arphaman, Petar.Avramovic, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D59213
llvm-svn: 355902
2019-03-12 17:52:58 +08:00
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S_ENDPGM 0, implicit %6, implicit %7
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2018-08-29 02:44:16 +08:00
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...
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---
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2018-08-29 02:34:24 +08:00
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# TODO: Is it OK to leave the broken use around on the DBG_VALUE?
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name: shrink_scalar_imm_vgpr_v_add_i32_e64_dbg_only_carry_out_use
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tracksRegLiveness: true
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body: |
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bb.0:
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; GCN-LABEL: name: shrink_scalar_imm_vgpr_v_add_i32_e64_dbg_only_carry_out_use
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; GCN: [[S_MOV_B32_:%[0-9]+]]:sreg_32_xm0 = S_MOV_B32 12345
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; GCN: [[DEF:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF
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; GCN: [[V_ADD_I32_e32_:%[0-9]+]]:vgpr_32 = V_ADD_I32_e32 [[S_MOV_B32_]], [[DEF]], implicit-def $vcc, implicit $exec
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2018-10-31 07:28:27 +08:00
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; GCN: DBG_VALUE %5:sreg_64_xexec, $noreg
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[AMDGPU] Add support for immediate operand for S_ENDPGM
Summary:
Add support for immediate operand in S_ENDPGM
Change-Id: I0c56a076a10980f719fb2a8f16407e9c301013f6
Reviewers: alexshap
Subscribers: qcolombet, arsenm, kzhuravl, jvesely, wdng, nhaehnle, yaxunl, tpr, t-tye, eraman, arphaman, Petar.Avramovic, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D59213
llvm-svn: 355902
2019-03-12 17:52:58 +08:00
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; GCN: S_ENDPGM 0, implicit [[V_ADD_I32_e32_]]
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2018-08-29 02:34:24 +08:00
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%0:sreg_32_xm0 = S_MOV_B32 12345
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%1:vgpr_32 = IMPLICIT_DEF
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%2:vgpr_32 = IMPLICIT_DEF
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%3:vgpr_32 = IMPLICIT_DEF
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2019-03-19 03:35:44 +08:00
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%4:vgpr_32, %5:sreg_64_xexec = V_ADD_I32_e64 %0, %1, 0, implicit $exec
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2018-10-31 07:28:27 +08:00
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DBG_VALUE %5, $noreg
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[AMDGPU] Add support for immediate operand for S_ENDPGM
Summary:
Add support for immediate operand in S_ENDPGM
Change-Id: I0c56a076a10980f719fb2a8f16407e9c301013f6
Reviewers: alexshap
Subscribers: qcolombet, arsenm, kzhuravl, jvesely, wdng, nhaehnle, yaxunl, tpr, t-tye, eraman, arphaman, Petar.Avramovic, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D59213
llvm-svn: 355902
2019-03-12 17:52:58 +08:00
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S_ENDPGM 0, implicit %4
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2018-08-29 02:34:24 +08:00
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...
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---
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# Uses carry out in a normal pattern
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name: shrink_scalar_imm_vgpr_v_add_i32_e64_carry_out_use
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tracksRegLiveness: true
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body: |
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bb.0:
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; GCN-LABEL: name: shrink_scalar_imm_vgpr_v_add_i32_e64_carry_out_use
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; GCN: [[S_MOV_B32_:%[0-9]+]]:sreg_32_xm0 = S_MOV_B32 12345
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; GCN: [[DEF:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF
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; GCN: [[DEF1:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF
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; GCN: [[DEF2:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF
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2018-08-29 02:44:16 +08:00
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; GCN: [[V_ADD_I32_e32_:%[0-9]+]]:vgpr_32 = V_ADD_I32_e32 [[S_MOV_B32_]], [[DEF]], implicit-def $vcc, implicit $exec
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; GCN: [[COPY:%[0-9]+]]:sreg_64_xexec = COPY killed $vcc
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2019-03-19 03:35:44 +08:00
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; GCN: [[V_ADDC_U32_e64_:%[0-9]+]]:vgpr_32, [[V_ADDC_U32_e64_1:%[0-9]+]]:sreg_64_xexec = V_ADDC_U32_e64 [[DEF1]], [[DEF2]], [[COPY]], 0, implicit $exec
|
[AMDGPU] Add support for immediate operand for S_ENDPGM
Summary:
Add support for immediate operand in S_ENDPGM
Change-Id: I0c56a076a10980f719fb2a8f16407e9c301013f6
Reviewers: alexshap
Subscribers: qcolombet, arsenm, kzhuravl, jvesely, wdng, nhaehnle, yaxunl, tpr, t-tye, eraman, arphaman, Petar.Avramovic, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D59213
llvm-svn: 355902
2019-03-12 17:52:58 +08:00
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; GCN: S_ENDPGM 0, implicit [[V_ADDC_U32_e64_]]
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2018-08-29 02:34:24 +08:00
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%0:sreg_32_xm0 = S_MOV_B32 12345
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%1:vgpr_32 = IMPLICIT_DEF
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%2:vgpr_32 = IMPLICIT_DEF
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%3:vgpr_32 = IMPLICIT_DEF
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2019-03-19 03:35:44 +08:00
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%4:vgpr_32, %5:sreg_64_xexec = V_ADD_I32_e64 %0, %1, 0, implicit $exec
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%6:vgpr_32, %7:sreg_64_xexec = V_ADDC_U32_e64 %2, %3, %5, 0, implicit $exec
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[AMDGPU] Add support for immediate operand for S_ENDPGM
Summary:
Add support for immediate operand in S_ENDPGM
Change-Id: I0c56a076a10980f719fb2a8f16407e9c301013f6
Reviewers: alexshap
Subscribers: qcolombet, arsenm, kzhuravl, jvesely, wdng, nhaehnle, yaxunl, tpr, t-tye, eraman, arphaman, Petar.Avramovic, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D59213
llvm-svn: 355902
2019-03-12 17:52:58 +08:00
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S_ENDPGM 0, implicit %6
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2018-08-29 02:34:24 +08:00
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...
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