2018-08-13 03:29:53 +08:00
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=amdgcn-- -mcpu=tahiti < %s | FileCheck -check-prefix=SI %s
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; RUN: llc -mtriple=amdgcn-- -mcpu=fiji < %s | FileCheck -check-prefix=VI %s
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2014-12-12 10:30:37 +08:00
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2018-08-13 03:29:53 +08:00
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define amdgpu_kernel void @test_fmin_legacy_uge_f64(double addrspace(1)* %out, double addrspace(1)* %in) #0 {
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; SI-LABEL: test_fmin_legacy_uge_f64:
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; SI: ; %bb.0:
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; SI-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9
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; SI-NEXT: s_mov_b32 s7, 0xf000
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; SI-NEXT: s_mov_b32 s10, 0
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; SI-NEXT: s_mov_b32 s11, s7
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; SI-NEXT: v_lshlrev_b32_e32 v0, 3, v0
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; SI-NEXT: s_waitcnt lgkmcnt(0)
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; SI-NEXT: s_mov_b64 s[8:9], s[2:3]
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; SI-NEXT: v_mov_b32_e32 v1, 0
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; SI-NEXT: buffer_load_dwordx4 v[0:3], v[0:1], s[8:11], 0 addr64
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; SI-NEXT: s_mov_b32 s6, -1
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; SI-NEXT: s_mov_b32 s4, s0
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; SI-NEXT: s_mov_b32 s5, s1
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; SI-NEXT: s_waitcnt vmcnt(0)
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; SI-NEXT: v_cmp_nlt_f64_e32 vcc, v[0:1], v[2:3]
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; SI-NEXT: v_cndmask_b32_e32 v1, v1, v3, vcc
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; SI-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc
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; SI-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0
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; SI-NEXT: s_endpgm
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;
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; VI-LABEL: test_fmin_legacy_uge_f64:
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; VI: ; %bb.0:
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; VI-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24
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; VI-NEXT: v_lshlrev_b32_e32 v0, 3, v0
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; VI-NEXT: s_waitcnt lgkmcnt(0)
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; VI-NEXT: v_mov_b32_e32 v1, s3
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; VI-NEXT: v_add_u32_e32 v0, vcc, s2, v0
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; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc
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; VI-NEXT: flat_load_dwordx4 v[0:3], v[0:1]
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; VI-NEXT: v_mov_b32_e32 v4, s0
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; VI-NEXT: v_mov_b32_e32 v5, s1
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; VI-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
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; VI-NEXT: v_cmp_nlt_f64_e32 vcc, v[0:1], v[2:3]
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; VI-NEXT: v_cndmask_b32_e32 v1, v1, v3, vcc
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; VI-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc
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; VI-NEXT: flat_store_dwordx2 v[4:5], v[0:1]
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; VI-NEXT: s_endpgm
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%tid = call i32 @llvm.amdgcn.workitem.id.x() #1
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%gep.0 = getelementptr double, double addrspace(1)* %in, i32 %tid
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%gep.1 = getelementptr double, double addrspace(1)* %gep.0, i32 1
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%a = load double, double addrspace(1)* %gep.0, align 8
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%b = load double, double addrspace(1)* %gep.1, align 8
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%cmp = fcmp uge double %a, %b
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%val = select i1 %cmp, double %b, double %a
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store double %val, double addrspace(1)* %out, align 8
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ret void
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}
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define amdgpu_kernel void @test_fmin_legacy_ugt_f64(double addrspace(1)* %out, double addrspace(1)* %in) #0 {
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; SI-LABEL: test_fmin_legacy_ugt_f64:
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; SI: ; %bb.0:
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; SI-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9
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; SI-NEXT: s_mov_b32 s7, 0xf000
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; SI-NEXT: s_mov_b32 s10, 0
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; SI-NEXT: s_mov_b32 s11, s7
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; SI-NEXT: v_lshlrev_b32_e32 v0, 3, v0
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; SI-NEXT: s_waitcnt lgkmcnt(0)
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; SI-NEXT: s_mov_b64 s[8:9], s[2:3]
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; SI-NEXT: v_mov_b32_e32 v1, 0
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; SI-NEXT: buffer_load_dwordx4 v[0:3], v[0:1], s[8:11], 0 addr64
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; SI-NEXT: s_mov_b32 s6, -1
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; SI-NEXT: s_mov_b32 s4, s0
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; SI-NEXT: s_mov_b32 s5, s1
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; SI-NEXT: s_waitcnt vmcnt(0)
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; SI-NEXT: v_cmp_nle_f64_e32 vcc, v[0:1], v[2:3]
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; SI-NEXT: v_cndmask_b32_e32 v1, v1, v3, vcc
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; SI-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc
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; SI-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0
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; SI-NEXT: s_endpgm
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;
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; VI-LABEL: test_fmin_legacy_ugt_f64:
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; VI: ; %bb.0:
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; VI-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24
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; VI-NEXT: v_lshlrev_b32_e32 v0, 3, v0
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; VI-NEXT: s_waitcnt lgkmcnt(0)
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; VI-NEXT: v_mov_b32_e32 v1, s3
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; VI-NEXT: v_add_u32_e32 v0, vcc, s2, v0
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; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc
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; VI-NEXT: flat_load_dwordx4 v[0:3], v[0:1]
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; VI-NEXT: v_mov_b32_e32 v4, s0
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; VI-NEXT: v_mov_b32_e32 v5, s1
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; VI-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
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; VI-NEXT: v_cmp_nle_f64_e32 vcc, v[0:1], v[2:3]
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; VI-NEXT: v_cndmask_b32_e32 v1, v1, v3, vcc
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; VI-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc
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; VI-NEXT: flat_store_dwordx2 v[4:5], v[0:1]
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; VI-NEXT: s_endpgm
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%tid = call i32 @llvm.amdgcn.workitem.id.x() #1
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%gep.0 = getelementptr double, double addrspace(1)* %in, i32 %tid
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%gep.1 = getelementptr double, double addrspace(1)* %gep.0, i32 1
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%a = load double, double addrspace(1)* %gep.0, align 8
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%b = load double, double addrspace(1)* %gep.1, align 8
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2014-12-12 10:30:37 +08:00
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2018-08-13 03:29:53 +08:00
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%cmp = fcmp ugt double %a, %b
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%val = select i1 %cmp, double %b, double %a
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store double %val, double addrspace(1)* %out, align 8
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ret void
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2014-12-12 10:30:37 +08:00
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}
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2017-03-22 05:39:51 +08:00
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define amdgpu_kernel void @test_fmin_legacy_ule_f64(double addrspace(1)* %out, double addrspace(1)* %in) #0 {
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2018-08-13 03:29:53 +08:00
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; SI-LABEL: test_fmin_legacy_ule_f64:
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; SI: ; %bb.0:
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; SI-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9
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; SI-NEXT: s_mov_b32 s7, 0xf000
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; SI-NEXT: s_mov_b32 s10, 0
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; SI-NEXT: s_mov_b32 s11, s7
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; SI-NEXT: v_lshlrev_b32_e32 v0, 3, v0
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; SI-NEXT: s_waitcnt lgkmcnt(0)
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; SI-NEXT: s_mov_b64 s[8:9], s[2:3]
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; SI-NEXT: v_mov_b32_e32 v1, 0
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; SI-NEXT: buffer_load_dwordx4 v[0:3], v[0:1], s[8:11], 0 addr64
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; SI-NEXT: s_mov_b32 s6, -1
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; SI-NEXT: s_mov_b32 s4, s0
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; SI-NEXT: s_mov_b32 s5, s1
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; SI-NEXT: s_waitcnt vmcnt(0)
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; SI-NEXT: v_cmp_ngt_f64_e32 vcc, v[0:1], v[2:3]
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; SI-NEXT: v_cndmask_b32_e32 v1, v3, v1, vcc
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; SI-NEXT: v_cndmask_b32_e32 v0, v2, v0, vcc
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; SI-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0
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; SI-NEXT: s_endpgm
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;
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; VI-LABEL: test_fmin_legacy_ule_f64:
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; VI: ; %bb.0:
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; VI-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24
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; VI-NEXT: v_lshlrev_b32_e32 v0, 3, v0
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; VI-NEXT: s_waitcnt lgkmcnt(0)
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; VI-NEXT: v_mov_b32_e32 v1, s3
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; VI-NEXT: v_add_u32_e32 v0, vcc, s2, v0
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; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc
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; VI-NEXT: flat_load_dwordx4 v[0:3], v[0:1]
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; VI-NEXT: v_mov_b32_e32 v4, s0
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; VI-NEXT: v_mov_b32_e32 v5, s1
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; VI-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
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; VI-NEXT: v_cmp_ngt_f64_e32 vcc, v[0:1], v[2:3]
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; VI-NEXT: v_cndmask_b32_e32 v1, v3, v1, vcc
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; VI-NEXT: v_cndmask_b32_e32 v0, v2, v0, vcc
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; VI-NEXT: flat_store_dwordx2 v[4:5], v[0:1]
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; VI-NEXT: s_endpgm
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2016-02-11 14:02:01 +08:00
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%tid = call i32 @llvm.amdgcn.workitem.id.x() #1
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[opaque pointer type] Add textual IR support for explicit type parameter to getelementptr instruction
One of several parallel first steps to remove the target type of pointers,
replacing them with a single opaque pointer type.
This adds an explicit type parameter to the gep instruction so that when the
first parameter becomes an opaque pointer type, the type to gep through is
still available to the instructions.
* This doesn't modify gep operators, only instructions (operators will be
handled separately)
* Textual IR changes only. Bitcode (including upgrade) and changing the
in-memory representation will be in separate changes.
* geps of vectors are transformed as:
getelementptr <4 x float*> %x, ...
->getelementptr float, <4 x float*> %x, ...
Then, once the opaque pointer type is introduced, this will ultimately look
like:
getelementptr float, <4 x ptr> %x
with the unambiguous interpretation that it is a vector of pointers to float.
* address spaces remain on the pointer, not the type:
getelementptr float addrspace(1)* %x
->getelementptr float, float addrspace(1)* %x
Then, eventually:
getelementptr float, ptr addrspace(1) %x
Importantly, the massive amount of test case churn has been automated by
same crappy python code. I had to manually update a few test cases that
wouldn't fit the script's model (r228970,r229196,r229197,r229198). The
python script just massages stdin and writes the result to stdout, I
then wrapped that in a shell script to handle replacing files, then
using the usual find+xargs to migrate all the files.
update.py:
import fileinput
import sys
import re
ibrep = re.compile(r"(^.*?[^%\w]getelementptr inbounds )(((?:<\d* x )?)(.*?)(| addrspace\(\d\)) *\*(|>)(?:$| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$))")
normrep = re.compile( r"(^.*?[^%\w]getelementptr )(((?:<\d* x )?)(.*?)(| addrspace\(\d\)) *\*(|>)(?:$| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$))")
def conv(match, line):
if not match:
return line
line = match.groups()[0]
if len(match.groups()[5]) == 0:
line += match.groups()[2]
line += match.groups()[3]
line += ", "
line += match.groups()[1]
line += "\n"
return line
for line in sys.stdin:
if line.find("getelementptr ") == line.find("getelementptr inbounds"):
if line.find("getelementptr inbounds") != line.find("getelementptr inbounds ("):
line = conv(re.match(ibrep, line), line)
elif line.find("getelementptr ") != line.find("getelementptr ("):
line = conv(re.match(normrep, line), line)
sys.stdout.write(line)
apply.sh:
for name in "$@"
do
python3 `dirname "$0"`/update.py < "$name" > "$name.tmp" && mv "$name.tmp" "$name"
rm -f "$name.tmp"
done
The actual commands:
From llvm/src:
find test/ -name *.ll | xargs ./apply.sh
From llvm/src/tools/clang:
find test/ -name *.mm -o -name *.m -o -name *.cpp -o -name *.c | xargs -I '{}' ../../apply.sh "{}"
From llvm/src/tools/polly:
find test/ -name *.ll | xargs ./apply.sh
After that, check-all (with llvm, clang, clang-tools-extra, lld,
compiler-rt, and polly all checked out).
The extra 'rm' in the apply.sh script is due to a few files in clang's test
suite using interesting unicode stuff that my python script was throwing
exceptions on. None of those files needed to be migrated, so it seemed
sufficient to ignore those cases.
Reviewers: rafael, dexonsmith, grosser
Differential Revision: http://reviews.llvm.org/D7636
llvm-svn: 230786
2015-02-28 03:29:02 +08:00
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%gep.0 = getelementptr double, double addrspace(1)* %in, i32 %tid
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%gep.1 = getelementptr double, double addrspace(1)* %gep.0, i32 1
|
2014-12-12 10:30:37 +08:00
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2015-02-28 05:17:42 +08:00
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%a = load double, double addrspace(1)* %gep.0, align 8
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%b = load double, double addrspace(1)* %gep.1, align 8
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2014-12-12 10:30:37 +08:00
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%cmp = fcmp ule double %a, %b
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%val = select i1 %cmp, double %a, double %b
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store double %val, double addrspace(1)* %out, align 8
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ret void
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|
}
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|
2018-08-13 03:29:53 +08:00
|
|
|
define amdgpu_kernel void @test_fmin_legacy_ult_f64(double addrspace(1)* %out, double addrspace(1)* %in) #0 {
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; SI-LABEL: test_fmin_legacy_ult_f64:
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; SI: ; %bb.0:
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; SI-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9
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; SI-NEXT: s_mov_b32 s7, 0xf000
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|
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; SI-NEXT: s_mov_b32 s10, 0
|
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; SI-NEXT: s_mov_b32 s11, s7
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; SI-NEXT: v_lshlrev_b32_e32 v0, 3, v0
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|
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; SI-NEXT: s_waitcnt lgkmcnt(0)
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; SI-NEXT: s_mov_b64 s[8:9], s[2:3]
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; SI-NEXT: v_mov_b32_e32 v1, 0
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; SI-NEXT: buffer_load_dwordx4 v[0:3], v[0:1], s[8:11], 0 addr64
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; SI-NEXT: s_mov_b32 s6, -1
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; SI-NEXT: s_mov_b32 s4, s0
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; SI-NEXT: s_mov_b32 s5, s1
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; SI-NEXT: s_waitcnt vmcnt(0)
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; SI-NEXT: v_cmp_nge_f64_e32 vcc, v[0:1], v[2:3]
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; SI-NEXT: v_cndmask_b32_e32 v1, v3, v1, vcc
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; SI-NEXT: v_cndmask_b32_e32 v0, v2, v0, vcc
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; SI-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0
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; SI-NEXT: s_endpgm
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;
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|
|
; VI-LABEL: test_fmin_legacy_ult_f64:
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; VI: ; %bb.0:
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|
; VI-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24
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; VI-NEXT: v_lshlrev_b32_e32 v0, 3, v0
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; VI-NEXT: s_waitcnt lgkmcnt(0)
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|
; VI-NEXT: v_mov_b32_e32 v1, s3
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|
|
; VI-NEXT: v_add_u32_e32 v0, vcc, s2, v0
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|
|
; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc
|
|
|
|
|
; VI-NEXT: flat_load_dwordx4 v[0:3], v[0:1]
|
|
|
|
|
; VI-NEXT: v_mov_b32_e32 v4, s0
|
|
|
|
|
; VI-NEXT: v_mov_b32_e32 v5, s1
|
|
|
|
|
; VI-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
|
|
|
|
|
; VI-NEXT: v_cmp_nge_f64_e32 vcc, v[0:1], v[2:3]
|
|
|
|
|
; VI-NEXT: v_cndmask_b32_e32 v1, v3, v1, vcc
|
|
|
|
|
; VI-NEXT: v_cndmask_b32_e32 v0, v2, v0, vcc
|
|
|
|
|
; VI-NEXT: flat_store_dwordx2 v[4:5], v[0:1]
|
|
|
|
|
; VI-NEXT: s_endpgm
|
2016-02-11 14:02:01 +08:00
|
|
|
%tid = call i32 @llvm.amdgcn.workitem.id.x() #1
|
[opaque pointer type] Add textual IR support for explicit type parameter to getelementptr instruction
One of several parallel first steps to remove the target type of pointers,
replacing them with a single opaque pointer type.
This adds an explicit type parameter to the gep instruction so that when the
first parameter becomes an opaque pointer type, the type to gep through is
still available to the instructions.
* This doesn't modify gep operators, only instructions (operators will be
handled separately)
* Textual IR changes only. Bitcode (including upgrade) and changing the
in-memory representation will be in separate changes.
* geps of vectors are transformed as:
getelementptr <4 x float*> %x, ...
->getelementptr float, <4 x float*> %x, ...
Then, once the opaque pointer type is introduced, this will ultimately look
like:
getelementptr float, <4 x ptr> %x
with the unambiguous interpretation that it is a vector of pointers to float.
* address spaces remain on the pointer, not the type:
getelementptr float addrspace(1)* %x
->getelementptr float, float addrspace(1)* %x
Then, eventually:
getelementptr float, ptr addrspace(1) %x
Importantly, the massive amount of test case churn has been automated by
same crappy python code. I had to manually update a few test cases that
wouldn't fit the script's model (r228970,r229196,r229197,r229198). The
python script just massages stdin and writes the result to stdout, I
then wrapped that in a shell script to handle replacing files, then
using the usual find+xargs to migrate all the files.
update.py:
import fileinput
import sys
import re
ibrep = re.compile(r"(^.*?[^%\w]getelementptr inbounds )(((?:<\d* x )?)(.*?)(| addrspace\(\d\)) *\*(|>)(?:$| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$))")
normrep = re.compile( r"(^.*?[^%\w]getelementptr )(((?:<\d* x )?)(.*?)(| addrspace\(\d\)) *\*(|>)(?:$| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$))")
def conv(match, line):
if not match:
return line
line = match.groups()[0]
if len(match.groups()[5]) == 0:
line += match.groups()[2]
line += match.groups()[3]
line += ", "
line += match.groups()[1]
line += "\n"
return line
for line in sys.stdin:
if line.find("getelementptr ") == line.find("getelementptr inbounds"):
if line.find("getelementptr inbounds") != line.find("getelementptr inbounds ("):
line = conv(re.match(ibrep, line), line)
elif line.find("getelementptr ") != line.find("getelementptr ("):
line = conv(re.match(normrep, line), line)
sys.stdout.write(line)
apply.sh:
for name in "$@"
do
python3 `dirname "$0"`/update.py < "$name" > "$name.tmp" && mv "$name.tmp" "$name"
rm -f "$name.tmp"
done
The actual commands:
From llvm/src:
find test/ -name *.ll | xargs ./apply.sh
From llvm/src/tools/clang:
find test/ -name *.mm -o -name *.m -o -name *.cpp -o -name *.c | xargs -I '{}' ../../apply.sh "{}"
From llvm/src/tools/polly:
find test/ -name *.ll | xargs ./apply.sh
After that, check-all (with llvm, clang, clang-tools-extra, lld,
compiler-rt, and polly all checked out).
The extra 'rm' in the apply.sh script is due to a few files in clang's test
suite using interesting unicode stuff that my python script was throwing
exceptions on. None of those files needed to be migrated, so it seemed
sufficient to ignore those cases.
Reviewers: rafael, dexonsmith, grosser
Differential Revision: http://reviews.llvm.org/D7636
llvm-svn: 230786
2015-02-28 03:29:02 +08:00
|
|
|
%gep.0 = getelementptr double, double addrspace(1)* %in, i32 %tid
|
|
|
|
|
%gep.1 = getelementptr double, double addrspace(1)* %gep.0, i32 1
|
2014-12-12 10:30:37 +08:00
|
|
|
|
2015-02-28 05:17:42 +08:00
|
|
|
%a = load double, double addrspace(1)* %gep.0, align 8
|
|
|
|
|
%b = load double, double addrspace(1)* %gep.1, align 8
|
2014-12-12 10:30:37 +08:00
|
|
|
|
2018-08-13 03:29:53 +08:00
|
|
|
%cmp = fcmp ult double %a, %b
|
2014-12-12 10:30:37 +08:00
|
|
|
%val = select i1 %cmp, double %a, double %b
|
|
|
|
|
store double %val, double addrspace(1)* %out, align 8
|
|
|
|
|
ret void
|
|
|
|
|
}
|
|
|
|
|
|
2018-08-13 03:29:53 +08:00
|
|
|
define amdgpu_kernel void @test_fmin_legacy_oge_f64(double addrspace(1)* %out, double addrspace(1)* %in) #0 {
|
|
|
|
|
; SI-LABEL: test_fmin_legacy_oge_f64:
|
|
|
|
|
; SI: ; %bb.0:
|
|
|
|
|
; SI-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9
|
|
|
|
|
; SI-NEXT: s_mov_b32 s7, 0xf000
|
|
|
|
|
; SI-NEXT: s_mov_b32 s10, 0
|
|
|
|
|
; SI-NEXT: s_mov_b32 s11, s7
|
|
|
|
|
; SI-NEXT: v_lshlrev_b32_e32 v0, 3, v0
|
|
|
|
|
; SI-NEXT: s_waitcnt lgkmcnt(0)
|
|
|
|
|
; SI-NEXT: s_mov_b64 s[8:9], s[2:3]
|
|
|
|
|
; SI-NEXT: v_mov_b32_e32 v1, 0
|
|
|
|
|
; SI-NEXT: buffer_load_dwordx4 v[0:3], v[0:1], s[8:11], 0 addr64
|
|
|
|
|
; SI-NEXT: s_mov_b32 s6, -1
|
|
|
|
|
; SI-NEXT: s_mov_b32 s4, s0
|
|
|
|
|
; SI-NEXT: s_mov_b32 s5, s1
|
|
|
|
|
; SI-NEXT: s_waitcnt vmcnt(0)
|
|
|
|
|
; SI-NEXT: v_cmp_ge_f64_e32 vcc, v[0:1], v[2:3]
|
|
|
|
|
; SI-NEXT: v_cndmask_b32_e32 v1, v1, v3, vcc
|
|
|
|
|
; SI-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc
|
|
|
|
|
; SI-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0
|
|
|
|
|
; SI-NEXT: s_endpgm
|
|
|
|
|
;
|
|
|
|
|
; VI-LABEL: test_fmin_legacy_oge_f64:
|
|
|
|
|
; VI: ; %bb.0:
|
|
|
|
|
; VI-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24
|
|
|
|
|
; VI-NEXT: v_lshlrev_b32_e32 v0, 3, v0
|
|
|
|
|
; VI-NEXT: s_waitcnt lgkmcnt(0)
|
|
|
|
|
; VI-NEXT: v_mov_b32_e32 v1, s3
|
|
|
|
|
; VI-NEXT: v_add_u32_e32 v0, vcc, s2, v0
|
|
|
|
|
; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc
|
|
|
|
|
; VI-NEXT: flat_load_dwordx4 v[0:3], v[0:1]
|
|
|
|
|
; VI-NEXT: v_mov_b32_e32 v4, s0
|
|
|
|
|
; VI-NEXT: v_mov_b32_e32 v5, s1
|
|
|
|
|
; VI-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
|
|
|
|
|
; VI-NEXT: v_cmp_ge_f64_e32 vcc, v[0:1], v[2:3]
|
|
|
|
|
; VI-NEXT: v_cndmask_b32_e32 v1, v1, v3, vcc
|
|
|
|
|
; VI-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc
|
|
|
|
|
; VI-NEXT: flat_store_dwordx2 v[4:5], v[0:1]
|
|
|
|
|
; VI-NEXT: s_endpgm
|
2016-02-11 14:02:01 +08:00
|
|
|
%tid = call i32 @llvm.amdgcn.workitem.id.x() #1
|
[opaque pointer type] Add textual IR support for explicit type parameter to getelementptr instruction
One of several parallel first steps to remove the target type of pointers,
replacing them with a single opaque pointer type.
This adds an explicit type parameter to the gep instruction so that when the
first parameter becomes an opaque pointer type, the type to gep through is
still available to the instructions.
* This doesn't modify gep operators, only instructions (operators will be
handled separately)
* Textual IR changes only. Bitcode (including upgrade) and changing the
in-memory representation will be in separate changes.
* geps of vectors are transformed as:
getelementptr <4 x float*> %x, ...
->getelementptr float, <4 x float*> %x, ...
Then, once the opaque pointer type is introduced, this will ultimately look
like:
getelementptr float, <4 x ptr> %x
with the unambiguous interpretation that it is a vector of pointers to float.
* address spaces remain on the pointer, not the type:
getelementptr float addrspace(1)* %x
->getelementptr float, float addrspace(1)* %x
Then, eventually:
getelementptr float, ptr addrspace(1) %x
Importantly, the massive amount of test case churn has been automated by
same crappy python code. I had to manually update a few test cases that
wouldn't fit the script's model (r228970,r229196,r229197,r229198). The
python script just massages stdin and writes the result to stdout, I
then wrapped that in a shell script to handle replacing files, then
using the usual find+xargs to migrate all the files.
update.py:
import fileinput
import sys
import re
ibrep = re.compile(r"(^.*?[^%\w]getelementptr inbounds )(((?:<\d* x )?)(.*?)(| addrspace\(\d\)) *\*(|>)(?:$| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$))")
normrep = re.compile( r"(^.*?[^%\w]getelementptr )(((?:<\d* x )?)(.*?)(| addrspace\(\d\)) *\*(|>)(?:$| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$))")
def conv(match, line):
if not match:
return line
line = match.groups()[0]
if len(match.groups()[5]) == 0:
line += match.groups()[2]
line += match.groups()[3]
line += ", "
line += match.groups()[1]
line += "\n"
return line
for line in sys.stdin:
if line.find("getelementptr ") == line.find("getelementptr inbounds"):
if line.find("getelementptr inbounds") != line.find("getelementptr inbounds ("):
line = conv(re.match(ibrep, line), line)
elif line.find("getelementptr ") != line.find("getelementptr ("):
line = conv(re.match(normrep, line), line)
sys.stdout.write(line)
apply.sh:
for name in "$@"
do
python3 `dirname "$0"`/update.py < "$name" > "$name.tmp" && mv "$name.tmp" "$name"
rm -f "$name.tmp"
done
The actual commands:
From llvm/src:
find test/ -name *.ll | xargs ./apply.sh
From llvm/src/tools/clang:
find test/ -name *.mm -o -name *.m -o -name *.cpp -o -name *.c | xargs -I '{}' ../../apply.sh "{}"
From llvm/src/tools/polly:
find test/ -name *.ll | xargs ./apply.sh
After that, check-all (with llvm, clang, clang-tools-extra, lld,
compiler-rt, and polly all checked out).
The extra 'rm' in the apply.sh script is due to a few files in clang's test
suite using interesting unicode stuff that my python script was throwing
exceptions on. None of those files needed to be migrated, so it seemed
sufficient to ignore those cases.
Reviewers: rafael, dexonsmith, grosser
Differential Revision: http://reviews.llvm.org/D7636
llvm-svn: 230786
2015-02-28 03:29:02 +08:00
|
|
|
%gep.0 = getelementptr double, double addrspace(1)* %in, i32 %tid
|
|
|
|
|
%gep.1 = getelementptr double, double addrspace(1)* %gep.0, i32 1
|
2014-12-12 10:30:37 +08:00
|
|
|
|
2015-02-28 05:17:42 +08:00
|
|
|
%a = load double, double addrspace(1)* %gep.0, align 8
|
|
|
|
|
%b = load double, double addrspace(1)* %gep.1, align 8
|
2014-12-12 10:30:37 +08:00
|
|
|
|
2018-08-13 03:29:53 +08:00
|
|
|
%cmp = fcmp oge double %a, %b
|
|
|
|
|
%val = select i1 %cmp, double %b, double %a
|
|
|
|
|
store double %val, double addrspace(1)* %out, align 8
|
|
|
|
|
ret void
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
define amdgpu_kernel void @test_fmin_legacy_ogt_f64(double addrspace(1)* %out, double addrspace(1)* %in) #0 {
|
|
|
|
|
; SI-LABEL: test_fmin_legacy_ogt_f64:
|
|
|
|
|
; SI: ; %bb.0:
|
|
|
|
|
; SI-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9
|
|
|
|
|
; SI-NEXT: s_mov_b32 s7, 0xf000
|
|
|
|
|
; SI-NEXT: s_mov_b32 s10, 0
|
|
|
|
|
; SI-NEXT: s_mov_b32 s11, s7
|
|
|
|
|
; SI-NEXT: v_lshlrev_b32_e32 v0, 3, v0
|
|
|
|
|
; SI-NEXT: s_waitcnt lgkmcnt(0)
|
|
|
|
|
; SI-NEXT: s_mov_b64 s[8:9], s[2:3]
|
|
|
|
|
; SI-NEXT: v_mov_b32_e32 v1, 0
|
|
|
|
|
; SI-NEXT: buffer_load_dwordx4 v[0:3], v[0:1], s[8:11], 0 addr64
|
|
|
|
|
; SI-NEXT: s_mov_b32 s6, -1
|
|
|
|
|
; SI-NEXT: s_mov_b32 s4, s0
|
|
|
|
|
; SI-NEXT: s_mov_b32 s5, s1
|
|
|
|
|
; SI-NEXT: s_waitcnt vmcnt(0)
|
|
|
|
|
; SI-NEXT: v_cmp_gt_f64_e32 vcc, v[0:1], v[2:3]
|
|
|
|
|
; SI-NEXT: v_cndmask_b32_e32 v1, v1, v3, vcc
|
|
|
|
|
; SI-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc
|
|
|
|
|
; SI-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0
|
|
|
|
|
; SI-NEXT: s_endpgm
|
|
|
|
|
;
|
|
|
|
|
; VI-LABEL: test_fmin_legacy_ogt_f64:
|
|
|
|
|
; VI: ; %bb.0:
|
|
|
|
|
; VI-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24
|
|
|
|
|
; VI-NEXT: v_lshlrev_b32_e32 v0, 3, v0
|
|
|
|
|
; VI-NEXT: s_waitcnt lgkmcnt(0)
|
|
|
|
|
; VI-NEXT: v_mov_b32_e32 v1, s3
|
|
|
|
|
; VI-NEXT: v_add_u32_e32 v0, vcc, s2, v0
|
|
|
|
|
; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc
|
|
|
|
|
; VI-NEXT: flat_load_dwordx4 v[0:3], v[0:1]
|
|
|
|
|
; VI-NEXT: v_mov_b32_e32 v4, s0
|
|
|
|
|
; VI-NEXT: v_mov_b32_e32 v5, s1
|
|
|
|
|
; VI-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
|
|
|
|
|
; VI-NEXT: v_cmp_gt_f64_e32 vcc, v[0:1], v[2:3]
|
|
|
|
|
; VI-NEXT: v_cndmask_b32_e32 v1, v1, v3, vcc
|
|
|
|
|
; VI-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc
|
|
|
|
|
; VI-NEXT: flat_store_dwordx2 v[4:5], v[0:1]
|
|
|
|
|
; VI-NEXT: s_endpgm
|
|
|
|
|
%tid = call i32 @llvm.amdgcn.workitem.id.x() #1
|
|
|
|
|
%gep.0 = getelementptr double, double addrspace(1)* %in, i32 %tid
|
|
|
|
|
%gep.1 = getelementptr double, double addrspace(1)* %gep.0, i32 1
|
|
|
|
|
|
|
|
|
|
%a = load double, double addrspace(1)* %gep.0, align 8
|
|
|
|
|
%b = load double, double addrspace(1)* %gep.1, align 8
|
|
|
|
|
|
|
|
|
|
%cmp = fcmp ogt double %a, %b
|
|
|
|
|
%val = select i1 %cmp, double %b, double %a
|
|
|
|
|
store double %val, double addrspace(1)* %out, align 8
|
|
|
|
|
ret void
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
define amdgpu_kernel void @test_fmin_legacy_ole_f64(double addrspace(1)* %out, double addrspace(1)* %in) #0 {
|
|
|
|
|
; SI-LABEL: test_fmin_legacy_ole_f64:
|
|
|
|
|
; SI: ; %bb.0:
|
|
|
|
|
; SI-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9
|
|
|
|
|
; SI-NEXT: s_mov_b32 s7, 0xf000
|
|
|
|
|
; SI-NEXT: s_mov_b32 s10, 0
|
|
|
|
|
; SI-NEXT: s_mov_b32 s11, s7
|
|
|
|
|
; SI-NEXT: v_lshlrev_b32_e32 v0, 3, v0
|
|
|
|
|
; SI-NEXT: s_waitcnt lgkmcnt(0)
|
|
|
|
|
; SI-NEXT: s_mov_b64 s[8:9], s[2:3]
|
|
|
|
|
; SI-NEXT: v_mov_b32_e32 v1, 0
|
|
|
|
|
; SI-NEXT: buffer_load_dwordx4 v[0:3], v[0:1], s[8:11], 0 addr64
|
|
|
|
|
; SI-NEXT: s_mov_b32 s6, -1
|
|
|
|
|
; SI-NEXT: s_mov_b32 s4, s0
|
|
|
|
|
; SI-NEXT: s_mov_b32 s5, s1
|
|
|
|
|
; SI-NEXT: s_waitcnt vmcnt(0)
|
|
|
|
|
; SI-NEXT: v_cmp_le_f64_e32 vcc, v[0:1], v[2:3]
|
|
|
|
|
; SI-NEXT: v_cndmask_b32_e32 v1, v3, v1, vcc
|
|
|
|
|
; SI-NEXT: v_cndmask_b32_e32 v0, v2, v0, vcc
|
|
|
|
|
; SI-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0
|
|
|
|
|
; SI-NEXT: s_endpgm
|
|
|
|
|
;
|
|
|
|
|
; VI-LABEL: test_fmin_legacy_ole_f64:
|
|
|
|
|
; VI: ; %bb.0:
|
|
|
|
|
; VI-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24
|
|
|
|
|
; VI-NEXT: v_lshlrev_b32_e32 v0, 3, v0
|
|
|
|
|
; VI-NEXT: s_waitcnt lgkmcnt(0)
|
|
|
|
|
; VI-NEXT: v_mov_b32_e32 v1, s3
|
|
|
|
|
; VI-NEXT: v_add_u32_e32 v0, vcc, s2, v0
|
|
|
|
|
; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc
|
|
|
|
|
; VI-NEXT: flat_load_dwordx4 v[0:3], v[0:1]
|
|
|
|
|
; VI-NEXT: v_mov_b32_e32 v4, s0
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; VI-NEXT: v_mov_b32_e32 v5, s1
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|
|
; VI-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
|
|
|
|
|
; VI-NEXT: v_cmp_le_f64_e32 vcc, v[0:1], v[2:3]
|
|
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|
|
; VI-NEXT: v_cndmask_b32_e32 v1, v3, v1, vcc
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; VI-NEXT: v_cndmask_b32_e32 v0, v2, v0, vcc
|
|
|
|
|
; VI-NEXT: flat_store_dwordx2 v[4:5], v[0:1]
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; VI-NEXT: s_endpgm
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|
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|
%tid = call i32 @llvm.amdgcn.workitem.id.x() #1
|
|
|
|
|
%gep.0 = getelementptr double, double addrspace(1)* %in, i32 %tid
|
|
|
|
|
%gep.1 = getelementptr double, double addrspace(1)* %gep.0, i32 1
|
|
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|
|
|
|
|
|
%a = load double, double addrspace(1)* %gep.0, align 8
|
|
|
|
|
%b = load double, double addrspace(1)* %gep.1, align 8
|
|
|
|
|
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|
%cmp = fcmp ole double %a, %b
|
2014-12-12 10:30:37 +08:00
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|
|
%val = select i1 %cmp, double %a, double %b
|
|
|
|
|
store double %val, double addrspace(1)* %out, align 8
|
|
|
|
|
ret void
|
|
|
|
|
}
|
|
|
|
|
|
2018-08-13 03:29:53 +08:00
|
|
|
define amdgpu_kernel void @test_fmin_legacy_olt_f64(double addrspace(1)* %out, double addrspace(1)* %in) #0 {
|
|
|
|
|
; SI-LABEL: test_fmin_legacy_olt_f64:
|
|
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|
|
; SI: ; %bb.0:
|
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|
|
|
; SI-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9
|
|
|
|
|
; SI-NEXT: s_mov_b32 s7, 0xf000
|
|
|
|
|
; SI-NEXT: s_mov_b32 s10, 0
|
|
|
|
|
; SI-NEXT: s_mov_b32 s11, s7
|
|
|
|
|
; SI-NEXT: v_lshlrev_b32_e32 v0, 3, v0
|
|
|
|
|
; SI-NEXT: s_waitcnt lgkmcnt(0)
|
|
|
|
|
; SI-NEXT: s_mov_b64 s[8:9], s[2:3]
|
|
|
|
|
; SI-NEXT: v_mov_b32_e32 v1, 0
|
|
|
|
|
; SI-NEXT: buffer_load_dwordx4 v[0:3], v[0:1], s[8:11], 0 addr64
|
|
|
|
|
; SI-NEXT: s_mov_b32 s6, -1
|
|
|
|
|
; SI-NEXT: s_mov_b32 s4, s0
|
|
|
|
|
; SI-NEXT: s_mov_b32 s5, s1
|
|
|
|
|
; SI-NEXT: s_waitcnt vmcnt(0)
|
|
|
|
|
; SI-NEXT: v_cmp_lt_f64_e32 vcc, v[0:1], v[2:3]
|
|
|
|
|
; SI-NEXT: v_cndmask_b32_e32 v1, v3, v1, vcc
|
|
|
|
|
; SI-NEXT: v_cndmask_b32_e32 v0, v2, v0, vcc
|
|
|
|
|
; SI-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0
|
|
|
|
|
; SI-NEXT: s_endpgm
|
|
|
|
|
;
|
|
|
|
|
; VI-LABEL: test_fmin_legacy_olt_f64:
|
|
|
|
|
; VI: ; %bb.0:
|
|
|
|
|
; VI-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24
|
|
|
|
|
; VI-NEXT: v_lshlrev_b32_e32 v0, 3, v0
|
|
|
|
|
; VI-NEXT: s_waitcnt lgkmcnt(0)
|
|
|
|
|
; VI-NEXT: v_mov_b32_e32 v1, s3
|
|
|
|
|
; VI-NEXT: v_add_u32_e32 v0, vcc, s2, v0
|
|
|
|
|
; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc
|
|
|
|
|
; VI-NEXT: flat_load_dwordx4 v[0:3], v[0:1]
|
|
|
|
|
; VI-NEXT: v_mov_b32_e32 v4, s0
|
|
|
|
|
; VI-NEXT: v_mov_b32_e32 v5, s1
|
|
|
|
|
; VI-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
|
|
|
|
|
; VI-NEXT: v_cmp_lt_f64_e32 vcc, v[0:1], v[2:3]
|
|
|
|
|
; VI-NEXT: v_cndmask_b32_e32 v1, v3, v1, vcc
|
|
|
|
|
; VI-NEXT: v_cndmask_b32_e32 v0, v2, v0, vcc
|
|
|
|
|
; VI-NEXT: flat_store_dwordx2 v[4:5], v[0:1]
|
|
|
|
|
; VI-NEXT: s_endpgm
|
2016-02-11 14:02:01 +08:00
|
|
|
%tid = call i32 @llvm.amdgcn.workitem.id.x() #1
|
[opaque pointer type] Add textual IR support for explicit type parameter to getelementptr instruction
One of several parallel first steps to remove the target type of pointers,
replacing them with a single opaque pointer type.
This adds an explicit type parameter to the gep instruction so that when the
first parameter becomes an opaque pointer type, the type to gep through is
still available to the instructions.
* This doesn't modify gep operators, only instructions (operators will be
handled separately)
* Textual IR changes only. Bitcode (including upgrade) and changing the
in-memory representation will be in separate changes.
* geps of vectors are transformed as:
getelementptr <4 x float*> %x, ...
->getelementptr float, <4 x float*> %x, ...
Then, once the opaque pointer type is introduced, this will ultimately look
like:
getelementptr float, <4 x ptr> %x
with the unambiguous interpretation that it is a vector of pointers to float.
* address spaces remain on the pointer, not the type:
getelementptr float addrspace(1)* %x
->getelementptr float, float addrspace(1)* %x
Then, eventually:
getelementptr float, ptr addrspace(1) %x
Importantly, the massive amount of test case churn has been automated by
same crappy python code. I had to manually update a few test cases that
wouldn't fit the script's model (r228970,r229196,r229197,r229198). The
python script just massages stdin and writes the result to stdout, I
then wrapped that in a shell script to handle replacing files, then
using the usual find+xargs to migrate all the files.
update.py:
import fileinput
import sys
import re
ibrep = re.compile(r"(^.*?[^%\w]getelementptr inbounds )(((?:<\d* x )?)(.*?)(| addrspace\(\d\)) *\*(|>)(?:$| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$))")
normrep = re.compile( r"(^.*?[^%\w]getelementptr )(((?:<\d* x )?)(.*?)(| addrspace\(\d\)) *\*(|>)(?:$| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$))")
def conv(match, line):
if not match:
return line
line = match.groups()[0]
if len(match.groups()[5]) == 0:
line += match.groups()[2]
line += match.groups()[3]
line += ", "
line += match.groups()[1]
line += "\n"
return line
for line in sys.stdin:
if line.find("getelementptr ") == line.find("getelementptr inbounds"):
if line.find("getelementptr inbounds") != line.find("getelementptr inbounds ("):
line = conv(re.match(ibrep, line), line)
elif line.find("getelementptr ") != line.find("getelementptr ("):
line = conv(re.match(normrep, line), line)
sys.stdout.write(line)
apply.sh:
for name in "$@"
do
python3 `dirname "$0"`/update.py < "$name" > "$name.tmp" && mv "$name.tmp" "$name"
rm -f "$name.tmp"
done
The actual commands:
From llvm/src:
find test/ -name *.ll | xargs ./apply.sh
From llvm/src/tools/clang:
find test/ -name *.mm -o -name *.m -o -name *.cpp -o -name *.c | xargs -I '{}' ../../apply.sh "{}"
From llvm/src/tools/polly:
find test/ -name *.ll | xargs ./apply.sh
After that, check-all (with llvm, clang, clang-tools-extra, lld,
compiler-rt, and polly all checked out).
The extra 'rm' in the apply.sh script is due to a few files in clang's test
suite using interesting unicode stuff that my python script was throwing
exceptions on. None of those files needed to be migrated, so it seemed
sufficient to ignore those cases.
Reviewers: rafael, dexonsmith, grosser
Differential Revision: http://reviews.llvm.org/D7636
llvm-svn: 230786
2015-02-28 03:29:02 +08:00
|
|
|
%gep.0 = getelementptr double, double addrspace(1)* %in, i32 %tid
|
|
|
|
|
%gep.1 = getelementptr double, double addrspace(1)* %gep.0, i32 1
|
2014-12-12 10:30:37 +08:00
|
|
|
|
2015-02-28 05:17:42 +08:00
|
|
|
%a = load double, double addrspace(1)* %gep.0, align 8
|
|
|
|
|
%b = load double, double addrspace(1)* %gep.1, align 8
|
2014-12-12 10:30:37 +08:00
|
|
|
|
2018-08-13 03:29:53 +08:00
|
|
|
%cmp = fcmp olt double %a, %b
|
2014-12-12 10:30:37 +08:00
|
|
|
%val = select i1 %cmp, double %a, double %b
|
|
|
|
|
store double %val, double addrspace(1)* %out, align 8
|
|
|
|
|
ret void
|
|
|
|
|
}
|
|
|
|
|
|
2018-08-13 03:29:53 +08:00
|
|
|
declare i32 @llvm.amdgcn.workitem.id.x() #1
|
|
|
|
|
|
2014-12-12 10:30:37 +08:00
|
|
|
attributes #0 = { nounwind }
|
|
|
|
|
attributes #1 = { nounwind readnone }
|