forked from OSchip/llvm-project
20 lines
542 B
Plaintext
20 lines
542 B
Plaintext
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# XFAIL: *
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# RUN: llc -march=amdgcn -run-pass=instruction-select -verify-machineinstrs -global-isel %s -o - | FileCheck %s -check-prefixes=GCN
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# FIXME: This requires additional context for what input registers are special inputs not present in MIR.
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---
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name: kernarg_segment_Ptr
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legalized: true
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regBankSelected: true
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body: |
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bb.0:
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%0:vgpr(p4) = G_INTRINSIC intrinsic(@llvm.amdgcn.kernarg.segment.ptr)
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%1:sgpr(s32) = G_LOAD %0 :: (load 4)
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%2:vgpr(p1) = G_IMPLICIT_DEF
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G_STORE %1, %2 :: (store 4)
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...
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---
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