maxjhandsome
/
llvm-project
forked from OSchip/llvm-project
1
0
Fork 0
Code Issues Pull Requests Packages Releases Wiki Activity
llvm-project/llvm/test/CodeGen/Mips/hf1_body.ll

22 lines
623 B
LLVM
Raw Normal View History

[Mips] Adjust float ABI settings in case of MIPS16 mode. Hard float for mips16 means essentially to compile as soft float but to use a runtime library for soft float that is written with native mips32 floating point instructions (those runtime routines run in mips32 hard float mode). The patch reviewed by Reed Kotler. llvm-svn: 195123
2013-11-19 20:20:17 +08:00
; RUN: llc -mtriple=mipsel-linux-gnu -march=mipsel -mcpu=mips16 -relocation-model=pic < %s | FileCheck %s -check-prefix=picfp16
Fix a bad typo in the inline assembly code for mips16 pic fp stubs and make one cosmetic cleanup to make it look the same as gcc in this area; adjusting test cases. llvm-svn: 191400
2013-09-26 04:58:50 +08:00
@x = external global float
; Function Attrs: nounwind
define void @v_sf(float %p) #0 {
entry:
%p.addr = alloca float, align 4
store float %p, float* %p.addr, align 4
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction Essentially the same as the GEP change in r230786. A similar migration script can be used to update test cases, though a few more test case improvements/changes were required this time around: (r229269-r229278) import fileinput import sys import re pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)") for line in sys.stdin: sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line)) Reviewers: rafael, dexonsmith, grosser Differential Revision: http://reviews.llvm.org/D7649 llvm-svn: 230794
2015-02-28 05:17:42 +08:00
%0 = load float, float* %p.addr, align 4
Fix a bad typo in the inline assembly code for mips16 pic fp stubs and make one cosmetic cleanup to make it look the same as gcc in this area; adjusting test cases. llvm-svn: 191400
2013-09-26 04:58:50 +08:00
store float %0, float* @x, align 4
ret void
}
; picfp16: .ent __fn_stub_v_sf
; picfp16: .cpload $25
; picfp16: .set reorder
; picfp16: .reloc 0,R_MIPS_NONE,v_sf
; picfp16: la $25,$__fn_local_v_sf
; picfp16: mfc1 $4,$f12
; picfp16: jr $25
; picfp16: .end __fn_stub_v_sf