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llvm-project/llvm/test/CodeGen/AArch64/arm64-arm64-dead-def-elimin...

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[AArch64] Register passes so they can be run by llc Initialize all AArch64-specific passes in the TargetMachine so they can be run by llc. This can lead to conflicts in opt with some command line options that share the same name as the pass, so I took this opportunity to do some cleanups: * rename all relevant command line options from "aarch64-blah" to "aarch64-enable-blah" and update the tests accordingly * run clang-format on their declarations * move all these declarations to a common place (the TargetMachine) as opposed to having them scattered around (AArch64BranchRelaxation and AArch64AddressTypePromotion were the only offenders) llvm-svn: 277322
2016-08-01 13:56:57 +08:00
; RUN: llc -mtriple=arm64-apple-ios7.0.0 -aarch64-enable-dead-defs=false < %s | FileCheck %s
Add a flag to disable the ARM64DeadRegisterDefinitionsPass This patch adds a -arm64-dead-def-elimination flag so that it is possible to disable dead definition elimination. Includes test case. llvm-svn: 206207
2014-04-15 05:05:02 +08:00
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
; Function Attrs: nounwind ssp uwtable
define i32 @test1() #0 {
%tmp1 = alloca i8
%tmp2 = icmp eq i8* %tmp1, null
%tmp3 = zext i1 %tmp2 to i32
ret i32 %tmp3
; CHECK-LABEL: test1
; CHECK: adds {{x[0-9]+}}, sp, #15
}