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llvm-project/llvm/test/CodeGen/X86/avx512-vselect-crash.ll

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[X86] Regenerate test. llvm-svn: 308981
2017-07-26 00:10:32 +08:00
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
Suppress '(x < y) ? a : 0 -> (x < y) & a' transform on X86 architectures with dedicated mask registers. Patch by Aleksey Bader. llvm-svn: 196386
2013-12-04 22:52:33 +08:00
; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=knl | FileCheck %s
define <16 x i32> @test() {
[X86] Regenerate test. llvm-svn: 308981
2017-07-26 00:10:32 +08:00
; CHECK-LABEL: test:
[CodeGen] Unify MBB reference format in both MIR and debug output As part of the unification of the debug format and the MIR format, print MBB references as '%bb.5'. The MIR printer prints the IR name of a MBB only for block definitions. * find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#" << ([a-zA-Z0-9_]+)->getNumber\(\)/" << printMBBReference(*\1)/g' * find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#" << ([a-zA-Z0-9_]+)\.getNumber\(\)/" << printMBBReference(\1)/g' * find . \( -name "*.txt" -o -name "*.s" -o -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#([0-9]+)/%bb.\1/g' * grep -nr 'BB#' and fix Differential Revision: https://reviews.llvm.org/D40422 llvm-svn: 319665
2017-12-05 01:18:51 +08:00
; CHECK: ## %bb.0: ## %entry
[X86] SET0 to use XMM registers where possible PR26018 PR32862 Differential Revision: https://reviews.llvm.org/D35965 llvm-svn: 309926
2017-08-03 16:50:18 +08:00
; CHECK-NEXT: vxorps %xmm0, %xmm0, %xmm0
[X86] Regenerate test. llvm-svn: 308981
2017-07-26 00:10:32 +08:00
; CHECK-NEXT: retq
Suppress '(x < y) ? a : 0 -> (x < y) & a' transform on X86 architectures with dedicated mask registers. Patch by Aleksey Bader. llvm-svn: 196386
2013-12-04 22:52:33 +08:00
entry:
%0 = icmp slt <16 x i32> undef, undef
%1 = select <16 x i1> %0, <16 x i32> undef, <16 x i32> zeroinitializer
ret <16 x i32> %1
}