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llvm-project/llvm/test/CodeGen/Hexagon/pred-gp.ll

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Hexagon: Fix switch cases in HexagonVLIWPacketizer.cpp. llvm-svn: 181624
2013-05-11 04:27:34 +08:00
; RUN: llc -march=hexagon -mcpu=hexagonv4 < %s | FileCheck %s
; Check that we are able to predicate instructions with gp-relative
; addressing mode.
@d = external global i32
@c = common global i32 0, align 4
; Function Attrs: nounwind
define i32 @test2(i8 zeroext %a, i8 zeroext %b) #0 {
[Hexagon] Remove {{ *}} from testcases The spaces in the instructions are now consistent. llvm-svn: 326829
2018-03-07 03:07:21 +08:00
; CHECK: if ({{!?}}p{{[0-3]+}}{{(.new)?}}) r{{[0-9]+}} = memw(##{{[cd]}})
; CHECK: if ({{!?}}p{{[0-3]+}}) r{{[0-9]+}} = memw(##{{[cd]}})
Hexagon: Fix switch cases in HexagonVLIWPacketizer.cpp. llvm-svn: 181624
2013-05-11 04:27:34 +08:00
entry:
%cmp = icmp eq i8 %a, %b
br i1 %cmp, label %if.then, label %entry.if.end_crit_edge
entry.if.end_crit_edge:
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction Essentially the same as the GEP change in r230786. A similar migration script can be used to update test cases, though a few more test case improvements/changes were required this time around: (r229269-r229278) import fileinput import sys import re pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)") for line in sys.stdin: sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line)) Reviewers: rafael, dexonsmith, grosser Differential Revision: http://reviews.llvm.org/D7649 llvm-svn: 230794
2015-02-28 05:17:42 +08:00
%.pre = load i32, i32* @c, align 4
Hexagon: Fix switch cases in HexagonVLIWPacketizer.cpp. llvm-svn: 181624
2013-05-11 04:27:34 +08:00
br label %if.end
if.then:
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction Essentially the same as the GEP change in r230786. A similar migration script can be used to update test cases, though a few more test case improvements/changes were required this time around: (r229269-r229278) import fileinput import sys import re pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)") for line in sys.stdin: sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line)) Reviewers: rafael, dexonsmith, grosser Differential Revision: http://reviews.llvm.org/D7649 llvm-svn: 230794
2015-02-28 05:17:42 +08:00
%0 = load i32, i32* @d, align 4
Hexagon: Fix switch cases in HexagonVLIWPacketizer.cpp. llvm-svn: 181624
2013-05-11 04:27:34 +08:00
store i32 %0, i32* @c, align 4
br label %if.end
if.end:
%1 = phi i32 [ %.pre, %entry.if.end_crit_edge ], [ %0, %if.then ]
ret i32 %1
}