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llvm-project/clang/test/Driver/hip-toolchain-no-rdc.hip

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[HIP] Support early finalization of device code for -fno-gpu-rdc This patch renames -f{no-}cuda-rdc to -f{no-}gpu-rdc and keeps the original options as aliases. When -fgpu-rdc is off, clang will assume the device code in each translation unit does not call external functions except those in the device library, therefore it is possible to compile the device code in each translation unit to self-contained kernels and embed them in the host object, so that the host object behaves like usual host object which can be linked by lld. The benefits of this feature is: 1. allow users to create static libraries which can be linked by host linker; 2. amortized device code linking time. This patch modifies HIP action builder to insert actions for linking device code and generating HIP fatbin, and pass HIP fatbin to host backend action. It extracts code for constructing command for generating HIP fatbin as a function so that it can be reused by early finalization. It also modifies codegen of HIP host constructor functions to embed the device fatbin when it is available. Differential Revision: https://reviews.llvm.org/D52377 llvm-svn: 343611
2018-10-03 01:48:54 +08:00
// REQUIRES: clang-driver
// REQUIRES: x86-registered-target
// REQUIRES: amdgpu-registered-target
// RUN: %clang -### -target x86_64-linux-gnu -fno-gpu-rdc \
// RUN: -x hip --cuda-gpu-arch=gfx803 --cuda-gpu-arch=gfx900 \
// RUN: --hip-device-lib=lib1.bc --hip-device-lib=lib2.bc \
// RUN: --hip-device-lib-path=%S/Inputs/hip_multiple_inputs/lib1 \
// RUN: --hip-device-lib-path=%S/Inputs/hip_multiple_inputs/lib2 \
// RUN: -fuse-ld=lld \
// RUN: %S/Inputs/hip_multiple_inputs/a.cu \
// RUN: %S/Inputs/hip_multiple_inputs/b.hip \
// RUN: 2>&1 | FileCheck -check-prefixes=CHECK %s
//
// Compile device code in a.cu to code object for gfx803.
//
// CHECK: [[CLANG:".*clang.*"]] "-cc1" "-triple" "amdgcn-amd-amdhsa"
Relax restriction in tests to where "-emit-llvm-bc" and "-emit-obj" must appear. The CHECK lines as structured were requiring them to appear only in a certain position while all that is really needed is to check that they are present. llvm-svn: 354001
2019-02-14 09:11:32 +08:00
// CHECK-SAME: "-aux-triple" "x86_64-unknown-linux-gnu"
// CHECK-SAME: "-emit-llvm-bc"
[HIP] Support early finalization of device code for -fno-gpu-rdc This patch renames -f{no-}cuda-rdc to -f{no-}gpu-rdc and keeps the original options as aliases. When -fgpu-rdc is off, clang will assume the device code in each translation unit does not call external functions except those in the device library, therefore it is possible to compile the device code in each translation unit to self-contained kernels and embed them in the host object, so that the host object behaves like usual host object which can be linked by lld. The benefits of this feature is: 1. allow users to create static libraries which can be linked by host linker; 2. amortized device code linking time. This patch modifies HIP action builder to insert actions for linking device code and generating HIP fatbin, and pass HIP fatbin to host backend action. It extracts code for constructing command for generating HIP fatbin as a function so that it can be reused by early finalization. It also modifies codegen of HIP host constructor functions to embed the device fatbin when it is available. Differential Revision: https://reviews.llvm.org/D52377 llvm-svn: 343611
2018-10-03 01:48:54 +08:00
// CHECK-SAME: {{.*}} "-main-file-name" "a.cu" {{.*}} "-target-cpu" "gfx803"
[hip] Allow the declaration of functions with variadic arguments in HIP. Summary: - As variadic parameters have the lowest rank in overload resolution, without real usage of `va_arg`, they are commonly used as the catch-all fallbacks in SFINAE. As the front-end still reports errors on calls to `va_arg`, the declaration of functions with variadic arguments should be allowed in general. Reviewers: jlebar, tra, yaxunl Subscribers: cfe-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D69389
2019-10-24 23:41:11 +08:00
// CHECK-SAME: "-fcuda-is-device" "-fcuda-allow-variadic-functions" "-fvisibility" "hidden"
Add -fapply-global-visibility-to-externs for -cc1 Introduce an option to request global visibility settings be applied to declarations without a definition or an explicit visibility, rather than the existing behavior of giving these default visibility. When the visibility of all or most extern definitions are known this allows for the same optimisations -fvisibility permits without updating source code to annotate all declarations. Differential Revision: https://reviews.llvm.org/D56868 llvm-svn: 352391
2019-01-29 01:12:19 +08:00
// CHECK-SAME: "-fapply-global-visibility-to-externs"
[HIP] Use -mlink-builtin-bitcode to link device library Use -mlink-builtin-bitcode instead of llvm-link to link device library so that device library bitcode and user device code can be compiled in a consistent way. This is the same approach used by CUDA and OpenMP. Differential Revision: https://reviews.llvm.org/D60513 llvm-svn: 358290
2019-04-13 00:23:31 +08:00
// CHECK-SAME: "{{.*}}lib1.bc" "{{.*}}lib2.bc"
[HIP] Support early finalization of device code for -fno-gpu-rdc This patch renames -f{no-}cuda-rdc to -f{no-}gpu-rdc and keeps the original options as aliases. When -fgpu-rdc is off, clang will assume the device code in each translation unit does not call external functions except those in the device library, therefore it is possible to compile the device code in each translation unit to self-contained kernels and embed them in the host object, so that the host object behaves like usual host object which can be linked by lld. The benefits of this feature is: 1. allow users to create static libraries which can be linked by host linker; 2. amortized device code linking time. This patch modifies HIP action builder to insert actions for linking device code and generating HIP fatbin, and pass HIP fatbin to host backend action. It extracts code for constructing command for generating HIP fatbin as a function so that it can be reused by early finalization. It also modifies codegen of HIP host constructor functions to embed the device fatbin when it is available. Differential Revision: https://reviews.llvm.org/D52377 llvm-svn: 343611
2018-10-03 01:48:54 +08:00
// CHECK-SAME: {{.*}} "-o" [[A_BC_803:".*bc"]] "-x" "hip"
// CHECK-SAME: {{.*}} [[A_SRC:".*a.cu"]]
// CHECK: [[LLVM_LINK:"*.llvm-link"]] [[A_BC_803]]
// CHECK-SAME: "-o" [[LINKED_BC_DEV_A_803:".*-gfx803-linked-.*bc"]]
// CHECK: [[OPT:".*opt"]] [[LINKED_BC_DEV_A_803]] "-mtriple=amdgcn-amd-amdhsa"
// CHECK-SAME: "-mcpu=gfx803"
// CHECK-SAME: "-o" [[OPT_BC_DEV_A_803:".*-gfx803-optimized.*bc"]]
// CHECK: [[LLC: ".*llc"]] [[OPT_BC_DEV_A_803]] "-mtriple=amdgcn-amd-amdhsa"
[AMDGPU][HIP] Improve opt-level handling Summary: The HIP toolchain invokes `llc` without an explicit opt-level, meaning it always uses the default (-O2). This makes it impossible to use -O1, for example. The HIP toolchain also coerces -Os/-Oz to -O2 even when invoking opt, and it coerces -Og to -O2 rather than -O1. Forward the opt-level to `llc` as well as `opt`, and only coerce levels where it is required. Subscribers: cfe-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D70987
2019-12-04 06:18:21 +08:00
// CHECK-SAME: "-mcpu=gfx803"
Disable code object version 3 for HIP toolchain AMDGPU backend will switch to code object version 3 by default. Since HIP runtime is not ready, disable it until the runtime is ready. Differential Revision: https://reviews.llvm.org/D53325 llvm-svn: 344630
2018-10-17 01:36:23 +08:00
// CHECK-SAME: "-filetype=obj"
[AMDGPU][HIP] Improve opt-level handling Summary: The HIP toolchain invokes `llc` without an explicit opt-level, meaning it always uses the default (-O2). This makes it impossible to use -O1, for example. The HIP toolchain also coerces -Os/-Oz to -O2 even when invoking opt, and it coerces -Og to -O2 rather than -O1. Forward the opt-level to `llc` as well as `opt`, and only coerce levels where it is required. Subscribers: cfe-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D70987
2019-12-04 06:18:21 +08:00
// CHECK-SAME: "-o" [[OBJ_DEV_A_803:".*-gfx803-.*o"]]
[HIP] Support early finalization of device code for -fno-gpu-rdc This patch renames -f{no-}cuda-rdc to -f{no-}gpu-rdc and keeps the original options as aliases. When -fgpu-rdc is off, clang will assume the device code in each translation unit does not call external functions except those in the device library, therefore it is possible to compile the device code in each translation unit to self-contained kernels and embed them in the host object, so that the host object behaves like usual host object which can be linked by lld. The benefits of this feature is: 1. allow users to create static libraries which can be linked by host linker; 2. amortized device code linking time. This patch modifies HIP action builder to insert actions for linking device code and generating HIP fatbin, and pass HIP fatbin to host backend action. It extracts code for constructing command for generating HIP fatbin as a function so that it can be reused by early finalization. It also modifies codegen of HIP host constructor functions to embed the device fatbin when it is available. Differential Revision: https://reviews.llvm.org/D52377 llvm-svn: 343611
2018-10-03 01:48:54 +08:00
[HIP] Support attribute hip_pinned_shadow This patch introduces support of hip_pinned_shadow variable for HIP. A hip_pinned_shadow variable is a global variable with attribute hip_pinned_shadow. It has external linkage on device side and has no initializer. It has internal linkage on host side and has initializer or static constructor. It can be accessed in both device code and host code. This allows HIP runtime to implement support of HIP texture reference. Differential Revision: https://reviews.llvm.org/D62738 llvm-svn: 364381
2019-06-26 11:47:37 +08:00
// CHECK: [[LLD: ".*lld"]] "-flavor" "gnu" "-shared"
[HIP] Support early finalization of device code for -fno-gpu-rdc This patch renames -f{no-}cuda-rdc to -f{no-}gpu-rdc and keeps the original options as aliases. When -fgpu-rdc is off, clang will assume the device code in each translation unit does not call external functions except those in the device library, therefore it is possible to compile the device code in each translation unit to self-contained kernels and embed them in the host object, so that the host object behaves like usual host object which can be linked by lld. The benefits of this feature is: 1. allow users to create static libraries which can be linked by host linker; 2. amortized device code linking time. This patch modifies HIP action builder to insert actions for linking device code and generating HIP fatbin, and pass HIP fatbin to host backend action. It extracts code for constructing command for generating HIP fatbin as a function so that it can be reused by early finalization. It also modifies codegen of HIP host constructor functions to embed the device fatbin when it is available. Differential Revision: https://reviews.llvm.org/D52377 llvm-svn: 343611
2018-10-03 01:48:54 +08:00
// CHECK-SAME: "-o" "[[IMG_DEV_A_803:.*out]]" [[OBJ_DEV_A_803]]
//
// Compile device code in a.cu to code object for gfx900.
//
// CHECK: [[CLANG:".*clang.*"]] "-cc1" "-triple" "amdgcn-amd-amdhsa"
Relax restriction in tests to where "-emit-llvm-bc" and "-emit-obj" must appear. The CHECK lines as structured were requiring them to appear only in a certain position while all that is really needed is to check that they are present. llvm-svn: 354001
2019-02-14 09:11:32 +08:00
// CHECK-SAME: "-aux-triple" "x86_64-unknown-linux-gnu"
// CHECK-SAME: "-emit-llvm-bc"
[HIP] Support early finalization of device code for -fno-gpu-rdc This patch renames -f{no-}cuda-rdc to -f{no-}gpu-rdc and keeps the original options as aliases. When -fgpu-rdc is off, clang will assume the device code in each translation unit does not call external functions except those in the device library, therefore it is possible to compile the device code in each translation unit to self-contained kernels and embed them in the host object, so that the host object behaves like usual host object which can be linked by lld. The benefits of this feature is: 1. allow users to create static libraries which can be linked by host linker; 2. amortized device code linking time. This patch modifies HIP action builder to insert actions for linking device code and generating HIP fatbin, and pass HIP fatbin to host backend action. It extracts code for constructing command for generating HIP fatbin as a function so that it can be reused by early finalization. It also modifies codegen of HIP host constructor functions to embed the device fatbin when it is available. Differential Revision: https://reviews.llvm.org/D52377 llvm-svn: 343611
2018-10-03 01:48:54 +08:00
// CHECK-SAME: {{.*}} "-main-file-name" "a.cu" {{.*}} "-target-cpu" "gfx900"
[hip] Allow the declaration of functions with variadic arguments in HIP. Summary: - As variadic parameters have the lowest rank in overload resolution, without real usage of `va_arg`, they are commonly used as the catch-all fallbacks in SFINAE. As the front-end still reports errors on calls to `va_arg`, the declaration of functions with variadic arguments should be allowed in general. Reviewers: jlebar, tra, yaxunl Subscribers: cfe-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D69389
2019-10-24 23:41:11 +08:00
// CHECK-SAME: "-fcuda-is-device" "-fcuda-allow-variadic-functions" "-fvisibility" "hidden"
Add -fapply-global-visibility-to-externs for -cc1 Introduce an option to request global visibility settings be applied to declarations without a definition or an explicit visibility, rather than the existing behavior of giving these default visibility. When the visibility of all or most extern definitions are known this allows for the same optimisations -fvisibility permits without updating source code to annotate all declarations. Differential Revision: https://reviews.llvm.org/D56868 llvm-svn: 352391
2019-01-29 01:12:19 +08:00
// CHECK-SAME: "-fapply-global-visibility-to-externs"
[HIP] Use -mlink-builtin-bitcode to link device library Use -mlink-builtin-bitcode instead of llvm-link to link device library so that device library bitcode and user device code can be compiled in a consistent way. This is the same approach used by CUDA and OpenMP. Differential Revision: https://reviews.llvm.org/D60513 llvm-svn: 358290
2019-04-13 00:23:31 +08:00
// CHECK-SAME: "{{.*}}lib1.bc" "{{.*}}lib2.bc"
[HIP] Support early finalization of device code for -fno-gpu-rdc This patch renames -f{no-}cuda-rdc to -f{no-}gpu-rdc and keeps the original options as aliases. When -fgpu-rdc is off, clang will assume the device code in each translation unit does not call external functions except those in the device library, therefore it is possible to compile the device code in each translation unit to self-contained kernels and embed them in the host object, so that the host object behaves like usual host object which can be linked by lld. The benefits of this feature is: 1. allow users to create static libraries which can be linked by host linker; 2. amortized device code linking time. This patch modifies HIP action builder to insert actions for linking device code and generating HIP fatbin, and pass HIP fatbin to host backend action. It extracts code for constructing command for generating HIP fatbin as a function so that it can be reused by early finalization. It also modifies codegen of HIP host constructor functions to embed the device fatbin when it is available. Differential Revision: https://reviews.llvm.org/D52377 llvm-svn: 343611
2018-10-03 01:48:54 +08:00
// CHECK-SAME: {{.*}} "-o" [[A_BC_900:".*bc"]] "-x" "hip"
// CHECK-SAME: {{.*}} [[A_SRC]]
// CHECK: [[LLVM_LINK:"*.llvm-link"]] [[A_BC_900]]
// CHECK-SAME: "-o" [[LINKED_BC_DEV_A_900:".*-gfx900-linked-.*bc"]]
// CHECK: [[OPT:".*opt"]] [[LINKED_BC_DEV_A_900]] "-mtriple=amdgcn-amd-amdhsa"
// CHECK-SAME: "-mcpu=gfx900"
// CHECK-SAME: "-o" [[OPT_BC_DEV_A_900:".*-gfx900-optimized.*bc"]]
// CHECK: [[LLC: ".*llc"]] [[OPT_BC_DEV_A_900]] "-mtriple=amdgcn-amd-amdhsa"
[AMDGPU][HIP] Improve opt-level handling Summary: The HIP toolchain invokes `llc` without an explicit opt-level, meaning it always uses the default (-O2). This makes it impossible to use -O1, for example. The HIP toolchain also coerces -Os/-Oz to -O2 even when invoking opt, and it coerces -Og to -O2 rather than -O1. Forward the opt-level to `llc` as well as `opt`, and only coerce levels where it is required. Subscribers: cfe-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D70987
2019-12-04 06:18:21 +08:00
// CHECK-SAME: "-mcpu=gfx900"
Disable code object version 3 for HIP toolchain AMDGPU backend will switch to code object version 3 by default. Since HIP runtime is not ready, disable it until the runtime is ready. Differential Revision: https://reviews.llvm.org/D53325 llvm-svn: 344630
2018-10-17 01:36:23 +08:00
// CHECK-SAME: "-filetype=obj"
[AMDGPU][HIP] Improve opt-level handling Summary: The HIP toolchain invokes `llc` without an explicit opt-level, meaning it always uses the default (-O2). This makes it impossible to use -O1, for example. The HIP toolchain also coerces -Os/-Oz to -O2 even when invoking opt, and it coerces -Og to -O2 rather than -O1. Forward the opt-level to `llc` as well as `opt`, and only coerce levels where it is required. Subscribers: cfe-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D70987
2019-12-04 06:18:21 +08:00
// CHECK-SAME: "-o" [[OBJ_DEV_A_900:".*-gfx900-.*o"]]
[HIP] Support early finalization of device code for -fno-gpu-rdc This patch renames -f{no-}cuda-rdc to -f{no-}gpu-rdc and keeps the original options as aliases. When -fgpu-rdc is off, clang will assume the device code in each translation unit does not call external functions except those in the device library, therefore it is possible to compile the device code in each translation unit to self-contained kernels and embed them in the host object, so that the host object behaves like usual host object which can be linked by lld. The benefits of this feature is: 1. allow users to create static libraries which can be linked by host linker; 2. amortized device code linking time. This patch modifies HIP action builder to insert actions for linking device code and generating HIP fatbin, and pass HIP fatbin to host backend action. It extracts code for constructing command for generating HIP fatbin as a function so that it can be reused by early finalization. It also modifies codegen of HIP host constructor functions to embed the device fatbin when it is available. Differential Revision: https://reviews.llvm.org/D52377 llvm-svn: 343611
2018-10-03 01:48:54 +08:00
[HIP] Support attribute hip_pinned_shadow This patch introduces support of hip_pinned_shadow variable for HIP. A hip_pinned_shadow variable is a global variable with attribute hip_pinned_shadow. It has external linkage on device side and has no initializer. It has internal linkage on host side and has initializer or static constructor. It can be accessed in both device code and host code. This allows HIP runtime to implement support of HIP texture reference. Differential Revision: https://reviews.llvm.org/D62738 llvm-svn: 364381
2019-06-26 11:47:37 +08:00
// CHECK: [[LLD: ".*lld"]] "-flavor" "gnu" "-shared"
[HIP] Support early finalization of device code for -fno-gpu-rdc This patch renames -f{no-}cuda-rdc to -f{no-}gpu-rdc and keeps the original options as aliases. When -fgpu-rdc is off, clang will assume the device code in each translation unit does not call external functions except those in the device library, therefore it is possible to compile the device code in each translation unit to self-contained kernels and embed them in the host object, so that the host object behaves like usual host object which can be linked by lld. The benefits of this feature is: 1. allow users to create static libraries which can be linked by host linker; 2. amortized device code linking time. This patch modifies HIP action builder to insert actions for linking device code and generating HIP fatbin, and pass HIP fatbin to host backend action. It extracts code for constructing command for generating HIP fatbin as a function so that it can be reused by early finalization. It also modifies codegen of HIP host constructor functions to embed the device fatbin when it is available. Differential Revision: https://reviews.llvm.org/D52377 llvm-svn: 343611
2018-10-03 01:48:54 +08:00
// CHECK-SAME: "-o" "[[IMG_DEV_A_900:.*out]]" [[OBJ_DEV_A_900]]
//
// Bundle and embed device code in host object for a.cu.
//
// CHECK: [[BUNDLER:".*clang-offload-bundler"]] "-type=o"
// CHECK-SAME: "-targets={{.*}},hip-amdgcn-amd-amdhsa-gfx803,hip-amdgcn-amd-amdhsa-gfx900"
// CHECK-SAME: "-inputs={{.*}},[[IMG_DEV_A_803]],[[IMG_DEV_A_900]]" "-outputs=[[BUNDLE_A:.*hipfb]]"
// CHECK: [[CLANG]] "-cc1" "-triple" "x86_64-unknown-linux-gnu"
Relax restriction in tests to where "-emit-llvm-bc" and "-emit-obj" must appear. The CHECK lines as structured were requiring them to appear only in a certain position while all that is really needed is to check that they are present. llvm-svn: 354001
2019-02-14 09:11:32 +08:00
// CHECK-SAME: "-aux-triple" "amdgcn-amd-amdhsa"
// CHECK-SAME: "-emit-obj"
[HIP] Support early finalization of device code for -fno-gpu-rdc This patch renames -f{no-}cuda-rdc to -f{no-}gpu-rdc and keeps the original options as aliases. When -fgpu-rdc is off, clang will assume the device code in each translation unit does not call external functions except those in the device library, therefore it is possible to compile the device code in each translation unit to self-contained kernels and embed them in the host object, so that the host object behaves like usual host object which can be linked by lld. The benefits of this feature is: 1. allow users to create static libraries which can be linked by host linker; 2. amortized device code linking time. This patch modifies HIP action builder to insert actions for linking device code and generating HIP fatbin, and pass HIP fatbin to host backend action. It extracts code for constructing command for generating HIP fatbin as a function so that it can be reused by early finalization. It also modifies codegen of HIP host constructor functions to embed the device fatbin when it is available. Differential Revision: https://reviews.llvm.org/D52377 llvm-svn: 343611
2018-10-03 01:48:54 +08:00
// CHECK-SAME: {{.*}} "-main-file-name" "a.cu"
[Driver] Move the "-o OUT -x TYPE SRC.c" flags to the end of -cc1 New -cc1 arguments, such as -faddrsig, have started appearing after the input name. I personally find it convenient for the input to be the last argument to the compile command line, since I often need to edit it when running crash reproduction scripts. Differential Revision: https://reviews.llvm.org/D62270 llvm-svn: 361530
2019-05-24 02:35:43 +08:00
// CHECK-SAME: {{.*}} "-fcuda-include-gpubinary" "[[BUNDLE_A]]"
[HIP] Support early finalization of device code for -fno-gpu-rdc This patch renames -f{no-}cuda-rdc to -f{no-}gpu-rdc and keeps the original options as aliases. When -fgpu-rdc is off, clang will assume the device code in each translation unit does not call external functions except those in the device library, therefore it is possible to compile the device code in each translation unit to self-contained kernels and embed them in the host object, so that the host object behaves like usual host object which can be linked by lld. The benefits of this feature is: 1. allow users to create static libraries which can be linked by host linker; 2. amortized device code linking time. This patch modifies HIP action builder to insert actions for linking device code and generating HIP fatbin, and pass HIP fatbin to host backend action. It extracts code for constructing command for generating HIP fatbin as a function so that it can be reused by early finalization. It also modifies codegen of HIP host constructor functions to embed the device fatbin when it is available. Differential Revision: https://reviews.llvm.org/D52377 llvm-svn: 343611
2018-10-03 01:48:54 +08:00
// CHECK-SAME: {{.*}} "-o" [[A_OBJ_HOST:".*o"]] "-x" "hip"
// CHECK-SAME: {{.*}} [[A_SRC]]
//
// Compile device code in b.hip to code object for gfx803.
//
// CHECK: [[CLANG:".*clang.*"]] "-cc1" "-triple" "amdgcn-amd-amdhsa"
Relax restriction in tests to where "-emit-llvm-bc" and "-emit-obj" must appear. The CHECK lines as structured were requiring them to appear only in a certain position while all that is really needed is to check that they are present. llvm-svn: 354001
2019-02-14 09:11:32 +08:00
// CHECK-SAME: "-aux-triple" "x86_64-unknown-linux-gnu"
// CHECK-SAME: "-emit-llvm-bc"
[HIP] Support early finalization of device code for -fno-gpu-rdc This patch renames -f{no-}cuda-rdc to -f{no-}gpu-rdc and keeps the original options as aliases. When -fgpu-rdc is off, clang will assume the device code in each translation unit does not call external functions except those in the device library, therefore it is possible to compile the device code in each translation unit to self-contained kernels and embed them in the host object, so that the host object behaves like usual host object which can be linked by lld. The benefits of this feature is: 1. allow users to create static libraries which can be linked by host linker; 2. amortized device code linking time. This patch modifies HIP action builder to insert actions for linking device code and generating HIP fatbin, and pass HIP fatbin to host backend action. It extracts code for constructing command for generating HIP fatbin as a function so that it can be reused by early finalization. It also modifies codegen of HIP host constructor functions to embed the device fatbin when it is available. Differential Revision: https://reviews.llvm.org/D52377 llvm-svn: 343611
2018-10-03 01:48:54 +08:00
// CHECK-SAME: {{.*}} "-main-file-name" "b.hip" {{.*}} "-target-cpu" "gfx803"
[hip] Allow the declaration of functions with variadic arguments in HIP. Summary: - As variadic parameters have the lowest rank in overload resolution, without real usage of `va_arg`, they are commonly used as the catch-all fallbacks in SFINAE. As the front-end still reports errors on calls to `va_arg`, the declaration of functions with variadic arguments should be allowed in general. Reviewers: jlebar, tra, yaxunl Subscribers: cfe-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D69389
2019-10-24 23:41:11 +08:00
// CHECK-SAME: "-fcuda-is-device" "-fcuda-allow-variadic-functions" "-fvisibility" "hidden"
Add -fapply-global-visibility-to-externs for -cc1 Introduce an option to request global visibility settings be applied to declarations without a definition or an explicit visibility, rather than the existing behavior of giving these default visibility. When the visibility of all or most extern definitions are known this allows for the same optimisations -fvisibility permits without updating source code to annotate all declarations. Differential Revision: https://reviews.llvm.org/D56868 llvm-svn: 352391
2019-01-29 01:12:19 +08:00
// CHECK-SAME: "-fapply-global-visibility-to-externs"
[HIP] Use -mlink-builtin-bitcode to link device library Use -mlink-builtin-bitcode instead of llvm-link to link device library so that device library bitcode and user device code can be compiled in a consistent way. This is the same approach used by CUDA and OpenMP. Differential Revision: https://reviews.llvm.org/D60513 llvm-svn: 358290
2019-04-13 00:23:31 +08:00
// CHECK-SAME: "{{.*}}lib1.bc" "{{.*}}lib2.bc"
[HIP] Support early finalization of device code for -fno-gpu-rdc This patch renames -f{no-}cuda-rdc to -f{no-}gpu-rdc and keeps the original options as aliases. When -fgpu-rdc is off, clang will assume the device code in each translation unit does not call external functions except those in the device library, therefore it is possible to compile the device code in each translation unit to self-contained kernels and embed them in the host object, so that the host object behaves like usual host object which can be linked by lld. The benefits of this feature is: 1. allow users to create static libraries which can be linked by host linker; 2. amortized device code linking time. This patch modifies HIP action builder to insert actions for linking device code and generating HIP fatbin, and pass HIP fatbin to host backend action. It extracts code for constructing command for generating HIP fatbin as a function so that it can be reused by early finalization. It also modifies codegen of HIP host constructor functions to embed the device fatbin when it is available. Differential Revision: https://reviews.llvm.org/D52377 llvm-svn: 343611
2018-10-03 01:48:54 +08:00
// CHECK-SAME: {{.*}} "-o" [[B_BC_803:".*bc"]] "-x" "hip"
// CHECK-SAME: {{.*}} [[B_SRC:".*b.hip"]]
// CHECK: [[LLVM_LINK:"*.llvm-link"]] [[B_BC_803]]
// CHECK-SAME: "-o" [[LINKED_BC_DEV_B_803:".*-gfx803-linked-.*bc"]]
// CHECK: [[OPT:".*opt"]] [[LINKED_BC_DEV_B_803]] "-mtriple=amdgcn-amd-amdhsa"
// CHECK-SAME: "-mcpu=gfx803"
// CHECK-SAME: "-o" [[OPT_BC_DEV_B_803:".*-gfx803-optimized.*bc"]]
// CHECK: [[LLC: ".*llc"]] [[OPT_BC_DEV_B_803]] "-mtriple=amdgcn-amd-amdhsa"
[AMDGPU][HIP] Improve opt-level handling Summary: The HIP toolchain invokes `llc` without an explicit opt-level, meaning it always uses the default (-O2). This makes it impossible to use -O1, for example. The HIP toolchain also coerces -Os/-Oz to -O2 even when invoking opt, and it coerces -Og to -O2 rather than -O1. Forward the opt-level to `llc` as well as `opt`, and only coerce levels where it is required. Subscribers: cfe-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D70987
2019-12-04 06:18:21 +08:00
// CHECK-SAME: "-mcpu=gfx803"
Disable code object version 3 for HIP toolchain AMDGPU backend will switch to code object version 3 by default. Since HIP runtime is not ready, disable it until the runtime is ready. Differential Revision: https://reviews.llvm.org/D53325 llvm-svn: 344630
2018-10-17 01:36:23 +08:00
// CHECK-SAME: "-filetype=obj"
[AMDGPU][HIP] Improve opt-level handling Summary: The HIP toolchain invokes `llc` without an explicit opt-level, meaning it always uses the default (-O2). This makes it impossible to use -O1, for example. The HIP toolchain also coerces -Os/-Oz to -O2 even when invoking opt, and it coerces -Og to -O2 rather than -O1. Forward the opt-level to `llc` as well as `opt`, and only coerce levels where it is required. Subscribers: cfe-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D70987
2019-12-04 06:18:21 +08:00
// CHECK-SAME: "-o" [[OBJ_DEV_B_803:".*-gfx803-.*o"]]
[HIP] Support early finalization of device code for -fno-gpu-rdc This patch renames -f{no-}cuda-rdc to -f{no-}gpu-rdc and keeps the original options as aliases. When -fgpu-rdc is off, clang will assume the device code in each translation unit does not call external functions except those in the device library, therefore it is possible to compile the device code in each translation unit to self-contained kernels and embed them in the host object, so that the host object behaves like usual host object which can be linked by lld. The benefits of this feature is: 1. allow users to create static libraries which can be linked by host linker; 2. amortized device code linking time. This patch modifies HIP action builder to insert actions for linking device code and generating HIP fatbin, and pass HIP fatbin to host backend action. It extracts code for constructing command for generating HIP fatbin as a function so that it can be reused by early finalization. It also modifies codegen of HIP host constructor functions to embed the device fatbin when it is available. Differential Revision: https://reviews.llvm.org/D52377 llvm-svn: 343611
2018-10-03 01:48:54 +08:00
[HIP] Support attribute hip_pinned_shadow This patch introduces support of hip_pinned_shadow variable for HIP. A hip_pinned_shadow variable is a global variable with attribute hip_pinned_shadow. It has external linkage on device side and has no initializer. It has internal linkage on host side and has initializer or static constructor. It can be accessed in both device code and host code. This allows HIP runtime to implement support of HIP texture reference. Differential Revision: https://reviews.llvm.org/D62738 llvm-svn: 364381
2019-06-26 11:47:37 +08:00
// CHECK: [[LLD: ".*lld"]] "-flavor" "gnu" "-shared"
[HIP] Support early finalization of device code for -fno-gpu-rdc This patch renames -f{no-}cuda-rdc to -f{no-}gpu-rdc and keeps the original options as aliases. When -fgpu-rdc is off, clang will assume the device code in each translation unit does not call external functions except those in the device library, therefore it is possible to compile the device code in each translation unit to self-contained kernels and embed them in the host object, so that the host object behaves like usual host object which can be linked by lld. The benefits of this feature is: 1. allow users to create static libraries which can be linked by host linker; 2. amortized device code linking time. This patch modifies HIP action builder to insert actions for linking device code and generating HIP fatbin, and pass HIP fatbin to host backend action. It extracts code for constructing command for generating HIP fatbin as a function so that it can be reused by early finalization. It also modifies codegen of HIP host constructor functions to embed the device fatbin when it is available. Differential Revision: https://reviews.llvm.org/D52377 llvm-svn: 343611
2018-10-03 01:48:54 +08:00
// CHECK-SAME: "-o" "[[IMG_DEV_B_803:.*out]]" [[OBJ_DEV_B_803]]
//
// Compile device code in b.hip to code object for gfx900.
//
// CHECK: [[CLANG:".*clang.*"]] "-cc1" "-triple" "amdgcn-amd-amdhsa"
Relax restriction in tests to where "-emit-llvm-bc" and "-emit-obj" must appear. The CHECK lines as structured were requiring them to appear only in a certain position while all that is really needed is to check that they are present. llvm-svn: 354001
2019-02-14 09:11:32 +08:00
// CHECK-SAME: "-aux-triple" "x86_64-unknown-linux-gnu"
// CHECK-SAME: "-emit-llvm-bc"
[HIP] Support early finalization of device code for -fno-gpu-rdc This patch renames -f{no-}cuda-rdc to -f{no-}gpu-rdc and keeps the original options as aliases. When -fgpu-rdc is off, clang will assume the device code in each translation unit does not call external functions except those in the device library, therefore it is possible to compile the device code in each translation unit to self-contained kernels and embed them in the host object, so that the host object behaves like usual host object which can be linked by lld. The benefits of this feature is: 1. allow users to create static libraries which can be linked by host linker; 2. amortized device code linking time. This patch modifies HIP action builder to insert actions for linking device code and generating HIP fatbin, and pass HIP fatbin to host backend action. It extracts code for constructing command for generating HIP fatbin as a function so that it can be reused by early finalization. It also modifies codegen of HIP host constructor functions to embed the device fatbin when it is available. Differential Revision: https://reviews.llvm.org/D52377 llvm-svn: 343611
2018-10-03 01:48:54 +08:00
// CHECK-SAME: {{.*}} "-main-file-name" "b.hip" {{.*}} "-target-cpu" "gfx900"
[hip] Allow the declaration of functions with variadic arguments in HIP. Summary: - As variadic parameters have the lowest rank in overload resolution, without real usage of `va_arg`, they are commonly used as the catch-all fallbacks in SFINAE. As the front-end still reports errors on calls to `va_arg`, the declaration of functions with variadic arguments should be allowed in general. Reviewers: jlebar, tra, yaxunl Subscribers: cfe-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D69389
2019-10-24 23:41:11 +08:00
// CHECK-SAME: "-fcuda-is-device" "-fcuda-allow-variadic-functions" "-fvisibility" "hidden"
Add -fapply-global-visibility-to-externs for -cc1 Introduce an option to request global visibility settings be applied to declarations without a definition or an explicit visibility, rather than the existing behavior of giving these default visibility. When the visibility of all or most extern definitions are known this allows for the same optimisations -fvisibility permits without updating source code to annotate all declarations. Differential Revision: https://reviews.llvm.org/D56868 llvm-svn: 352391
2019-01-29 01:12:19 +08:00
// CHECK-SAME: "-fapply-global-visibility-to-externs"
[HIP] Use -mlink-builtin-bitcode to link device library Use -mlink-builtin-bitcode instead of llvm-link to link device library so that device library bitcode and user device code can be compiled in a consistent way. This is the same approach used by CUDA and OpenMP. Differential Revision: https://reviews.llvm.org/D60513 llvm-svn: 358290
2019-04-13 00:23:31 +08:00
// CHECK-SAME: "{{.*}}lib1.bc" "{{.*}}lib2.bc"
[HIP] Support early finalization of device code for -fno-gpu-rdc This patch renames -f{no-}cuda-rdc to -f{no-}gpu-rdc and keeps the original options as aliases. When -fgpu-rdc is off, clang will assume the device code in each translation unit does not call external functions except those in the device library, therefore it is possible to compile the device code in each translation unit to self-contained kernels and embed them in the host object, so that the host object behaves like usual host object which can be linked by lld. The benefits of this feature is: 1. allow users to create static libraries which can be linked by host linker; 2. amortized device code linking time. This patch modifies HIP action builder to insert actions for linking device code and generating HIP fatbin, and pass HIP fatbin to host backend action. It extracts code for constructing command for generating HIP fatbin as a function so that it can be reused by early finalization. It also modifies codegen of HIP host constructor functions to embed the device fatbin when it is available. Differential Revision: https://reviews.llvm.org/D52377 llvm-svn: 343611
2018-10-03 01:48:54 +08:00
// CHECK-SAME: {{.*}} "-o" [[B_BC_900:".*bc"]] "-x" "hip"
// CHECK-SAME: {{.*}} [[B_SRC]]
// CHECK: [[LLVM_LINK:"*.llvm-link"]] [[B_BC_900]]
// CHECK-SAME: "-o" [[LINKED_BC_DEV_B_900:".*-gfx900-linked-.*bc"]]
// CHECK: [[OPT:".*opt"]] [[LINKED_BC_DEV_B_900]] "-mtriple=amdgcn-amd-amdhsa"
// CHECK-SAME: "-mcpu=gfx900"
// CHECK-SAME: "-o" [[OPT_BC_DEV_B_900:".*-gfx900-optimized.*bc"]]
// CHECK: [[LLC: ".*llc"]] [[OPT_BC_DEV_B_900]] "-mtriple=amdgcn-amd-amdhsa"
[AMDGPU][HIP] Improve opt-level handling Summary: The HIP toolchain invokes `llc` without an explicit opt-level, meaning it always uses the default (-O2). This makes it impossible to use -O1, for example. The HIP toolchain also coerces -Os/-Oz to -O2 even when invoking opt, and it coerces -Og to -O2 rather than -O1. Forward the opt-level to `llc` as well as `opt`, and only coerce levels where it is required. Subscribers: cfe-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D70987
2019-12-04 06:18:21 +08:00
// CHECk-SAME: "-mcpu=gfx900"
Disable code object version 3 for HIP toolchain AMDGPU backend will switch to code object version 3 by default. Since HIP runtime is not ready, disable it until the runtime is ready. Differential Revision: https://reviews.llvm.org/D53325 llvm-svn: 344630
2018-10-17 01:36:23 +08:00
// CHECK-SAME: "-filetype=obj"
[AMDGPU][HIP] Improve opt-level handling Summary: The HIP toolchain invokes `llc` without an explicit opt-level, meaning it always uses the default (-O2). This makes it impossible to use -O1, for example. The HIP toolchain also coerces -Os/-Oz to -O2 even when invoking opt, and it coerces -Og to -O2 rather than -O1. Forward the opt-level to `llc` as well as `opt`, and only coerce levels where it is required. Subscribers: cfe-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D70987
2019-12-04 06:18:21 +08:00
// CHECK-SAME: "-o" [[OBJ_DEV_B_900:".*-gfx900-.*o"]]
[HIP] Support early finalization of device code for -fno-gpu-rdc This patch renames -f{no-}cuda-rdc to -f{no-}gpu-rdc and keeps the original options as aliases. When -fgpu-rdc is off, clang will assume the device code in each translation unit does not call external functions except those in the device library, therefore it is possible to compile the device code in each translation unit to self-contained kernels and embed them in the host object, so that the host object behaves like usual host object which can be linked by lld. The benefits of this feature is: 1. allow users to create static libraries which can be linked by host linker; 2. amortized device code linking time. This patch modifies HIP action builder to insert actions for linking device code and generating HIP fatbin, and pass HIP fatbin to host backend action. It extracts code for constructing command for generating HIP fatbin as a function so that it can be reused by early finalization. It also modifies codegen of HIP host constructor functions to embed the device fatbin when it is available. Differential Revision: https://reviews.llvm.org/D52377 llvm-svn: 343611
2018-10-03 01:48:54 +08:00
[HIP] Support attribute hip_pinned_shadow This patch introduces support of hip_pinned_shadow variable for HIP. A hip_pinned_shadow variable is a global variable with attribute hip_pinned_shadow. It has external linkage on device side and has no initializer. It has internal linkage on host side and has initializer or static constructor. It can be accessed in both device code and host code. This allows HIP runtime to implement support of HIP texture reference. Differential Revision: https://reviews.llvm.org/D62738 llvm-svn: 364381
2019-06-26 11:47:37 +08:00
// CHECK: [[LLD: ".*lld"]] "-flavor" "gnu" "-shared"
[HIP] Support early finalization of device code for -fno-gpu-rdc This patch renames -f{no-}cuda-rdc to -f{no-}gpu-rdc and keeps the original options as aliases. When -fgpu-rdc is off, clang will assume the device code in each translation unit does not call external functions except those in the device library, therefore it is possible to compile the device code in each translation unit to self-contained kernels and embed them in the host object, so that the host object behaves like usual host object which can be linked by lld. The benefits of this feature is: 1. allow users to create static libraries which can be linked by host linker; 2. amortized device code linking time. This patch modifies HIP action builder to insert actions for linking device code and generating HIP fatbin, and pass HIP fatbin to host backend action. It extracts code for constructing command for generating HIP fatbin as a function so that it can be reused by early finalization. It also modifies codegen of HIP host constructor functions to embed the device fatbin when it is available. Differential Revision: https://reviews.llvm.org/D52377 llvm-svn: 343611
2018-10-03 01:48:54 +08:00
// CHECK-SAME: "-o" "[[IMG_DEV_B_900:.*out]]" [[OBJ_DEV_B_900]]
//
// Bundle and embed device code in host object for b.hip.
//
// CHECK: [[BUNDLER:".*clang-offload-bundler"]] "-type=o"
// CHECK-SAME: "-targets={{.*}},hip-amdgcn-amd-amdhsa-gfx803,hip-amdgcn-amd-amdhsa-gfx900"
// CHECK-SAME: "-inputs={{.*}},[[IMG_DEV_B_803]],[[IMG_DEV_B_900]]" "-outputs=[[BUNDLE_A:.*hipfb]]"
// CHECK: [[CLANG]] "-cc1" "-triple" "x86_64-unknown-linux-gnu"
Relax restriction in tests to where "-emit-llvm-bc" and "-emit-obj" must appear. The CHECK lines as structured were requiring them to appear only in a certain position while all that is really needed is to check that they are present. llvm-svn: 354001
2019-02-14 09:11:32 +08:00
// CHECK-SAME: "-aux-triple" "amdgcn-amd-amdhsa"
// CHECK-SAME: "-emit-obj"
[HIP] Support early finalization of device code for -fno-gpu-rdc This patch renames -f{no-}cuda-rdc to -f{no-}gpu-rdc and keeps the original options as aliases. When -fgpu-rdc is off, clang will assume the device code in each translation unit does not call external functions except those in the device library, therefore it is possible to compile the device code in each translation unit to self-contained kernels and embed them in the host object, so that the host object behaves like usual host object which can be linked by lld. The benefits of this feature is: 1. allow users to create static libraries which can be linked by host linker; 2. amortized device code linking time. This patch modifies HIP action builder to insert actions for linking device code and generating HIP fatbin, and pass HIP fatbin to host backend action. It extracts code for constructing command for generating HIP fatbin as a function so that it can be reused by early finalization. It also modifies codegen of HIP host constructor functions to embed the device fatbin when it is available. Differential Revision: https://reviews.llvm.org/D52377 llvm-svn: 343611
2018-10-03 01:48:54 +08:00
// CHECK-SAME: {{.*}} "-main-file-name" "b.hip"
[Driver] Move the "-o OUT -x TYPE SRC.c" flags to the end of -cc1 New -cc1 arguments, such as -faddrsig, have started appearing after the input name. I personally find it convenient for the input to be the last argument to the compile command line, since I often need to edit it when running crash reproduction scripts. Differential Revision: https://reviews.llvm.org/D62270 llvm-svn: 361530
2019-05-24 02:35:43 +08:00
// CHECK-SAME: {{.*}} "-fcuda-include-gpubinary" "[[BUNDLE_A]]"
[HIP] Support early finalization of device code for -fno-gpu-rdc This patch renames -f{no-}cuda-rdc to -f{no-}gpu-rdc and keeps the original options as aliases. When -fgpu-rdc is off, clang will assume the device code in each translation unit does not call external functions except those in the device library, therefore it is possible to compile the device code in each translation unit to self-contained kernels and embed them in the host object, so that the host object behaves like usual host object which can be linked by lld. The benefits of this feature is: 1. allow users to create static libraries which can be linked by host linker; 2. amortized device code linking time. This patch modifies HIP action builder to insert actions for linking device code and generating HIP fatbin, and pass HIP fatbin to host backend action. It extracts code for constructing command for generating HIP fatbin as a function so that it can be reused by early finalization. It also modifies codegen of HIP host constructor functions to embed the device fatbin when it is available. Differential Revision: https://reviews.llvm.org/D52377 llvm-svn: 343611
2018-10-03 01:48:54 +08:00
// CHECK-SAME: {{.*}} "-o" [[B_OBJ_HOST:".*o"]] "-x" "hip"
// CHECK-SAME: {{.*}} [[B_SRC]]
//
// Link host objects.
//
// CHECK: [[LD:".*ld.*"]] {{.*}} [[A_OBJ_HOST]] [[B_OBJ_HOST]]
// CHECK-NOT: "-T" "{{.*}}.lk"