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llvm-project/llvm/test/CodeGen/Hexagon/opt-fabs.ll

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[Hexagon] Bit-based instruction simplification Analyze bit patterns of operands and values of instructions to perform various simplifications, dead/redundant code elimination, etc. llvm-svn: 250868
2015-10-21 06:57:13 +08:00
; RUN: llc -mtriple=hexagon-unknown-elf -mcpu=hexagonv5 -hexagon-bit=0 < %s | FileCheck %s
Hexagon V5 FP Support. llvm-svn: 156568
2012-05-11 04:20:25 +08:00
; Optimize fabsf to clrbit in V5.
[Hexagon] Replace instruction definitions with auto-generated ones llvm-svn: 294753
2017-02-10 23:33:13 +08:00
; CHECK: r{{[0-9]+}} = clrbit(r{{[0-9]+}},#31)
Hexagon V5 FP Support. llvm-svn: 156568
2012-05-11 04:20:25 +08:00
define float @my_fabsf(float %x) nounwind {
entry:
%x.addr = alloca float, align 4
store float %x, float* %x.addr, align 4
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction Essentially the same as the GEP change in r230786. A similar migration script can be used to update test cases, though a few more test case improvements/changes were required this time around: (r229269-r229278) import fileinput import sys import re pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)") for line in sys.stdin: sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line)) Reviewers: rafael, dexonsmith, grosser Differential Revision: http://reviews.llvm.org/D7649 llvm-svn: 230794
2015-02-28 05:17:42 +08:00
%0 = load float, float* %x.addr, align 4
Refactor and check "onlyReadsMemory" before optimizing builtins. This patch is mostly just refactoring a bunch of copy-and-pasted code, but it also adds a check that the call instructions are readnone or readonly. That check was already present for sin, cos, sqrt, log2, and exp2 calls, but it was missing for the rest of the builtins being handled in this code. llvm-svn: 161282
2012-08-04 07:29:17 +08:00
%call = call float @fabsf(float %0) readnone
Hexagon V5 FP Support. llvm-svn: 156568
2012-05-11 04:20:25 +08:00
ret float %call
}
declare float @fabsf(float)