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llvm-project/llvm/test/MC/X86/intel-syntax-error.s

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Add missing test for r215031 llvm-svn: 215374
2014-08-12 02:34:54 +08:00
// RUN: not llvm-mc -triple i686-unknown-unknown -x86-asm-syntax=att %s -o /dev/null 2>&1 | FileCheck %s
// This tests weird forms of Intel and AT&T syntax that gas accepts that we
// don't. The [no]prefix operand of the syntax directive indicates whether
// registers need a '%' prefix.
.intel_syntax prefix
// CHECK: error: '.intel_syntax prefix' is not supported: registers must not have a '%' prefix in .intel_syntax
_test2:
mov DWORD PTR [%esp - 4], 257
.att_syntax noprefix
// CHECK: error: '.att_syntax noprefix' is not supported: registers must have a '%' prefix in .att_syntax
movl $257, -4(esp)
[MC] Fix Intel Operand assembly parsing for .set ids Recommitting after fixing overaggressive fastpath return in parsing. Fix intel syntax special case identifier operands that refer to a constant (e.g. .set <ID> n) to be interpreted as immediate not memory in parsing. Associated commit to fix clang test commited shortly. Reviewers: rnk Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D22585 llvm-svn: 277489
2016-08-03 01:56:03 +08:00
.intel_syntax noprefix
.global arr
.global i
.set FOO, 2
[X86AsmParser] Refactoring, (almost) NFC. Some refactoring to X86AsmParser, mostly regarding the way rewrites are conducted. Mainly, we try to concentrate all the rewrite effort under one hood, so it'll hopefully be less of a mess and easier to maintain and understand. naturally, some frontend tests were affected: D36794 Differential Revision: https://reviews.llvm.org/D36793 llvm-svn: 311639
2017-08-24 16:46:25 +08:00
[X86] Fix some tests that didn't assert anything llvm-svn: 283322
2016-10-05 22:46:14 +08:00
//CHECK: error: cannot use more than one symbol in memory operand
[MC] Fix Intel Operand assembly parsing for .set ids Recommitting after fixing overaggressive fastpath return in parsing. Fix intel syntax special case identifier operands that refer to a constant (e.g. .set <ID> n) to be interpreted as immediate not memory in parsing. Associated commit to fix clang test commited shortly. Reviewers: rnk Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D22585 llvm-svn: 277489
2016-08-03 01:56:03 +08:00
mov eax, DWORD PTR arr[i]
[X86] Don't randomly encode %rip where illegal Differential Revision: https://reviews.llvm.org/D25112 llvm-svn: 283326
2016-10-05 23:23:35 +08:00
//CHECK: error: rip can only be used as a base register
.code64
mov rax, rip
//CHECK: error: invalid base+index expression
mov rbx, [rax+rip]
[X86AsmParser] Refactoring, (almost) NFC. Some refactoring to X86AsmParser, mostly regarding the way rewrites are conducted. Mainly, we try to concentrate all the rewrite effort under one hood, so it'll hopefully be less of a mess and easier to maintain and understand. naturally, some frontend tests were affected: D36794 Differential Revision: https://reviews.llvm.org/D36793 llvm-svn: 311639
2017-08-24 16:46:25 +08:00
//CHECK: error: scale factor in address must be 1, 2, 4 or 8
lea RDX, [unknown_number * RAX + RBX + _foo]
//CHECK: error: BaseReg/IndexReg already set!
lea RDX, [4 * RAX + 27 * RBX + _pat]
//CHECK: error: unexpected bracket encountered
lea RDX, [[arr]
//CHECK: error: unexpected bracket encountered
lea RDX, [arr[]