forked from OSchip/llvm-project
36 lines
1.0 KiB
LLVM
36 lines
1.0 KiB
LLVM
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; RUN: llc -march=hexagon -enable-pipeliner -stats -o /dev/null < %s 2>&1 | FileCheck %s --check-prefix=STATS
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; REQUIRES: asserts
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; We're unable to pipeline a loop with a subreg as an operand of a Phi.
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; STATS-NOT: 1 pipeliner - Number of loops software pipelined
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; Function Attrs: nounwind readnone
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define void @f0(i32 %a0) #0 {
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b0:
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%v0 = sext i32 %a0 to i64
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br label %b1
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b1: ; preds = %b1, %b0
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%v1 = phi i32 [ 805306368, %b0 ], [ %v12, %b1 ]
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%v2 = phi i32 [ 5, %b0 ], [ %v13, %b1 ]
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%v3 = sext i32 %v1 to i64
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%v4 = mul nsw i64 %v3, %v0
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%v5 = lshr i64 %v4, 32
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%v6 = trunc i64 %v5 to i32
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%v7 = sub nsw i32 536870912, %v6
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%v8 = sext i32 %v7 to i64
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%v9 = mul nsw i64 %v8, %v3
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%v10 = lshr i64 %v9, 32
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%v11 = shl nuw nsw i64 %v10, 4
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%v12 = trunc i64 %v11 to i32
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%v13 = add nsw i32 %v2, -1
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%v14 = icmp eq i32 %v13, 0
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br i1 %v14, label %b2, label %b1
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b2: ; preds = %b1
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ret void
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}
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attributes #0 = { nounwind readnone "target-cpu"="hexagonv55" }
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