forked from OSchip/llvm-project
40 lines
1007 B
LLVM
40 lines
1007 B
LLVM
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; RUN: llc -march=hexagon < %s | FileCheck %s
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;
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; Check that the immediate form for the store instructions are generated.
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;
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; CHECK: memw(r{{[0-9]+}}+#156) = #0
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; CHECK: memw(r{{[0-9]+}}+#160) = ##g0+144
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; CHECK: memw(r{{[0-9]+}}+#172) = ##f3
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%s.0 = type { [156 x i8], i8*, i8*, i8, i8*, void (i8*)*, i8 }
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@g0 = common global %s.0 zeroinitializer, align 4
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; Function Attrs: nounwind
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define void @f0(%s.0* %a0) #0 {
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b0:
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%v0 = getelementptr inbounds %s.0, %s.0* %a0, i32 0, i32 1
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store i8* null, i8** %v0, align 4
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ret void
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}
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; Function Attrs: nounwind
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define void @f1(%s.0* %a0) #0 {
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b0:
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%v0 = getelementptr inbounds %s.0, %s.0* %a0, i32 0, i32 2
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store i8* getelementptr inbounds (%s.0, %s.0* @g0, i32 0, i32 0, i32 144), i8** %v0, align 4
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ret void
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}
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; Function Attrs: nounwind
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define void @f2(%s.0* %a0) #0 {
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b0:
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%v0 = getelementptr inbounds %s.0, %s.0* %a0, i32 0, i32 5
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store void (i8*)* @f3, void (i8*)** %v0, align 4
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ret void
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}
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declare void @f3(i8*)
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attributes #0 = { nounwind }
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