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llvm-project/llvm/test/CodeGen/AMDGPU/default-fp-mode.ll

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AMDGPU: Simplify tests with per function subtargets llvm-svn: 274971
2016-07-09 15:55:03 +08:00
; RUN: llc -march=amdgcn -verify-machineinstrs < %s | FileCheck -check-prefix=GCN %s
R600/SI: Add FP mode bits to binary. The default rounding mode to initialize the mode register needs to be reported to the runtime. Fill in other bits a kernel may be interested in setting for future use. llvm-svn: 211791
2014-06-27 01:22:30 +08:00
AMDGPU: Simplify tests with per function subtargets llvm-svn: 274971
2016-07-09 15:55:03 +08:00
; GCN-LABEL: {{^}}test_default_si:
; GCN: FloatMode: 192
AMDGPU : Add a function to enable and disable IEEEBit for SC and shader respectively. Differential Revision: http://reviews.llvm.org/D25789 llvm-svn: 284655
2016-10-20 06:34:49 +08:00
; GCN: IeeeMode: 1
AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel Currently the default C calling convention functions are treated the same as compute kernels. Make this explicit so the default calling convention can be changed to a non-kernel. Converted with perl -pi -e 's/define void/define amdgpu_kernel void/' on the relevant test directories (and undoing in one place that actually wanted a non-kernel). llvm-svn: 298444
2017-03-22 05:39:51 +08:00
define amdgpu_kernel void @test_default_si(float addrspace(1)* %out0, double addrspace(1)* %out1) #0 {
AMDGPU: Simplify tests with per function subtargets llvm-svn: 274971
2016-07-09 15:55:03 +08:00
store float 0.0, float addrspace(1)* %out0
store double 0.0, double addrspace(1)* %out1
ret void
}
R600: Add denormal handling subtarget features. llvm-svn: 213018
2014-07-15 07:40:49 +08:00
AMDGPU: Simplify tests with per function subtargets llvm-svn: 274971
2016-07-09 15:55:03 +08:00
; GCN-LABEL: {{^}}test_default_vi:
; GCN: FloatMode: 192
AMDGPU : Add a function to enable and disable IEEEBit for SC and shader respectively. Differential Revision: http://reviews.llvm.org/D25789 llvm-svn: 284655
2016-10-20 06:34:49 +08:00
; GCN: IeeeMode: 1
AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel Currently the default C calling convention functions are treated the same as compute kernels. Make this explicit so the default calling convention can be changed to a non-kernel. Converted with perl -pi -e 's/define void/define amdgpu_kernel void/' on the relevant test directories (and undoing in one place that actually wanted a non-kernel). llvm-svn: 298444
2017-03-22 05:39:51 +08:00
define amdgpu_kernel void @test_default_vi(float addrspace(1)* %out0, double addrspace(1)* %out1) #1 {
AMDGPU: Simplify tests with per function subtargets llvm-svn: 274971
2016-07-09 15:55:03 +08:00
store float 0.0, float addrspace(1)* %out0
store double 0.0, double addrspace(1)* %out1
ret void
}
R600: Add denormal handling subtarget features. llvm-svn: 213018
2014-07-15 07:40:49 +08:00
AMDGPU: Simplify tests with per function subtargets llvm-svn: 274971
2016-07-09 15:55:03 +08:00
; GCN-LABEL: {{^}}test_f64_denormals:
; GCN: FloatMode: 192
AMDGPU : Add a function to enable and disable IEEEBit for SC and shader respectively. Differential Revision: http://reviews.llvm.org/D25789 llvm-svn: 284655
2016-10-20 06:34:49 +08:00
; GCN: IeeeMode: 1
AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel Currently the default C calling convention functions are treated the same as compute kernels. Make this explicit so the default calling convention can be changed to a non-kernel. Converted with perl -pi -e 's/define void/define amdgpu_kernel void/' on the relevant test directories (and undoing in one place that actually wanted a non-kernel). llvm-svn: 298444
2017-03-22 05:39:51 +08:00
define amdgpu_kernel void @test_f64_denormals(float addrspace(1)* %out0, double addrspace(1)* %out1) #2 {
AMDGPU: Simplify tests with per function subtargets llvm-svn: 274971
2016-07-09 15:55:03 +08:00
store float 0.0, float addrspace(1)* %out0
store double 0.0, double addrspace(1)* %out1
ret void
}
R600: Add denormal handling subtarget features. llvm-svn: 213018
2014-07-15 07:40:49 +08:00
AMDGPU: Simplify tests with per function subtargets llvm-svn: 274971
2016-07-09 15:55:03 +08:00
; GCN-LABEL: {{^}}test_f32_denormals:
; GCNL: FloatMode: 48
AMDGPU : Add a function to enable and disable IEEEBit for SC and shader respectively. Differential Revision: http://reviews.llvm.org/D25789 llvm-svn: 284655
2016-10-20 06:34:49 +08:00
; GCN: IeeeMode: 1
AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel Currently the default C calling convention functions are treated the same as compute kernels. Make this explicit so the default calling convention can be changed to a non-kernel. Converted with perl -pi -e 's/define void/define amdgpu_kernel void/' on the relevant test directories (and undoing in one place that actually wanted a non-kernel). llvm-svn: 298444
2017-03-22 05:39:51 +08:00
define amdgpu_kernel void @test_f32_denormals(float addrspace(1)* %out0, double addrspace(1)* %out1) #3 {
AMDGPU: Simplify tests with per function subtargets llvm-svn: 274971
2016-07-09 15:55:03 +08:00
store float 0.0, float addrspace(1)* %out0
store double 0.0, double addrspace(1)* %out1
ret void
}
R600: Add denormal handling subtarget features. llvm-svn: 213018
2014-07-15 07:40:49 +08:00
AMDGPU: Simplify tests with per function subtargets llvm-svn: 274971
2016-07-09 15:55:03 +08:00
; GCN-LABEL: {{^}}test_f32_f64_denormals:
; GCN: FloatMode: 240
AMDGPU : Add a function to enable and disable IEEEBit for SC and shader respectively. Differential Revision: http://reviews.llvm.org/D25789 llvm-svn: 284655
2016-10-20 06:34:49 +08:00
; GCN: IeeeMode: 1
AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel Currently the default C calling convention functions are treated the same as compute kernels. Make this explicit so the default calling convention can be changed to a non-kernel. Converted with perl -pi -e 's/define void/define amdgpu_kernel void/' on the relevant test directories (and undoing in one place that actually wanted a non-kernel). llvm-svn: 298444
2017-03-22 05:39:51 +08:00
define amdgpu_kernel void @test_f32_f64_denormals(float addrspace(1)* %out0, double addrspace(1)* %out1) #4 {
AMDGPU: Simplify tests with per function subtargets llvm-svn: 274971
2016-07-09 15:55:03 +08:00
store float 0.0, float addrspace(1)* %out0
store double 0.0, double addrspace(1)* %out1
ret void
}
R600: Add denormal handling subtarget features. llvm-svn: 213018
2014-07-15 07:40:49 +08:00
AMDGPU: Simplify tests with per function subtargets llvm-svn: 274971
2016-07-09 15:55:03 +08:00
; GCN-LABEL: {{^}}test_no_denormals
; GCN: FloatMode: 0
AMDGPU : Add a function to enable and disable IEEEBit for SC and shader respectively. Differential Revision: http://reviews.llvm.org/D25789 llvm-svn: 284655
2016-10-20 06:34:49 +08:00
; GCN: IeeeMode: 1
AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel Currently the default C calling convention functions are treated the same as compute kernels. Make this explicit so the default calling convention can be changed to a non-kernel. Converted with perl -pi -e 's/define void/define amdgpu_kernel void/' on the relevant test directories (and undoing in one place that actually wanted a non-kernel). llvm-svn: 298444
2017-03-22 05:39:51 +08:00
define amdgpu_kernel void @test_no_denormals(float addrspace(1)* %out0, double addrspace(1)* %out1) #5 {
R600/SI: Add FP mode bits to binary. The default rounding mode to initialize the mode register needs to be reported to the runtime. Fill in other bits a kernel may be interested in setting for future use. llvm-svn: 211791
2014-06-27 01:22:30 +08:00
store float 0.0, float addrspace(1)* %out0
store double 0.0, double addrspace(1)* %out1
ret void
}
AMDGPU: Simplify tests with per function subtargets llvm-svn: 274971
2016-07-09 15:55:03 +08:00
AMDGPU: Combine fp16/fp64 subtarget features The same control register controls both, and are set to the same defaults. Keep the old names around as aliases. llvm-svn: 292837
2017-01-24 06:31:03 +08:00
; GCN-LABEL: {{^}}test_f16_f64_denormals:
; GCN: FloatMode: 192
; GCN: IeeeMode: 1
AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel Currently the default C calling convention functions are treated the same as compute kernels. Make this explicit so the default calling convention can be changed to a non-kernel. Converted with perl -pi -e 's/define void/define amdgpu_kernel void/' on the relevant test directories (and undoing in one place that actually wanted a non-kernel). llvm-svn: 298444
2017-03-22 05:39:51 +08:00
define amdgpu_kernel void @test_f16_f64_denormals(half addrspace(1)* %out0, double addrspace(1)* %out1) #6 {
AMDGPU: Combine fp16/fp64 subtarget features The same control register controls both, and are set to the same defaults. Keep the old names around as aliases. llvm-svn: 292837
2017-01-24 06:31:03 +08:00
store half 0.0, half addrspace(1)* %out0
store double 0.0, double addrspace(1)* %out1
ret void
}
; GCN-LABEL: {{^}}test_no_f16_f64_denormals:
; GCN: FloatMode: 0
; GCN: IeeeMode: 1
AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel Currently the default C calling convention functions are treated the same as compute kernels. Make this explicit so the default calling convention can be changed to a non-kernel. Converted with perl -pi -e 's/define void/define amdgpu_kernel void/' on the relevant test directories (and undoing in one place that actually wanted a non-kernel). llvm-svn: 298444
2017-03-22 05:39:51 +08:00
define amdgpu_kernel void @test_no_f16_f64_denormals(half addrspace(1)* %out0, double addrspace(1)* %out1) #7 {
AMDGPU: Combine fp16/fp64 subtarget features The same control register controls both, and are set to the same defaults. Keep the old names around as aliases. llvm-svn: 292837
2017-01-24 06:31:03 +08:00
store half 0.0, half addrspace(1)* %out0
store double 0.0, double addrspace(1)* %out1
ret void
}
; GCN-LABEL: {{^}}test_f32_f16_f64_denormals:
; GCN: FloatMode: 240
; GCN: IeeeMode: 1
AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel Currently the default C calling convention functions are treated the same as compute kernels. Make this explicit so the default calling convention can be changed to a non-kernel. Converted with perl -pi -e 's/define void/define amdgpu_kernel void/' on the relevant test directories (and undoing in one place that actually wanted a non-kernel). llvm-svn: 298444
2017-03-22 05:39:51 +08:00
define amdgpu_kernel void @test_f32_f16_f64_denormals(half addrspace(1)* %out0, float addrspace(1)* %out1, double addrspace(1)* %out2) #8 {
AMDGPU: Combine fp16/fp64 subtarget features The same control register controls both, and are set to the same defaults. Keep the old names around as aliases. llvm-svn: 292837
2017-01-24 06:31:03 +08:00
store half 0.0, half addrspace(1)* %out0
store float 0.0, float addrspace(1)* %out1
store double 0.0, double addrspace(1)* %out2
ret void
}
AMDGPU : Add a function to enable and disable IEEEBit for SC and shader respectively. Differential Revision: http://reviews.llvm.org/D25789 llvm-svn: 284655
2016-10-20 06:34:49 +08:00
; GCN-LABEL: {{^}}kill_gs_const:
; GCN: IeeeMode: 0
define amdgpu_gs void @kill_gs_const() {
main_body:
%0 = icmp ule i32 0, 3
%1 = select i1 %0, float 1.000000e+00, float -1.000000e+00
call void @llvm.AMDGPU.kill(float %1)
%2 = icmp ule i32 3, 0
%3 = select i1 %2, float 1.000000e+00, float -1.000000e+00
call void @llvm.AMDGPU.kill(float %3)
ret void
}
; GCN-LABEL: {{^}}kill_vcc_implicit_def:
; GCN: IeeeMode: 0
AMDGPU: Fix tests using old number for constant address space llvm-svn: 341770
2018-09-10 10:54:25 +08:00
define amdgpu_ps float @kill_vcc_implicit_def([6 x <16 x i8>] addrspace(4)* byval, [17 x <16 x i8>] addrspace(4)* byval, [17 x <4 x i32>] addrspace(4)* byval, [34 x <8 x i32>] addrspace(4)* byval, float inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, float, i32, float, float) {
AMDGPU : Add a function to enable and disable IEEEBit for SC and shader respectively. Differential Revision: http://reviews.llvm.org/D25789 llvm-svn: 284655
2016-10-20 06:34:49 +08:00
entry:
%tmp0 = fcmp olt float %13, 0.0
call void @llvm.AMDGPU.kill(float %14)
%tmp1 = select i1 %tmp0, float 1.0, float 0.0
AMDGPU: Remove some uses of llvm.SI.export in tests Merge some of the old, smaller tests into more complete versions. llvm-svn: 295792
2017-02-22 08:02:21 +08:00
ret float %tmp1
AMDGPU : Add a function to enable and disable IEEEBit for SC and shader respectively. Differential Revision: http://reviews.llvm.org/D25789 llvm-svn: 284655
2016-10-20 06:34:49 +08:00
}
declare void @llvm.AMDGPU.kill(float)
AMDGPU: Simplify tests with per function subtargets llvm-svn: 274971
2016-07-09 15:55:03 +08:00
attributes #0 = { nounwind "target-cpu"="tahiti" }
attributes #1 = { nounwind "target-cpu"="fiji" }
attributes #2 = { nounwind "target-features"="+fp64-denormals" }
attributes #3 = { nounwind "target-features"="+fp32-denormals" }
attributes #4 = { nounwind "target-features"="+fp32-denormals,+fp64-denormals" }
AMDGPU: Combine fp16/fp64 subtarget features The same control register controls both, and are set to the same defaults. Keep the old names around as aliases. llvm-svn: 292837
2017-01-24 06:31:03 +08:00
attributes #5 = { nounwind "target-features"="-fp32-denormals,-fp64-fp16-denormals" }
attributes #6 = { nounwind "target-features"="+fp64-fp16-denormals" }
attributes #7 = { nounwind "target-features"="-fp64-fp16-denormals" }
attributes #8 = { nounwind "target-features"="+fp32-denormals,+fp64-fp16-denormals" }