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llvm-project/polly/test/Isl/CodeGen/non_affine_float_compare.ll

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tests: Drop -polly-detect-unprofitable and -polly-no-early-exit These flags are now always passed to all tests and need to be disabled if not needed. Disabling these flags, rather than passing them to almost all tests, significantly simplfies our RUN: lines. llvm-svn: 249422
2015-10-06 23:36:44 +08:00
; RUN: opt %loadPolly -polly-codegen \
Do not detect Scops with only one loop. If a region does not have more than one loop, we do not identify it as a Scop in ScopDetection. The main optimizations Polly is currently performing (tiling, preparation for outer-loop vectorization and loop fusion) are unlikely to have a positive impact on individual loops. In some cases, Polly's run-time alias checks or conditional hoisting may still have a positive impact, but those are mostly enabling transformations which LLVM already performs for individual loops. As we do not focus on individual loops, we leave them untouched to not introduce compile time regressions and execution time noise. This results in good compile time reduction (oourafft: -73.99%, smg2000: -56.25%). Contributed-by: Pratik Bhatu <cs12b1010@iith.ac.in> Reviewers: grosser Differential Revision: http://reviews.llvm.org/D12268 llvm-svn: 246161
2015-08-28 00:55:18 +08:00
; RUN: -polly-allow-nonaffine-branches -S -verify-dom-info \
tests: Drop -polly-detect-unprofitable and -polly-no-early-exit These flags are now always passed to all tests and need to be disabled if not needed. Disabling these flags, rather than passing them to almost all tests, significantly simplfies our RUN: lines. llvm-svn: 249422
2015-10-06 23:36:44 +08:00
; RUN: < %s | FileCheck %s
Allow non-affine control flow -- Code Generation This is the code generation for region statements that are created when non-affine control flow was present in the input. A new generator, similar to the block or vector generator, for regions is used to traverse and copy the region statement and to adjust the control flow inside the new region in the end. llvm-svn: 230340
2015-02-25 00:16:32 +08:00
;
; void f(float *A) {
; for (int i = 0; i < 1024; i++)
; if (A[i] == A[i - 1])
; A[i]++;
; A[i]++;
; }
;
;
; CHECK: polly.stmt.bb2:
This reverts recent expression type changes The recent expression type changes still need more discussion, which will happen on phabricator or on the mailing list. The precise list of commits reverted are: - "Refactor division generation code" - "[NFC] Generate runtime checks after the SCoP" - "[FIX] Determine insertion point during SCEV expansion" - "Look through IntToPtr & PtrToInt instructions" - "Use minimal types for generated expressions" - "Temporarily promote values to i64 again" - "[NFC] Avoid unnecessary comparison for min/max expressions" - "[Polly] Fix -Wunused-variable warnings (NFC)" - "[NFC] Simplify min/max expression generation" - "Simplify the type adjustment in the IslExprBuilder" Some of them are just reverted as we would otherwise get conflicts. I will try to re-commit them if possible. llvm-svn: 272483
2016-06-12 03:17:15 +08:00
; CHECK: %scevgep[[R0:[0-9]*]] = getelementptr float, float* %A, i64 %polly.indvar
Update Polly tests to handle explicitly typed load changes in LLVM. llvm-svn: 230796
2015-02-28 05:22:50 +08:00
; CHECK: %tmp3_p_scalar_ = load float, float* %scevgep[[R0]], align 4, !alias.scope !0, !noalias !2
This reverts recent expression type changes The recent expression type changes still need more discussion, which will happen on phabricator or on the mailing list. The precise list of commits reverted are: - "Refactor division generation code" - "[NFC] Generate runtime checks after the SCoP" - "[FIX] Determine insertion point during SCEV expansion" - "Look through IntToPtr & PtrToInt instructions" - "Use minimal types for generated expressions" - "Temporarily promote values to i64 again" - "[NFC] Avoid unnecessary comparison for min/max expressions" - "[Polly] Fix -Wunused-variable warnings (NFC)" - "[NFC] Simplify min/max expression generation" - "Simplify the type adjustment in the IslExprBuilder" Some of them are just reverted as we would otherwise get conflicts. I will try to re-commit them if possible. llvm-svn: 272483
2016-06-12 03:17:15 +08:00
; CHECK: %scevgep[[R2:[0-9]*]] = getelementptr float, float* %scevgep{{[0-9]*}}, i64 %polly.indvar
Update Polly tests to handle explicitly typed load changes in LLVM. llvm-svn: 230796
2015-02-28 05:22:50 +08:00
; CHECK: %tmp6_p_scalar_ = load float, float* %scevgep[[R2]], align 4, !alias.scope !0, !noalias !2
Allow non-affine control flow -- Code Generation This is the code generation for region statements that are created when non-affine control flow was present in the input. A new generator, similar to the block or vector generator, for regions is used to traverse and copy the region statement and to adjust the control flow inside the new region in the end. llvm-svn: 230340
2015-02-25 00:16:32 +08:00
; CHECK: %p_tmp7 = fcmp oeq float %tmp3_p_scalar_, %tmp6_p_scalar_
[FIX] Teach RegionGenerator to respect and update dominance When we generate code for a whole region we have to respect dominance and update it too. The first is achieved with multiple "BBMap"s. Each copied block in the region gets its own map. It is initialized only with values mapped in the immediate dominator block, if this block is in the region and was therefor already copied. This way no values defined in a block that doesn't dominate the current one will be used. To update dominance information we check if the immediate dominator of the original block we want to copy is in the region. If so we set the immediate dominator of the current block to the copy of the immediate dominator of the original block. llvm-svn: 230774
2015-02-28 02:29:04 +08:00
; CHECK: br i1 %p_tmp7, label %polly.stmt.bb8, label %polly.stmt.bb12.[[R:[a-zA-Z_.0-9]*]]
Allow non-affine control flow -- Code Generation This is the code generation for region statements that are created when non-affine control flow was present in the input. A new generator, similar to the block or vector generator, for regions is used to traverse and copy the region statement and to adjust the control flow inside the new region in the end. llvm-svn: 230340
2015-02-25 00:16:32 +08:00
; CHECK: polly.stmt.bb8:
This reverts recent expression type changes The recent expression type changes still need more discussion, which will happen on phabricator or on the mailing list. The precise list of commits reverted are: - "Refactor division generation code" - "[NFC] Generate runtime checks after the SCoP" - "[FIX] Determine insertion point during SCEV expansion" - "Look through IntToPtr & PtrToInt instructions" - "Use minimal types for generated expressions" - "Temporarily promote values to i64 again" - "[NFC] Avoid unnecessary comparison for min/max expressions" - "[Polly] Fix -Wunused-variable warnings (NFC)" - "[NFC] Simplify min/max expression generation" - "Simplify the type adjustment in the IslExprBuilder" Some of them are just reverted as we would otherwise get conflicts. I will try to re-commit them if possible. llvm-svn: 272483
2016-06-12 03:17:15 +08:00
; CHECK: %scevgep[[R3:[0-9]*]] = getelementptr float, float* %A, i64 %polly.indvar
Update Polly tests to handle explicitly typed load changes in LLVM. llvm-svn: 230796
2015-02-28 05:22:50 +08:00
; CHECK: %tmp10_p_scalar_ = load float, float* %scevgep[[R3]], align 4, !alias.scope !0, !noalias !2
Allow non-affine control flow -- Code Generation This is the code generation for region statements that are created when non-affine control flow was present in the input. A new generator, similar to the block or vector generator, for regions is used to traverse and copy the region statement and to adjust the control flow inside the new region in the end. llvm-svn: 230340
2015-02-25 00:16:32 +08:00
; CHECK: %p_tmp11 = fadd float %tmp10_p_scalar_, 1.000000e+00
; CHECK: store float %p_tmp11, float* %scevgep[[R3]], align 4, !alias.scope !0, !noalias !2
[FIX] Teach RegionGenerator to respect and update dominance When we generate code for a whole region we have to respect dominance and update it too. The first is achieved with multiple "BBMap"s. Each copied block in the region gets its own map. It is initialized only with values mapped in the immediate dominator block, if this block is in the region and was therefor already copied. This way no values defined in a block that doesn't dominate the current one will be used. To update dominance information we check if the immediate dominator of the original block we want to copy is in the region. If so we set the immediate dominator of the current block to the copy of the immediate dominator of the original block. llvm-svn: 230774
2015-02-28 02:29:04 +08:00
; CHECK: br label %polly.stmt.bb12.[[R]]
Allow non-affine control flow -- Code Generation This is the code generation for region statements that are created when non-affine control flow was present in the input. A new generator, similar to the block or vector generator, for regions is used to traverse and copy the region statement and to adjust the control flow inside the new region in the end. llvm-svn: 230340
2015-02-25 00:16:32 +08:00
[FIX] Teach RegionGenerator to respect and update dominance When we generate code for a whole region we have to respect dominance and update it too. The first is achieved with multiple "BBMap"s. Each copied block in the region gets its own map. It is initialized only with values mapped in the immediate dominator block, if this block is in the region and was therefor already copied. This way no values defined in a block that doesn't dominate the current one will be used. To update dominance information we check if the immediate dominator of the original block we want to copy is in the region. If so we set the immediate dominator of the current block to the copy of the immediate dominator of the original block. llvm-svn: 230774
2015-02-28 02:29:04 +08:00
; CHECK: polly.stmt.bb12.[[R]]:
Allow non-affine control flow -- Code Generation This is the code generation for region statements that are created when non-affine control flow was present in the input. A new generator, similar to the block or vector generator, for regions is used to traverse and copy the region statement and to adjust the control flow inside the new region in the end. llvm-svn: 230340
2015-02-25 00:16:32 +08:00
; CHECK: br label %polly.stmt.bb12
; CHECK: polly.stmt.bb12:
This reverts recent expression type changes The recent expression type changes still need more discussion, which will happen on phabricator or on the mailing list. The precise list of commits reverted are: - "Refactor division generation code" - "[NFC] Generate runtime checks after the SCoP" - "[FIX] Determine insertion point during SCEV expansion" - "Look through IntToPtr & PtrToInt instructions" - "Use minimal types for generated expressions" - "Temporarily promote values to i64 again" - "[NFC] Avoid unnecessary comparison for min/max expressions" - "[Polly] Fix -Wunused-variable warnings (NFC)" - "[NFC] Simplify min/max expression generation" - "Simplify the type adjustment in the IslExprBuilder" Some of them are just reverted as we would otherwise get conflicts. I will try to re-commit them if possible. llvm-svn: 272483
2016-06-12 03:17:15 +08:00
; CHECK: %scevgep[[R4:[0-9]*]] = getelementptr float, float* %A, i64 %polly.indvar
Update Polly tests to handle explicitly typed load changes in LLVM. llvm-svn: 230796
2015-02-28 05:22:50 +08:00
; CHECK: %tmp10b_p_scalar_ = load float, float* %scevgep[[R4]], align 4, !alias.scope !0, !noalias !2
Allow non-affine control flow -- Code Generation This is the code generation for region statements that are created when non-affine control flow was present in the input. A new generator, similar to the block or vector generator, for regions is used to traverse and copy the region statement and to adjust the control flow inside the new region in the end. llvm-svn: 230340
2015-02-25 00:16:32 +08:00
; CHECK: %p_tmp11b = fadd float %tmp10b_p_scalar_, 1.000000e+00
; CHECK: store float %p_tmp11b, float* %scevgep[[R4]], align 4, !alias.scope !0, !noalias !2
This reverts recent expression type changes The recent expression type changes still need more discussion, which will happen on phabricator or on the mailing list. The precise list of commits reverted are: - "Refactor division generation code" - "[NFC] Generate runtime checks after the SCoP" - "[FIX] Determine insertion point during SCEV expansion" - "Look through IntToPtr & PtrToInt instructions" - "Use minimal types for generated expressions" - "Temporarily promote values to i64 again" - "[NFC] Avoid unnecessary comparison for min/max expressions" - "[Polly] Fix -Wunused-variable warnings (NFC)" - "[NFC] Simplify min/max expression generation" - "Simplify the type adjustment in the IslExprBuilder" Some of them are just reverted as we would otherwise get conflicts. I will try to re-commit them if possible. llvm-svn: 272483
2016-06-12 03:17:15 +08:00
; CHECK: %polly.indvar_next = add nsw i64 %polly.indvar, 1
; CHECK: %polly.loop_cond = icmp sle i64 %polly.indvar, 1022
Allow non-affine control flow -- Code Generation This is the code generation for region statements that are created when non-affine control flow was present in the input. A new generator, similar to the block or vector generator, for regions is used to traverse and copy the region statement and to adjust the control flow inside the new region in the end. llvm-svn: 230340
2015-02-25 00:16:32 +08:00
; CHECK: br i1 %polly.loop_cond, label %polly.loop_header, label %polly.loop_exit
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
define void @f(float* %A) {
bb:
br label %bb1
bb1: ; preds = %bb13, %bb
%indvars.iv = phi i64 [ %indvars.iv.next, %bb13 ], [ 0, %bb ]
%exitcond = icmp ne i64 %indvars.iv, 1024
br i1 %exitcond, label %bb2, label %bb14
bb2: ; preds = %bb1
Update Polly tests to handle explicitly typed gep changes in LLVM llvm-svn: 230784
2015-02-28 03:20:19 +08:00
%tmp = getelementptr inbounds float, float* %A, i64 %indvars.iv
Update Polly tests to handle explicitly typed load changes in LLVM. llvm-svn: 230796
2015-02-28 05:22:50 +08:00
%tmp3 = load float, float* %tmp, align 4
Allow non-affine control flow -- Code Generation This is the code generation for region statements that are created when non-affine control flow was present in the input. A new generator, similar to the block or vector generator, for regions is used to traverse and copy the region statement and to adjust the control flow inside the new region in the end. llvm-svn: 230340
2015-02-25 00:16:32 +08:00
%tmp4 = add nsw i64 %indvars.iv, -1
Update Polly tests to handle explicitly typed gep changes in LLVM llvm-svn: 230784
2015-02-28 03:20:19 +08:00
%tmp5 = getelementptr inbounds float, float* %A, i64 %tmp4
Update Polly tests to handle explicitly typed load changes in LLVM. llvm-svn: 230796
2015-02-28 05:22:50 +08:00
%tmp6 = load float, float* %tmp5, align 4
Allow non-affine control flow -- Code Generation This is the code generation for region statements that are created when non-affine control flow was present in the input. A new generator, similar to the block or vector generator, for regions is used to traverse and copy the region statement and to adjust the control flow inside the new region in the end. llvm-svn: 230340
2015-02-25 00:16:32 +08:00
%tmp7 = fcmp oeq float %tmp3, %tmp6
br i1 %tmp7, label %bb8, label %bb12
bb8: ; preds = %bb2
Update Polly tests to handle explicitly typed gep changes in LLVM llvm-svn: 230784
2015-02-28 03:20:19 +08:00
%tmp9 = getelementptr inbounds float, float* %A, i64 %indvars.iv
Update Polly tests to handle explicitly typed load changes in LLVM. llvm-svn: 230796
2015-02-28 05:22:50 +08:00
%tmp10 = load float, float* %tmp9, align 4
Allow non-affine control flow -- Code Generation This is the code generation for region statements that are created when non-affine control flow was present in the input. A new generator, similar to the block or vector generator, for regions is used to traverse and copy the region statement and to adjust the control flow inside the new region in the end. llvm-svn: 230340
2015-02-25 00:16:32 +08:00
%tmp11 = fadd float %tmp10, 1.000000e+00
store float %tmp11, float* %tmp9, align 4
br label %bb12
bb12: ; preds = %bb8, %bb2
Update Polly tests to handle explicitly typed gep changes in LLVM llvm-svn: 230784
2015-02-28 03:20:19 +08:00
%tmp9b = getelementptr inbounds float, float* %A, i64 %indvars.iv
Update Polly tests to handle explicitly typed load changes in LLVM. llvm-svn: 230796
2015-02-28 05:22:50 +08:00
%tmp10b = load float, float* %tmp9b, align 4
Allow non-affine control flow -- Code Generation This is the code generation for region statements that are created when non-affine control flow was present in the input. A new generator, similar to the block or vector generator, for regions is used to traverse and copy the region statement and to adjust the control flow inside the new region in the end. llvm-svn: 230340
2015-02-25 00:16:32 +08:00
%tmp11b = fadd float %tmp10b, 1.000000e+00
store float %tmp11b, float* %tmp9b, align 4
br label %bb13
bb13: ; preds = %bb12
%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
br label %bb1
bb14: ; preds = %bb1
ret void
}