llvm-project/polly/test/Isl/CodeGen/MemAccess/create_arrays___%bb9---%bb2...

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{
"arrays" : [
{
"name" : "MemRef_B",
"sizes" : [ "*", "1024" ],
"type" : "double"
},
{
"name" : "MemRef_A",
"sizes" : [ "*", "1056" ],
"type" : "double"
}
],
"context" : "{ : }",
"name" : "%bb9---%bb26",
"statements" : [
{
"accesses" : [
{
"kind" : "read",
"relation" : "{ Stmt_bb12[i0, i1, i2] -> MemRef_B[i0, i2] }"
},
{
"kind" : "read",
"relation" : "{ Stmt_bb12[i0, i1, i2] -> MemRef_beta[] }"
},
{
"kind" : "write",
"relation" : "{ Stmt_bb12[i0, i1, i2] -> MemRef_A[i0, i1] }"
}
],
"domain" : "{ Stmt_bb12[i0, i1, i2] : 0 <= i0 <= 1055 and 0 <= i1 <= 1055 and 0 <= i2 <= 1023 }",
"name" : "Stmt_bb12",
"schedule" : "{ Stmt_bb12[i0, i1, i2] -> [i0, i1, i2] }"
}
]
}