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llvm-project/llvm/test/CodeGen/ARM/GlobalISel/arm-instruction-select.mir

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[ARM] GlobalISel: Select add i32, i32 Add the minimal support necessary to select a function that returns the sum of two i32 values. This includes some support for argument/return lowering of i32 values through registers, as well as the handling of copy and add instructions throughout the GlobalISel pipeline. Differential Revision: https://reviews.llvm.org/D26677 llvm-svn: 289940
2016-12-16 20:54:46 +08:00
# RUN: llc -O0 -mtriple arm-- -global-isel -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s
--- |
[ARM] GlobalISel: Select i8 and i16 copies Teach the instruction selector that it's ok to copy small values from physical registers. First part of https://reviews.llvm.org/D27704 llvm-svn: 290104
2016-12-19 22:07:50 +08:00
define void @test_add_s8() { ret void }
define void @test_add_s16() { ret void }
define void @test_add_s32() { ret void }
[ARM] GlobalISel: Support loading from the stack Add support for selecting simple G_LOAD and G_FRAME_INDEX instructions (32-bit scalars only). This will be useful for functions that need to pass arguments on the stack. First part of https://reviews.llvm.org/D27195. llvm-svn: 290096
2016-12-19 19:26:31 +08:00
define void @test_load_from_stack() { ret void }
[ARM] GlobalISel: Select add i32, i32 Add the minimal support necessary to select a function that returns the sum of two i32 values. This includes some support for argument/return lowering of i32 values through registers, as well as the handling of copy and add instructions throughout the GlobalISel pipeline. Differential Revision: https://reviews.llvm.org/D26677 llvm-svn: 289940
2016-12-16 20:54:46 +08:00
...
---
[ARM] GlobalISel: Select i8 and i16 copies Teach the instruction selector that it's ok to copy small values from physical registers. First part of https://reviews.llvm.org/D27704 llvm-svn: 290104
2016-12-19 22:07:50 +08:00
name: test_add_s8
# CHECK-LABEL: name: test_add_s8
legalized: true
regBankSelected: true
selected: false
# CHECK: selected: true
registers:
- { id: 0, class: gprb }
- { id: 1, class: gprb }
- { id: 2, class: gprb }
# CHECK-DAG: id: 0, class: gpr
# CHECK-DAG: id: 1, class: gpr
# CHECK-DAG: id: 2, class: gpr
body: |
bb.0:
liveins: %r0, %r1
%0(s8) = COPY %r0
; CHECK: [[VREGX:%[0-9]+]] = COPY %r0
[ARM] GlobalISel: Allow i8 and i16 adds Teach the instruction selector and legalizer that it's ok to have adds with 8 or 16-bit integers. This is the second part of https://reviews.llvm.org/D27704 llvm-svn: 290105
2016-12-19 22:07:56 +08:00
%1(s8) = COPY %r1
; CHECK: [[VREGY:%[0-9]+]] = COPY %r1
%2(s8) = G_ADD %0, %1
; CHECK: [[VREGSUM:%[0-9]+]] = ADDrr [[VREGX]], [[VREGY]], 14, _, _
%r0 = COPY %2(s8)
; CHECK: %r0 = COPY [[VREGSUM]]
[ARM] GlobalISel: Select i8 and i16 copies Teach the instruction selector that it's ok to copy small values from physical registers. First part of https://reviews.llvm.org/D27704 llvm-svn: 290104
2016-12-19 22:07:50 +08:00
BX_RET 14, _, implicit %r0
; CHECK: BX_RET 14, _, implicit %r0
...
---
name: test_add_s16
# CHECK-LABEL: name: test_add_s16
legalized: true
regBankSelected: true
selected: false
# CHECK: selected: true
registers:
- { id: 0, class: gprb }
- { id: 1, class: gprb }
- { id: 2, class: gprb }
# CHECK-DAG: id: 0, class: gpr
# CHECK-DAG: id: 1, class: gpr
# CHECK-DAG: id: 2, class: gpr
body: |
bb.0:
liveins: %r0, %r1
%0(s16) = COPY %r0
; CHECK: [[VREGX:%[0-9]+]] = COPY %r0
[ARM] GlobalISel: Allow i8 and i16 adds Teach the instruction selector and legalizer that it's ok to have adds with 8 or 16-bit integers. This is the second part of https://reviews.llvm.org/D27704 llvm-svn: 290105
2016-12-19 22:07:56 +08:00
%1(s16) = COPY %r1
; CHECK: [[VREGY:%[0-9]+]] = COPY %r1
%2(s16) = G_ADD %0, %1
; CHECK: [[VREGSUM:%[0-9]+]] = ADDrr [[VREGX]], [[VREGY]], 14, _, _
%r0 = COPY %2(s16)
; CHECK: %r0 = COPY [[VREGSUM]]
[ARM] GlobalISel: Select i8 and i16 copies Teach the instruction selector that it's ok to copy small values from physical registers. First part of https://reviews.llvm.org/D27704 llvm-svn: 290104
2016-12-19 22:07:50 +08:00
BX_RET 14, _, implicit %r0
; CHECK: BX_RET 14, _, implicit %r0
...
---
name: test_add_s32
# CHECK-LABEL: name: test_add_s32
[ARM] GlobalISel: Select add i32, i32 Add the minimal support necessary to select a function that returns the sum of two i32 values. This includes some support for argument/return lowering of i32 values through registers, as well as the handling of copy and add instructions throughout the GlobalISel pipeline. Differential Revision: https://reviews.llvm.org/D26677 llvm-svn: 289940
2016-12-16 20:54:46 +08:00
legalized: true
regBankSelected: true
selected: false
# CHECK: selected: true
registers:
- { id: 0, class: gprb }
- { id: 1, class: gprb }
- { id: 2, class: gprb }
[ARM] GlobalISel: Minor style fixup in test llvm-svn: 290107
2016-12-19 22:08:06 +08:00
# CHECK: id: 0, class: gpr
# CHECK: id: 1, class: gpr
# CHECK: id: 2, class: gpr
[ARM] GlobalISel: Select add i32, i32 Add the minimal support necessary to select a function that returns the sum of two i32 values. This includes some support for argument/return lowering of i32 values through registers, as well as the handling of copy and add instructions throughout the GlobalISel pipeline. Differential Revision: https://reviews.llvm.org/D26677 llvm-svn: 289940
2016-12-16 20:54:46 +08:00
body: |
bb.0:
liveins: %r0, %r1
%0(s32) = COPY %r0
; CHECK: [[VREGX:%[0-9]+]] = COPY %r0
%1(s32) = COPY %r1
; CHECK: [[VREGY:%[0-9]+]] = COPY %r1
%2(s32) = G_ADD %0, %1
; CHECK: [[VREGSUM:%[0-9]+]] = ADDrr [[VREGX]], [[VREGY]], 14, _, _
%r0 = COPY %2(s32)
; CHECK: %r0 = COPY [[VREGSUM]]
BX_RET 14, _, implicit %r0
; CHECK: BX_RET 14, _, implicit %r0
...
[ARM] GlobalISel: Support loading from the stack Add support for selecting simple G_LOAD and G_FRAME_INDEX instructions (32-bit scalars only). This will be useful for functions that need to pass arguments on the stack. First part of https://reviews.llvm.org/D27195. llvm-svn: 290096
2016-12-19 19:26:31 +08:00
---
name: test_load_from_stack
# CHECK-LABEL: name: test_load_from_stack
legalized: true
regBankSelected: true
selected: false
# CHECK: selected: true
registers:
- { id: 0, class: gprb }
- { id: 1, class: gprb }
- { id: 2, class: gprb }
- { id: 3, class: gprb }
[ARM] GlobalISel: Add more checks to test llvm-svn: 290108
2016-12-19 22:08:11 +08:00
# CHECK-DAG: id: 0, class: gpr
# CHECK-DAG: id: 1, class: gpr
# CHECK-DAG: id: 2, class: gpr
# CHECK-DAG: id: 3, class: gpr
[ARM] GlobalISel: Support loading from the stack Add support for selecting simple G_LOAD and G_FRAME_INDEX instructions (32-bit scalars only). This will be useful for functions that need to pass arguments on the stack. First part of https://reviews.llvm.org/D27195. llvm-svn: 290096
2016-12-19 19:26:31 +08:00
fixedStack:
- { id: 0, offset: 0, size: 4, alignment: 4, isImmutable: true, isAliased: false }
- { id: 1, offset: 4, size: 4, alignment: 4, isImmutable: true, isAliased: false }
- { id: 2, offset: 8, size: 4, alignment: 4, isImmutable: true, isAliased: false }
# CHECK: id: [[FRAME_INDEX:[0-9]+]], offset: 8
body: |
bb.0:
liveins: %r0, %r1, %r2, %r3
%0(p0) = G_FRAME_INDEX %fixed-stack.2
; CHECK: [[FIVREG:%[0-9]+]] = ADDri %fixed-stack.[[FRAME_INDEX]], 0, 14, _, _
%1(s32) = G_LOAD %0(p0)
; CHECK: {{%[0-9]+}} = LDRi12 [[FIVREG]], 0, 14, _
BX_RET 14, _
; CHECK: BX_RET 14, _
...