forked from OSchip/llvm-project
41 lines
1.5 KiB
LLVM
41 lines
1.5 KiB
LLVM
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; RUN: llc -march=hexagon -mcpu=hexagonv5 -hexagon-hwloop-preheader < %s
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; REQUIRES: asserts
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; Test that the preheader is added to the parent loop, otherwise
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; we generate an invalid hardware loop.
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; Function Attrs: nounwind readonly
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define void @test(i16 signext %n) #0 {
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entry:
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br i1 undef, label %for.cond4.preheader.preheader.split.us, label %for.end22
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for.cond4.preheader.preheader.split.us:
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%0 = sext i16 %n to i32
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br label %for.body9.preheader.us
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for.body9.us:
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%indvars.iv = phi i32 [ %indvars.iv.next.7, %for.body9.us ], [ 0, %for.body9.preheader.us ]
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%indvars.iv.next.7 = add i32 %indvars.iv, 8
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%lftr.wideiv.7 = trunc i32 %indvars.iv.next.7 to i16
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%exitcond.7 = icmp slt i16 %lftr.wideiv.7, 0
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br i1 %exitcond.7, label %for.body9.us, label %for.body9.us.ur
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for.body9.preheader.us:
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%i.030.us.pmt = phi i32 [ %inc21.us.pmt, %for.end.loopexit.us ], [ 0, %for.cond4.preheader.preheader.split.us ]
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br i1 undef, label %for.body9.us, label %for.body9.us.ur
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for.body9.us.ur:
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%exitcond.ur.old = icmp eq i16 undef, %n
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br i1 %exitcond.ur.old, label %for.end.loopexit.us, label %for.body9.us.ur
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for.end.loopexit.us:
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%inc21.us.pmt = add i32 %i.030.us.pmt, 1
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%exitcond33 = icmp eq i32 %inc21.us.pmt, %0
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br i1 %exitcond33, label %for.end22, label %for.body9.preheader.us
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for.end22:
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ret void
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}
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attributes #0 = { nounwind readonly "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf"="true" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" }
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