2017-06-26 00:12:45 +08:00
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=i686-unknown-unknown | FileCheck %s --check-prefix=X86
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefix=X64
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define i32 @PR15705(i32 %x, i32 %a, i32 %b, i32 %c) #0 {
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; X86-LABEL: PR15705:
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2017-12-05 01:18:51 +08:00
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; X86: # %bb.0: # %entry
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2017-06-26 00:12:45 +08:00
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
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; X86-NEXT: cmpl %ecx, %edx
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; X86-NEXT: je .LBB0_4
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2017-12-05 01:18:51 +08:00
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; X86-NEXT: # %bb.1: # %if.end
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2017-06-26 00:12:45 +08:00
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; X86-NEXT: cmpl %eax, %edx
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; X86-NEXT: jne .LBB0_3
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2017-12-05 01:18:51 +08:00
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; X86-NEXT: # %bb.2:
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2017-06-26 00:12:45 +08:00
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; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; X86-NEXT: .LBB0_3: # %if.end
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; X86-NEXT: movl %ecx, %eax
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; X86-NEXT: .LBB0_4: # %return
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; X86-NEXT: retl
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;
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; X64-LABEL: PR15705:
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2017-12-05 01:18:51 +08:00
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; X64: # %bb.0: # %entry
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2018-09-20 02:59:08 +08:00
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; X64-NEXT: movl %edx, %eax
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2017-06-26 00:12:45 +08:00
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; X64-NEXT: cmpl %esi, %edi
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; X64-NEXT: je .LBB0_2
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2017-12-05 01:18:51 +08:00
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; X64-NEXT: # %bb.1: # %if.end
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2018-09-20 02:59:08 +08:00
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; X64-NEXT: cmpl %eax, %edi
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2017-06-26 00:12:45 +08:00
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; X64-NEXT: cmovel %ecx, %esi
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2018-09-20 02:59:08 +08:00
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; X64-NEXT: movl %esi, %eax
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2017-06-26 00:12:45 +08:00
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; X64-NEXT: .LBB0_2: # %return
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; X64-NEXT: retq
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entry:
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%cmp = icmp eq i32 %x, %a
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br i1 %cmp, label %return, label %if.end
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if.end:
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%cmp1 = icmp eq i32 %x, %b
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%c.a = select i1 %cmp1, i32 %c, i32 %a
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br label %return
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return:
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%retval.0 = phi i32 [ %b, %entry ], [ %c.a, %if.end ]
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ret i32 %retval.0
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}
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attributes #0 = { nounwind readnone ssp "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-frame-pointer-elim-non-leaf"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" }
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