2017-08-26 03:25:03 +08:00
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
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2013-01-31 08:44:12 +08:00
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Optimize some 64-bit multiplication by constants into two lea's or one lea + shl since imulq is slow (latency 5). e.g.
x * 40
=>
shlq $3, %rdi
leaq (%rdi,%rdi,4), %rax
This has the added benefit of allowing more multiply to be folded into addressing mode. e.g.
a * 24 + b
=>
leaq (%rdi,%rdi,2), %rax
leaq (%rsi,%rax,8), %rax
llvm-svn: 67917
2009-03-28 13:57:29 +08:00
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define i64 @t1(i64 %a) nounwind readnone {
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2017-08-26 03:25:03 +08:00
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; CHECK-LABEL: t1:
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2017-12-05 01:18:51 +08:00
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; CHECK: # %bb.0: # %entry
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2017-08-26 03:25:03 +08:00
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; CHECK-NEXT: leaq (%rdi,%rdi,8), %rax
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; CHECK-NEXT: leaq (%rax,%rax,8), %rax
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; CHECK-NEXT: retq
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Optimize some 64-bit multiplication by constants into two lea's or one lea + shl since imulq is slow (latency 5). e.g.
x * 40
=>
shlq $3, %rdi
leaq (%rdi,%rdi,4), %rax
This has the added benefit of allowing more multiply to be folded into addressing mode. e.g.
a * 24 + b
=>
leaq (%rdi,%rdi,2), %rax
leaq (%rsi,%rax,8), %rax
llvm-svn: 67917
2009-03-28 13:57:29 +08:00
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entry:
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2013-01-31 08:44:12 +08:00
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%0 = mul i64 %a, 81
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ret i64 %0
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Optimize some 64-bit multiplication by constants into two lea's or one lea + shl since imulq is slow (latency 5). e.g.
x * 40
=>
shlq $3, %rdi
leaq (%rdi,%rdi,4), %rax
This has the added benefit of allowing more multiply to be folded into addressing mode. e.g.
a * 24 + b
=>
leaq (%rdi,%rdi,2), %rax
leaq (%rsi,%rax,8), %rax
llvm-svn: 67917
2009-03-28 13:57:29 +08:00
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}
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define i64 @t2(i64 %a) nounwind readnone {
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2017-08-26 03:25:03 +08:00
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; CHECK-LABEL: t2:
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2017-12-05 01:18:51 +08:00
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; CHECK: # %bb.0: # %entry
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2017-08-26 03:25:03 +08:00
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; CHECK-NEXT: shlq $3, %rdi
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; CHECK-NEXT: leaq (%rdi,%rdi,4), %rax
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; CHECK-NEXT: retq
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Optimize some 64-bit multiplication by constants into two lea's or one lea + shl since imulq is slow (latency 5). e.g.
x * 40
=>
shlq $3, %rdi
leaq (%rdi,%rdi,4), %rax
This has the added benefit of allowing more multiply to be folded into addressing mode. e.g.
a * 24 + b
=>
leaq (%rdi,%rdi,2), %rax
leaq (%rsi,%rax,8), %rax
llvm-svn: 67917
2009-03-28 13:57:29 +08:00
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entry:
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2013-01-31 08:44:12 +08:00
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%0 = mul i64 %a, 40
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ret i64 %0
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Optimize some 64-bit multiplication by constants into two lea's or one lea + shl since imulq is slow (latency 5). e.g.
x * 40
=>
shlq $3, %rdi
leaq (%rdi,%rdi,4), %rax
This has the added benefit of allowing more multiply to be folded into addressing mode. e.g.
a * 24 + b
=>
leaq (%rdi,%rdi,2), %rax
leaq (%rsi,%rax,8), %rax
llvm-svn: 67917
2009-03-28 13:57:29 +08:00
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}
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2017-08-26 03:25:03 +08:00
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