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llvm-project/clang/test/CodeGen/ms-inline-asm-64.c

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clang/test: REQUIRES: s/x86-64-registered-target/x86-registered-target/ llvm-svn: 196350
2013-12-04 11:41:33 +08:00
// REQUIRES: x86-registered-target
Don't pass -O0 to clang_cc1, it is the default. llvm-svn: 189910
2013-09-04 12:12:25 +08:00
// RUN: %clang_cc1 %s -triple x86_64-apple-darwin10 -fasm-blocks -emit-llvm -o - | FileCheck %s
[ms-inline asm] Test case for r166526. llvm-svn: 166527
2012-10-24 07:42:25 +08:00
void t1() {
int var = 10;
__asm mov rax, offset var ; rax = address of myvar
// CHECK: t1
[ms-inline-asm] Use the frontend size only for ambiguous instructions This avoids problems on code like this: char buf[16]; __asm { movups xmm0, [buf] mov [buf], eax } The frontend size in this case (1) is wrong, and the register makes the instruction matching unambiguous. There are also enough bytes available that we shouldn't complain to the user that they are potentially using an incorrectly sized instruction to access the variable. Supersedes D32636 and D26586 and fixes PR28266 llvm-svn: 302179
2017-05-05 02:19:52 +08:00
// CHECK: call void asm sideeffect inteldialect
// CHECK-SAME: mov rax, $0
// CHECK-SAME: "r,~{rax},~{dirflag},~{fpsr},~{flags}"(i32* %{{.*}})
[ms-inline asm] Test case for r166526. llvm-svn: 166527
2012-10-24 07:42:25 +08:00
}
[ms-inline asm] Add test cases for r166592. The test cases only works if the source operand is a register. llvm-svn: 166594
2012-10-25 01:23:06 +08:00
void t2() {
int var = 10;
[X86][AsmParser] re-introduce 'offset' operator Summary: Amend MS offset operator implementation, to more closely fit with its MS counterpart: 1. InlineAsm: evaluate non-local source entities to their (address) location 2. Provide a mean with which one may acquire the address of an assembly label via MS syntax, rather than yielding a memory reference (i.e. "offset asm_label" and "$asm_label" should be synonymous 3. address PR32530 Based on http://llvm.org/D37461 Fix broken test where the break appears unrelated. - Set up appropriate memory-input rewrites for variable references. - Intel-dialect assembly printing now correctly handles addresses by adding "offset". - Pass offsets as immediate operands (using "r" constraint for offsets of locals). Reviewed By: rnk Differential Revision: https://reviews.llvm.org/D71436
2019-12-31 03:33:56 +08:00
__asm mov qword ptr [eax], offset var
[ms-inline asm] Add test cases for r166592. The test cases only works if the source operand is a register. llvm-svn: 166594
2012-10-25 01:23:06 +08:00
// CHECK: t2
[ms-inline-asm] Use the frontend size only for ambiguous instructions This avoids problems on code like this: char buf[16]; __asm { movups xmm0, [buf] mov [buf], eax } The frontend size in this case (1) is wrong, and the register makes the instruction matching unambiguous. There are also enough bytes available that we shouldn't complain to the user that they are potentially using an incorrectly sized instruction to access the variable. Supersedes D32636 and D26586 and fixes PR28266 llvm-svn: 302179
2017-05-05 02:19:52 +08:00
// CHECK: call void asm sideeffect inteldialect
[X86][AsmParser] re-introduce 'offset' operator Summary: Amend MS offset operator implementation, to more closely fit with its MS counterpart: 1. InlineAsm: evaluate non-local source entities to their (address) location 2. Provide a mean with which one may acquire the address of an assembly label via MS syntax, rather than yielding a memory reference (i.e. "offset asm_label" and "$asm_label" should be synonymous 3. address PR32530 Based on http://llvm.org/D37461 Fix broken test where the break appears unrelated. - Set up appropriate memory-input rewrites for variable references. - Intel-dialect assembly printing now correctly handles addresses by adding "offset". - Pass offsets as immediate operands (using "r" constraint for offsets of locals). Reviewed By: rnk Differential Revision: https://reviews.llvm.org/D71436
2019-12-31 03:33:56 +08:00
// CHECK-SAME: mov qword ptr [eax], $0
[ms-inline-asm] Use the frontend size only for ambiguous instructions This avoids problems on code like this: char buf[16]; __asm { movups xmm0, [buf] mov [buf], eax } The frontend size in this case (1) is wrong, and the register makes the instruction matching unambiguous. There are also enough bytes available that we shouldn't complain to the user that they are potentially using an incorrectly sized instruction to access the variable. Supersedes D32636 and D26586 and fixes PR28266 llvm-svn: 302179
2017-05-05 02:19:52 +08:00
// CHECK-SAME: "r,~{dirflag},~{fpsr},~{flags}"(i32* %{{.*}})
[ms-inline asm] Add test cases for r166592. The test cases only works if the source operand is a register. llvm-svn: 166594
2012-10-25 01:23:06 +08:00
}
Update to use references to attribute groups instead of listing the attributes on the call/invoke instructions. llvm-svn: 175878
2013-02-22 17:10:20 +08:00
[ms-inline asm] Move a few test cases from the 32-bit version to the 64-bit version as lea is only available in 64-bit mode. llvm-svn: 179190
2013-04-11 02:08:17 +08:00
struct t3_type { int a, b; };
int t3() {
struct t3_type foo;
foo.a = 1;
foo.b = 2;
__asm {
lea ebx, foo
mov eax, [ebx].0
mov [ebx].4, ecx
}
return foo.b;
// CHECK: t3
[ms-inline-asm] Use the frontend size only for ambiguous instructions This avoids problems on code like this: char buf[16]; __asm { movups xmm0, [buf] mov [buf], eax } The frontend size in this case (1) is wrong, and the register makes the instruction matching unambiguous. There are also enough bytes available that we shouldn't complain to the user that they are potentially using an incorrectly sized instruction to access the variable. Supersedes D32636 and D26586 and fixes PR28266 llvm-svn: 302179
2017-05-05 02:19:52 +08:00
// CHECK: call void asm sideeffect inteldialect
// CHECK-SAME: lea ebx, $0
Fixups to FE tests affected by D36793 Differential Revision: https://reviews.llvm.org/D36794 llvm-svn: 311640
2017-08-24 16:47:26 +08:00
// CHECK-SAME: mov eax, [ebx]
// CHECK-SAME: mov [ebx + $$4], ecx
[ms-inline-asm] Use the frontend size only for ambiguous instructions This avoids problems on code like this: char buf[16]; __asm { movups xmm0, [buf] mov [buf], eax } The frontend size in this case (1) is wrong, and the register makes the instruction matching unambiguous. There are also enough bytes available that we shouldn't complain to the user that they are potentially using an incorrectly sized instruction to access the variable. Supersedes D32636 and D26586 and fixes PR28266 llvm-svn: 302179
2017-05-05 02:19:52 +08:00
// CHECK-SAME: "*m,~{eax},~{ebx},~{dirflag},~{fpsr},~{flags}"(%struct.t3_type* %{{.*}})
[ms-inline asm] Move a few test cases from the 32-bit version to the 64-bit version as lea is only available in 64-bit mode. llvm-svn: 179190
2013-04-11 02:08:17 +08:00
}
int t4() {
struct t3_type foo;
foo.a = 1;
foo.b = 2;
__asm {
lea ebx, foo
Add support for nested blocks in Microsoft inline assembly This fixes http://llvm.org/PR20204. llvm-svn: 212389
2014-07-06 13:26:54 +08:00
{
mov eax, [ebx].foo.a
}
[ms-inline asm] Move a few test cases from the 32-bit version to the 64-bit version as lea is only available in 64-bit mode. llvm-svn: 179190
2013-04-11 02:08:17 +08:00
mov [ebx].foo.b, ecx
}
return foo.b;
// CHECK: t4
[ms-inline-asm] Use the frontend size only for ambiguous instructions This avoids problems on code like this: char buf[16]; __asm { movups xmm0, [buf] mov [buf], eax } The frontend size in this case (1) is wrong, and the register makes the instruction matching unambiguous. There are also enough bytes available that we shouldn't complain to the user that they are potentially using an incorrectly sized instruction to access the variable. Supersedes D32636 and D26586 and fixes PR28266 llvm-svn: 302179
2017-05-05 02:19:52 +08:00
// CHECK: call void asm sideeffect inteldialect
// CHECK-SAME: lea ebx, $0
Fixups to FE tests affected by D36793 Differential Revision: https://reviews.llvm.org/D36794 llvm-svn: 311640
2017-08-24 16:47:26 +08:00
// CHECK-SAME: mov eax, [ebx]
// CHECK-SAME: mov [ebx + $$4], ecx
[ms-inline-asm] Use the frontend size only for ambiguous instructions This avoids problems on code like this: char buf[16]; __asm { movups xmm0, [buf] mov [buf], eax } The frontend size in this case (1) is wrong, and the register makes the instruction matching unambiguous. There are also enough bytes available that we shouldn't complain to the user that they are potentially using an incorrectly sized instruction to access the variable. Supersedes D32636 and D26586 and fixes PR28266 llvm-svn: 302179
2017-05-05 02:19:52 +08:00
// CHECK-SAME: "*m,~{eax},~{ebx},~{dirflag},~{fpsr},~{flags}"(%struct.t3_type* %{{.*}})
[ms-inline asm] Move a few test cases from the 32-bit version to the 64-bit version as lea is only available in 64-bit mode. llvm-svn: 179190
2013-04-11 02:08:17 +08:00
}
[ms] [X86] Use "P" modifier on all branch-target operands in inline X86 assembly. Summary: Extend D71677 to apply to all branch-target operands, rather than special-casing call instructions. Also add a regression test for llvm.org/PR44272, since this finishes fixing it. Reviewers: thakis, rnk Reviewed By: thakis Subscribers: merge_guards_bot, hiraditya, cfe-commits, llvm-commits Tags: #clang, #llvm Differential Revision: https://reviews.llvm.org/D72417
2020-01-10 03:01:55 +08:00
void bar() {}
void t5() {
__asm {
call bar
jmp bar
}
// CHECK: t5
// CHECK: call void asm sideeffect inteldialect
// CHECK-SAME: call qword ptr ${0:P}
// CHECK-SAME: jmp qword ptr ${1:P}
// CHECK-SAME: "*m,*m,~{dirflag},~{fpsr},~{flags}"(void (...)* bitcast (void ()* @bar to void (...)*), void (...)* bitcast (void ()* @bar to void (...)*))
}