forked from OSchip/llvm-project
36 lines
1.3 KiB
LLVM
36 lines
1.3 KiB
LLVM
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -O2 -mtriple=x86_64-linux-android -mattr=+mmx | FileCheck %s --check-prefix=MMX
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; RUN: llc < %s -O2 -mtriple=x86_64-linux-gnu -mattr=+mmx | FileCheck %s --check-prefix=MMX
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; RUN: llc < %s -O2 -mtriple=x86_64-linux-android | FileCheck %s
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; RUN: llc < %s -O2 -mtriple=x86_64-linux-gnu | FileCheck %s
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define void @test_select(fp128* %p, fp128* %q, i1 zeroext %c) {
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; MMX-LABEL: test_select:
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; MMX: # BB#0:
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; MMX-NEXT: testb %dl, %dl
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; MMX-NEXT: jne .LBB0_1
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; MMX-NEXT: # BB#2:
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; MMX-NEXT: movaps {{.*}}(%rip), %xmm0
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; MMX-NEXT: movaps %xmm0, (%rsi)
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; MMX-NEXT: retq
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; MMX-NEXT: .LBB0_1:
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; MMX-NEXT: movaps (%rdi), %xmm0
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; MMX-NEXT: movaps %xmm0, (%rsi)
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; MMX-NEXT: retq
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;
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; CHECK-LABEL: test_select:
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; CHECK: # BB#0:
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; CHECK-NEXT: xorl %eax, %eax
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; CHECK-NEXT: testb %dl, %dl
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; CHECK-NEXT: cmovneq (%rdi), %rax
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; CHECK-NEXT: movabsq $9223231299366420480, %rcx # imm = 0x7FFF800000000000
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; CHECK-NEXT: cmovneq 8(%rdi), %rcx
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; CHECK-NEXT: movq %rcx, 8(%rsi)
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; CHECK-NEXT: movq %rax, (%rsi)
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; CHECK-NEXT: retq
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%a = load fp128, fp128* %p, align 2
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%r = select i1 %c, fp128 %a, fp128 0xL00000000000000007FFF800000000000
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store fp128 %r, fp128* %q
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ret void
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}
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