2016-06-15 04:14:24 +08:00
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/* ===-------- intrin.h ---------------------------------------------------===
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2013-08-31 08:22:48 +08:00
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*
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2019-04-09 04:51:30 +08:00
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* Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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* See https://llvm.org/LICENSE.txt for license information.
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* SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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2013-08-31 08:22:48 +08:00
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*
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*===-----------------------------------------------------------------------===
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*/
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/* Only include this if we're compiling for the windows platform. */
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#ifndef _MSC_VER
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2016-06-15 04:14:24 +08:00
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#include_next <intrin.h>
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2013-08-31 08:22:48 +08:00
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#else
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#ifndef __INTRIN_H
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#define __INTRIN_H
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/* First include the standard intrinsics. */
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2014-06-26 00:48:40 +08:00
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#if defined(__i386__) || defined(__x86_64__)
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2013-08-31 08:22:48 +08:00
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#include <x86intrin.h>
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2014-06-26 00:48:40 +08:00
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#endif
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2013-08-31 08:22:48 +08:00
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2016-08-07 01:58:24 +08:00
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#if defined(__arm__)
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#include <armintr.h>
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#endif
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[COFF] Add more missing MSVC ARM64 intrinsics
Summary:
Added the following intrinsics:
_BitScanForward, _BitScanReverse, _BitScanForward64, _BitScanReverse64
_InterlockedAnd64, _InterlockedDecrement64, _InterlockedExchange64,
_InterlockedExchangeAdd64, _InterlockedExchangeSub64,
_InterlockedIncrement64, _InterlockedOr64, _InterlockedXor64.
Reviewers: compnerd, mstorsjo, rnk, javed.absar
Reviewed By: mstorsjo
Subscribers: kristof.beyls, chrib, llvm-commits
Differential Revision: https://reviews.llvm.org/D49445
llvm-svn: 337327
2018-07-18 06:03:24 +08:00
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#if defined(__aarch64__)
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2017-07-26 13:29:40 +08:00
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#include <arm64intr.h>
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#endif
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2014-01-29 07:01:59 +08:00
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/* For the definition of jmp_buf. */
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2014-07-09 02:34:46 +08:00
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#if __STDC_HOSTED__
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2014-01-29 07:01:59 +08:00
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#include <setjmp.h>
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2014-07-09 02:34:46 +08:00
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#endif
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2014-01-29 07:01:59 +08:00
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2015-06-16 07:20:35 +08:00
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/* Define the default attributes for the functions in this file. */
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2015-06-30 21:36:19 +08:00
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#define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__))
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2015-06-16 07:20:35 +08:00
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2019-11-15 05:21:35 +08:00
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#if __x86_64__
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#define __LPTRINT_TYPE__ __int64
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#else
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#define __LPTRINT_TYPE__ long
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#endif
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2013-09-19 06:24:01 +08:00
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#ifdef __cplusplus
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extern "C" {
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#endif
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2014-07-08 13:46:04 +08:00
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#if defined(__MMX__)
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2013-08-31 08:22:48 +08:00
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/* And the random ones that aren't in those files. */
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__m64 _m_from_float(float);
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float _m_to_float(__m64);
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2014-07-08 13:46:04 +08:00
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#endif
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2013-08-31 08:22:48 +08:00
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/* Other assorted instruction intrinsics. */
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void __addfsbyte(unsigned long, unsigned char);
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void __addfsdword(unsigned long, unsigned long);
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void __addfsword(unsigned long, unsigned short);
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void __code_seg(const char *);
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void __cpuid(int[4], int);
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void __cpuidex(int[4], int, int);
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__int64 __emul(int, int);
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unsigned __int64 __emulu(unsigned int, unsigned int);
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unsigned int __getcallerseflags(void);
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void __halt(void);
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unsigned char __inbyte(unsigned short);
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void __inbytestring(unsigned short, unsigned char *, unsigned long);
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void __incfsbyte(unsigned long);
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void __incfsdword(unsigned long);
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void __incfsword(unsigned long);
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unsigned long __indword(unsigned short);
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void __indwordstring(unsigned short, unsigned long *, unsigned long);
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2018-06-22 01:07:04 +08:00
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void __int2c(void);
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2013-08-31 08:22:48 +08:00
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void __invlpg(void *);
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unsigned short __inword(unsigned short);
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void __inwordstring(unsigned short, unsigned short *, unsigned long);
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void __lidt(void *);
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unsigned __int64 __ll_lshift(unsigned __int64, int);
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__int64 __ll_rshift(__int64, int);
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void __movsb(unsigned char *, unsigned char const *, size_t);
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void __movsd(unsigned long *, unsigned long const *, size_t);
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void __movsw(unsigned short *, unsigned short const *, size_t);
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void __nop(void);
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void __nvreg_restore_fence(void);
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void __nvreg_save_fence(void);
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void __outbyte(unsigned short, unsigned char);
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void __outbytestring(unsigned short, unsigned char *, unsigned long);
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void __outdword(unsigned short, unsigned long);
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void __outdwordstring(unsigned short, unsigned long *, unsigned long);
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void __outword(unsigned short, unsigned short);
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void __outwordstring(unsigned short, unsigned short *, unsigned long);
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unsigned long __readcr0(void);
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unsigned long __readcr2(void);
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2019-11-15 05:21:35 +08:00
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unsigned __LPTRINT_TYPE__ __readcr3(void);
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2014-01-24 20:13:47 +08:00
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unsigned long __readcr4(void);
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2013-08-31 08:22:48 +08:00
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unsigned long __readcr8(void);
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unsigned int __readdr(unsigned int);
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2014-01-24 08:52:39 +08:00
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#ifdef __i386__
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2013-08-31 08:22:48 +08:00
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unsigned char __readfsbyte(unsigned long);
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unsigned short __readfsword(unsigned long);
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2021-09-02 04:17:19 +08:00
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unsigned long __readfsdword(unsigned long);
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unsigned __int64 __readfsqword(unsigned long);
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2014-01-24 08:52:39 +08:00
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#endif
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2013-08-31 08:22:48 +08:00
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unsigned __int64 __readmsr(unsigned long);
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unsigned __int64 __readpmc(unsigned long);
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unsigned long __segmentlimit(unsigned long);
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void __sidt(void *);
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void __stosb(unsigned char *, unsigned char, size_t);
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void __stosd(unsigned long *, unsigned long, size_t);
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void __stosw(unsigned short *, unsigned short, size_t);
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void __svm_clgi(void);
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void __svm_invlpga(void *, int);
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void __svm_skinit(int);
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void __svm_stgi(void);
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void __svm_vmload(size_t);
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void __svm_vmrun(size_t);
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void __svm_vmsave(size_t);
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2018-06-22 01:07:04 +08:00
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void __ud2(void);
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2013-08-31 08:22:48 +08:00
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unsigned __int64 __ull_rshift(unsigned __int64, int);
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void __vmx_off(void);
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void __vmx_vmptrst(unsigned __int64 *);
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void __wbinvd(void);
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void __writecr0(unsigned int);
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2019-11-15 05:21:35 +08:00
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void __writecr3(unsigned __INTPTR_TYPE__);
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2013-08-31 08:22:48 +08:00
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void __writecr4(unsigned int);
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void __writecr8(unsigned int);
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void __writedr(unsigned int, unsigned int);
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void __writefsbyte(unsigned long, unsigned char);
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void __writefsdword(unsigned long, unsigned long);
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void __writefsqword(unsigned long, unsigned __int64);
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void __writefsword(unsigned long, unsigned short);
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void __writemsr(unsigned long, unsigned __int64);
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void *_AddressOfReturnAddress(void);
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unsigned char _BitScanForward(unsigned long *_Index, unsigned long _Mask);
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unsigned char _BitScanReverse(unsigned long *_Index, unsigned long _Mask);
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unsigned char _bittest(long const *, long);
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unsigned char _bittestandcomplement(long *, long);
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unsigned char _bittestandreset(long *, long);
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unsigned char _bittestandset(long *, long);
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void __cdecl _disable(void);
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void __cdecl _enable(void);
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long _InterlockedAddLargeStatistic(__int64 volatile *_Addend, long _Value);
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unsigned char _interlockedbittestandreset(long volatile *, long);
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unsigned char _interlockedbittestandset(long volatile *, long);
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void *_InterlockedCompareExchangePointer_HLEAcquire(void *volatile *, void *,
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void *);
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void *_InterlockedCompareExchangePointer_HLERelease(void *volatile *, void *,
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void *);
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long _InterlockedExchangeAdd_HLEAcquire(long volatile *, long);
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long _InterlockedExchangeAdd_HLERelease(long volatile *, long);
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2014-01-24 20:13:47 +08:00
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__int64 _InterlockedExchangeAdd64_HLEAcquire(__int64 volatile *, __int64);
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__int64 _InterlockedExchangeAdd64_HLERelease(__int64 volatile *, __int64);
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2021-10-06 22:30:14 +08:00
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void _ReadBarrier(void);
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void _ReadWriteBarrier(void);
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2013-08-31 08:22:48 +08:00
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unsigned int _rorx_u32(unsigned int, const unsigned int);
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int _sarx_i32(int, unsigned int);
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2014-07-09 02:34:46 +08:00
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#if __STDC_HOSTED__
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2014-01-29 07:01:59 +08:00
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int __cdecl _setjmp(jmp_buf);
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2014-07-09 02:34:46 +08:00
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#endif
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2013-08-31 08:22:48 +08:00
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unsigned int _shlx_u32(unsigned int, unsigned int);
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unsigned int _shrx_u32(unsigned int, unsigned int);
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void _Store_HLERelease(long volatile *, long);
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void _Store64_HLERelease(__int64 volatile *, __int64);
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void _StorePointer_HLERelease(void *volatile *, void *);
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2021-10-06 22:30:14 +08:00
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void _WriteBarrier(void);
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2013-08-31 08:22:48 +08:00
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unsigned __int32 xbegin(void);
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void _xend(void);
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/* These additional intrinsics are turned on in x64/amd64/x86_64 mode. */
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2013-10-01 05:08:05 +08:00
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#ifdef __x86_64__
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2013-08-31 08:22:48 +08:00
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void __addgsbyte(unsigned long, unsigned char);
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void __addgsdword(unsigned long, unsigned long);
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void __addgsqword(unsigned long, unsigned __int64);
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void __addgsword(unsigned long, unsigned short);
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void __faststorefence(void);
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void __incgsbyte(unsigned long);
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void __incgsdword(unsigned long);
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void __incgsqword(unsigned long);
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void __incgsword(unsigned long);
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2014-01-24 20:13:47 +08:00
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void __movsq(unsigned long long *, unsigned long long const *, size_t);
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unsigned char __readgsbyte(unsigned long);
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unsigned long __readgsdword(unsigned long);
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2014-03-13 05:09:05 +08:00
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unsigned __int64 __readgsqword(unsigned long);
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2014-01-24 20:13:47 +08:00
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unsigned short __readgsword(unsigned long);
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2013-08-31 08:22:48 +08:00
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unsigned __int64 __shiftleft128(unsigned __int64 _LowPart,
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unsigned __int64 _HighPart,
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unsigned char _Shift);
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unsigned __int64 __shiftright128(unsigned __int64 _LowPart,
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unsigned __int64 _HighPart,
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unsigned char _Shift);
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void __stosq(unsigned __int64 *, unsigned __int64, size_t);
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2014-01-24 20:13:47 +08:00
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unsigned char __vmx_on(unsigned __int64 *);
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unsigned char __vmx_vmclear(unsigned __int64 *);
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unsigned char __vmx_vmlaunch(void);
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unsigned char __vmx_vmptrld(unsigned __int64 *);
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unsigned char __vmx_vmread(size_t, size_t *);
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unsigned char __vmx_vmresume(void);
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unsigned char __vmx_vmwrite(size_t, size_t);
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void __writegsbyte(unsigned long, unsigned char);
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void __writegsdword(unsigned long, unsigned long);
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void __writegsqword(unsigned long, unsigned __int64);
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void __writegsword(unsigned long, unsigned short);
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2013-08-31 08:22:48 +08:00
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unsigned char _bittest64(__int64 const *, __int64);
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unsigned char _bittestandcomplement64(__int64 *, __int64);
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unsigned char _bittestandreset64(__int64 *, __int64);
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unsigned char _bittestandset64(__int64 *, __int64);
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long _InterlockedAnd_np(long volatile *_Value, long _Mask);
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short _InterlockedAnd16_np(short volatile *_Value, short _Mask);
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__int64 _InterlockedAnd64_np(__int64 volatile *_Value, __int64 _Mask);
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char _InterlockedAnd8_np(char volatile *_Value, char _Mask);
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unsigned char _interlockedbittestandreset64(__int64 volatile *, __int64);
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unsigned char _interlockedbittestandset64(__int64 volatile *, __int64);
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long _InterlockedCompareExchange_np(long volatile *_Destination, long _Exchange,
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long _Comparand);
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unsigned char _InterlockedCompareExchange128_np(__int64 volatile *_Destination,
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__int64 _ExchangeHigh,
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__int64 _ExchangeLow,
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__int64 *_ComparandResult);
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short _InterlockedCompareExchange16_np(short volatile *_Destination,
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short _Exchange, short _Comparand);
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__int64 _InterlockedCompareExchange64_np(__int64 volatile *_Destination,
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__int64 _Exchange, __int64 _Comparand);
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void *_InterlockedCompareExchangePointer_np(void *volatile *_Destination,
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void *_Exchange, void *_Comparand);
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long _InterlockedOr_np(long volatile *_Value, long _Mask);
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short _InterlockedOr16_np(short volatile *_Value, short _Mask);
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2013-09-28 08:15:41 +08:00
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__int64 _InterlockedOr64_np(__int64 volatile *_Value, __int64 _Mask);
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2013-08-31 08:22:48 +08:00
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char _InterlockedOr8_np(char volatile *_Value, char _Mask);
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long _InterlockedXor_np(long volatile *_Value, long _Mask);
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short _InterlockedXor16_np(short volatile *_Value, short _Mask);
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__int64 _InterlockedXor64_np(__int64 volatile *_Value, __int64 _Mask);
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char _InterlockedXor8_np(char volatile *_Value, char _Mask);
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unsigned __int64 _rorx_u64(unsigned __int64, const unsigned int);
|
2014-01-24 20:13:47 +08:00
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__int64 _sarx_i64(__int64, unsigned int);
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unsigned __int64 _shlx_u64(unsigned __int64, unsigned int);
|
2014-12-03 07:30:26 +08:00
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unsigned __int64 _shrx_u64(unsigned __int64, unsigned int);
|
2016-10-11 02:09:27 +08:00
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__int64 __mulh(__int64, __int64);
|
2016-10-05 06:29:49 +08:00
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unsigned __int64 __umulh(unsigned __int64, unsigned __int64);
|
2016-10-11 02:09:27 +08:00
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__int64 _mul128(__int64, __int64, __int64*);
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unsigned __int64 _umul128(unsigned __int64,
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unsigned __int64,
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unsigned __int64*);
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2013-09-19 06:24:01 +08:00
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2013-10-01 05:08:05 +08:00
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#endif /* __x86_64__ */
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2013-09-19 08:19:53 +08:00
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[COFF] Add more missing MSVC ARM64 intrinsics
Summary:
Added the following intrinsics:
_BitScanForward, _BitScanReverse, _BitScanForward64, _BitScanReverse64
_InterlockedAnd64, _InterlockedDecrement64, _InterlockedExchange64,
_InterlockedExchangeAdd64, _InterlockedExchangeSub64,
_InterlockedIncrement64, _InterlockedOr64, _InterlockedXor64.
Reviewers: compnerd, mstorsjo, rnk, javed.absar
Reviewed By: mstorsjo
Subscribers: kristof.beyls, chrib, llvm-commits
Differential Revision: https://reviews.llvm.org/D49445
llvm-svn: 337327
2018-07-18 06:03:24 +08:00
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#if defined(__x86_64__) || defined(__arm__) || defined(__aarch64__)
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2016-10-14 06:35:07 +08:00
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2018-06-22 01:07:04 +08:00
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unsigned char _BitScanForward64(unsigned long *_Index, unsigned __int64 _Mask);
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unsigned char _BitScanReverse64(unsigned long *_Index, unsigned __int64 _Mask);
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2020-07-09 01:39:56 +08:00
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#endif
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#if defined(__i386__) || defined(__x86_64__) || defined(__arm__) || defined(__aarch64__)
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2016-10-14 06:35:07 +08:00
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__int64 _InterlockedDecrement64(__int64 volatile *_Addend);
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__int64 _InterlockedExchange64(__int64 volatile *_Target, __int64 _Value);
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__int64 _InterlockedExchangeAdd64(__int64 volatile *_Addend, __int64 _Value);
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__int64 _InterlockedExchangeSub64(__int64 volatile *_Subend, __int64 _Value);
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__int64 _InterlockedIncrement64(__int64 volatile *_Addend);
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__int64 _InterlockedOr64(__int64 volatile *_Value, __int64 _Mask);
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__int64 _InterlockedXor64(__int64 volatile *_Value, __int64 _Mask);
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__int64 _InterlockedAnd64(__int64 volatile *_Value, __int64 _Mask);
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#endif
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2016-09-15 05:19:43 +08:00
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/*----------------------------------------------------------------------------*\
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|* Interlocked Exchange Add
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\*----------------------------------------------------------------------------*/
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2016-09-27 06:12:43 +08:00
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#if defined(__arm__) || defined(__aarch64__)
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2018-11-01 05:31:09 +08:00
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char _InterlockedExchangeAdd8_acq(char volatile *_Addend, char _Value);
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char _InterlockedExchangeAdd8_nf(char volatile *_Addend, char _Value);
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char _InterlockedExchangeAdd8_rel(char volatile *_Addend, char _Value);
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short _InterlockedExchangeAdd16_acq(short volatile *_Addend, short _Value);
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short _InterlockedExchangeAdd16_nf(short volatile *_Addend, short _Value);
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short _InterlockedExchangeAdd16_rel(short volatile *_Addend, short _Value);
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long _InterlockedExchangeAdd_acq(long volatile *_Addend, long _Value);
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long _InterlockedExchangeAdd_nf(long volatile *_Addend, long _Value);
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long _InterlockedExchangeAdd_rel(long volatile *_Addend, long _Value);
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__int64 _InterlockedExchangeAdd64_acq(__int64 volatile *_Addend, __int64 _Value);
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__int64 _InterlockedExchangeAdd64_nf(__int64 volatile *_Addend, __int64 _Value);
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__int64 _InterlockedExchangeAdd64_rel(__int64 volatile *_Addend, __int64 _Value);
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2016-09-27 06:12:43 +08:00
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#endif
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2016-09-15 05:19:43 +08:00
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/*----------------------------------------------------------------------------*\
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|* Interlocked Increment
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\*----------------------------------------------------------------------------*/
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2016-09-27 06:12:43 +08:00
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#if defined(__arm__) || defined(__aarch64__)
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2018-11-06 13:05:32 +08:00
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short _InterlockedIncrement16_acq(short volatile *_Value);
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short _InterlockedIncrement16_nf(short volatile *_Value);
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short _InterlockedIncrement16_rel(short volatile *_Value);
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long _InterlockedIncrement_acq(long volatile *_Value);
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long _InterlockedIncrement_nf(long volatile *_Value);
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long _InterlockedIncrement_rel(long volatile *_Value);
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__int64 _InterlockedIncrement64_acq(__int64 volatile *_Value);
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__int64 _InterlockedIncrement64_nf(__int64 volatile *_Value);
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__int64 _InterlockedIncrement64_rel(__int64 volatile *_Value);
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2016-09-27 06:12:43 +08:00
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#endif
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2016-09-15 05:19:43 +08:00
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/*----------------------------------------------------------------------------*\
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|* Interlocked Decrement
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\*----------------------------------------------------------------------------*/
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2016-09-27 06:12:43 +08:00
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#if defined(__arm__) || defined(__aarch64__)
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2018-11-06 13:07:43 +08:00
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short _InterlockedDecrement16_acq(short volatile *_Value);
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short _InterlockedDecrement16_nf(short volatile *_Value);
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short _InterlockedDecrement16_rel(short volatile *_Value);
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long _InterlockedDecrement_acq(long volatile *_Value);
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long _InterlockedDecrement_nf(long volatile *_Value);
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long _InterlockedDecrement_rel(long volatile *_Value);
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__int64 _InterlockedDecrement64_acq(__int64 volatile *_Value);
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__int64 _InterlockedDecrement64_nf(__int64 volatile *_Value);
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__int64 _InterlockedDecrement64_rel(__int64 volatile *_Value);
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2016-09-27 06:12:43 +08:00
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#endif
|
2016-09-15 05:19:43 +08:00
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/*----------------------------------------------------------------------------*\
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|* Interlocked And
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\*----------------------------------------------------------------------------*/
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2016-09-27 06:12:43 +08:00
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#if defined(__arm__) || defined(__aarch64__)
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2018-11-06 13:03:13 +08:00
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char _InterlockedAnd8_acq(char volatile *_Value, char _Mask);
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char _InterlockedAnd8_nf(char volatile *_Value, char _Mask);
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char _InterlockedAnd8_rel(char volatile *_Value, char _Mask);
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short _InterlockedAnd16_acq(short volatile *_Value, short _Mask);
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short _InterlockedAnd16_nf(short volatile *_Value, short _Mask);
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short _InterlockedAnd16_rel(short volatile *_Value, short _Mask);
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long _InterlockedAnd_acq(long volatile *_Value, long _Mask);
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long _InterlockedAnd_nf(long volatile *_Value, long _Mask);
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long _InterlockedAnd_rel(long volatile *_Value, long _Mask);
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__int64 _InterlockedAnd64_acq(__int64 volatile *_Value, __int64 _Mask);
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__int64 _InterlockedAnd64_nf(__int64 volatile *_Value, __int64 _Mask);
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__int64 _InterlockedAnd64_rel(__int64 volatile *_Value, __int64 _Mask);
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2016-09-27 06:12:43 +08:00
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#endif
|
2016-09-15 05:19:43 +08:00
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/*----------------------------------------------------------------------------*\
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2018-06-08 05:39:04 +08:00
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|* Bit Counting and Testing
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\*----------------------------------------------------------------------------*/
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#if defined(__arm__) || defined(__aarch64__)
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unsigned char _interlockedbittestandset_acq(long volatile *_BitBase,
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long _BitPos);
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unsigned char _interlockedbittestandset_nf(long volatile *_BitBase,
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long _BitPos);
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unsigned char _interlockedbittestandset_rel(long volatile *_BitBase,
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long _BitPos);
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unsigned char _interlockedbittestandreset_acq(long volatile *_BitBase,
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long _BitPos);
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unsigned char _interlockedbittestandreset_nf(long volatile *_BitBase,
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long _BitPos);
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unsigned char _interlockedbittestandreset_rel(long volatile *_BitBase,
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long _BitPos);
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#endif
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/*----------------------------------------------------------------------------*\
|
2016-09-15 05:19:43 +08:00
|
|
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|* Interlocked Or
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\*----------------------------------------------------------------------------*/
|
2016-09-27 06:12:43 +08:00
|
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|
#if defined(__arm__) || defined(__aarch64__)
|
2018-11-06 09:11:25 +08:00
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char _InterlockedOr8_acq(char volatile *_Value, char _Mask);
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char _InterlockedOr8_nf(char volatile *_Value, char _Mask);
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char _InterlockedOr8_rel(char volatile *_Value, char _Mask);
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short _InterlockedOr16_acq(short volatile *_Value, short _Mask);
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short _InterlockedOr16_nf(short volatile *_Value, short _Mask);
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short _InterlockedOr16_rel(short volatile *_Value, short _Mask);
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long _InterlockedOr_acq(long volatile *_Value, long _Mask);
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long _InterlockedOr_nf(long volatile *_Value, long _Mask);
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long _InterlockedOr_rel(long volatile *_Value, long _Mask);
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__int64 _InterlockedOr64_acq(__int64 volatile *_Value, __int64 _Mask);
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__int64 _InterlockedOr64_nf(__int64 volatile *_Value, __int64 _Mask);
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__int64 _InterlockedOr64_rel(__int64 volatile *_Value, __int64 _Mask);
|
2016-09-27 06:12:43 +08:00
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|
#endif
|
2016-09-15 05:19:43 +08:00
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/*----------------------------------------------------------------------------*\
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|* Interlocked Xor
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\*----------------------------------------------------------------------------*/
|
2016-09-27 06:12:43 +08:00
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#if defined(__arm__) || defined(__aarch64__)
|
2018-11-06 12:55:20 +08:00
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char _InterlockedXor8_acq(char volatile *_Value, char _Mask);
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char _InterlockedXor8_nf(char volatile *_Value, char _Mask);
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char _InterlockedXor8_rel(char volatile *_Value, char _Mask);
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short _InterlockedXor16_acq(short volatile *_Value, short _Mask);
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short _InterlockedXor16_nf(short volatile *_Value, short _Mask);
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short _InterlockedXor16_rel(short volatile *_Value, short _Mask);
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long _InterlockedXor_acq(long volatile *_Value, long _Mask);
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long _InterlockedXor_nf(long volatile *_Value, long _Mask);
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long _InterlockedXor_rel(long volatile *_Value, long _Mask);
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__int64 _InterlockedXor64_acq(__int64 volatile *_Value, __int64 _Mask);
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__int64 _InterlockedXor64_nf(__int64 volatile *_Value, __int64 _Mask);
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__int64 _InterlockedXor64_rel(__int64 volatile *_Value, __int64 _Mask);
|
2016-09-27 06:12:43 +08:00
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#endif
|
2016-09-15 05:19:43 +08:00
|
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|
/*----------------------------------------------------------------------------*\
|
|
|
|
|
|* Interlocked Exchange
|
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|
|
\*----------------------------------------------------------------------------*/
|
2016-09-27 06:12:43 +08:00
|
|
|
#if defined(__arm__) || defined(__aarch64__)
|
[COFF, ARM64] Implement InterlockedExchange*_* builtins
Summary: Windows SDK needs these intrinsics to be proper builtins. This is second in a series of patches to move intrinsic defintions out of intrin.h.
Reviewers: rnk, mstorsjo, efriedma, TomTan
Reviewed By: rnk, efriedma
Subscribers: javed.absar, kristof.beyls, chrib, jfb, kristina, cfe-commits
Differential Revision: https://reviews.llvm.org/D54046
llvm-svn: 346044
2018-11-03 05:18:23 +08:00
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char _InterlockedExchange8_acq(char volatile *_Target, char _Value);
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char _InterlockedExchange8_nf(char volatile *_Target, char _Value);
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char _InterlockedExchange8_rel(char volatile *_Target, char _Value);
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short _InterlockedExchange16_acq(short volatile *_Target, short _Value);
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short _InterlockedExchange16_nf(short volatile *_Target, short _Value);
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short _InterlockedExchange16_rel(short volatile *_Target, short _Value);
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long _InterlockedExchange_acq(long volatile *_Target, long _Value);
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long _InterlockedExchange_nf(long volatile *_Target, long _Value);
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long _InterlockedExchange_rel(long volatile *_Target, long _Value);
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__int64 _InterlockedExchange64_acq(__int64 volatile *_Target, __int64 _Value);
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__int64 _InterlockedExchange64_nf(__int64 volatile *_Target, __int64 _Value);
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__int64 _InterlockedExchange64_rel(__int64 volatile *_Target, __int64 _Value);
|
2016-09-27 06:12:43 +08:00
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#endif
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/*----------------------------------------------------------------------------*\
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|* Interlocked Compare Exchange
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\*----------------------------------------------------------------------------*/
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#if defined(__arm__) || defined(__aarch64__)
|
2018-11-06 08:36:48 +08:00
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char _InterlockedCompareExchange8_acq(char volatile *_Destination,
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char _Exchange, char _Comparand);
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char _InterlockedCompareExchange8_nf(char volatile *_Destination,
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char _Exchange, char _Comparand);
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char _InterlockedCompareExchange8_rel(char volatile *_Destination,
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char _Exchange, char _Comparand);
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short _InterlockedCompareExchange16_acq(short volatile *_Destination,
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short _Exchange, short _Comparand);
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short _InterlockedCompareExchange16_nf(short volatile *_Destination,
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short _Exchange, short _Comparand);
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short _InterlockedCompareExchange16_rel(short volatile *_Destination,
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short _Exchange, short _Comparand);
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long _InterlockedCompareExchange_acq(long volatile *_Destination,
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long _Exchange, long _Comparand);
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long _InterlockedCompareExchange_nf(long volatile *_Destination,
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long _Exchange, long _Comparand);
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long _InterlockedCompareExchange_rel(long volatile *_Destination,
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long _Exchange, long _Comparand);
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__int64 _InterlockedCompareExchange64_acq(__int64 volatile *_Destination,
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__int64 _Exchange, __int64 _Comparand);
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__int64 _InterlockedCompareExchange64_nf(__int64 volatile *_Destination,
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__int64 _Exchange, __int64 _Comparand);
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__int64 _InterlockedCompareExchange64_rel(__int64 volatile *_Destination,
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__int64 _Exchange, __int64 _Comparand);
|
2016-09-27 06:12:43 +08:00
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|
#endif
|
2020-11-25 03:50:33 +08:00
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|
#if defined(__x86_64__) || defined(__aarch64__)
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unsigned char _InterlockedCompareExchange128(__int64 volatile *_Destination,
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|
__int64 _ExchangeHigh,
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__int64 _ExchangeLow,
|
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|
|
__int64 *_ComparandResult);
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|
#endif
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|
|
#if defined(__aarch64__)
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unsigned char _InterlockedCompareExchange128_acq(__int64 volatile *_Destination,
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|
__int64 _ExchangeHigh,
|
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|
__int64 _ExchangeLow,
|
|
|
|
|
__int64 *_ComparandResult);
|
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|
|
unsigned char _InterlockedCompareExchange128_nf(__int64 volatile *_Destination,
|
|
|
|
|
__int64 _ExchangeHigh,
|
|
|
|
|
__int64 _ExchangeLow,
|
|
|
|
|
__int64 *_ComparandResult);
|
|
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|
|
unsigned char _InterlockedCompareExchange128_rel(__int64 volatile *_Destination,
|
|
|
|
|
__int64 _ExchangeHigh,
|
|
|
|
|
__int64 _ExchangeLow,
|
|
|
|
|
__int64 *_ComparandResult);
|
|
|
|
|
#endif
|
2014-01-24 08:52:39 +08:00
|
|
|
|
2014-03-13 06:00:32 +08:00
|
|
|
/*----------------------------------------------------------------------------*\
|
|
|
|
|
|* movs, stos
|
|
|
|
|
\*----------------------------------------------------------------------------*/
|
2014-06-26 00:48:40 +08:00
|
|
|
#if defined(__i386__) || defined(__x86_64__)
|
2020-09-05 00:10:09 +08:00
|
|
|
static __inline__ void __DEFAULT_FN_ATTRS __movsb(unsigned char *__dst,
|
|
|
|
|
unsigned char const *__src,
|
|
|
|
|
size_t __n) {
|
2021-07-23 15:53:48 +08:00
|
|
|
#if defined(__x86_64__)
|
|
|
|
|
__asm__ __volatile__("rep movsb"
|
|
|
|
|
: "+D"(__dst), "+S"(__src), "+c"(__n)
|
|
|
|
|
:
|
|
|
|
|
: "memory");
|
|
|
|
|
#else
|
[clang] Make -masm=intel affect inline asm style
With this,
void f() { __asm__("mov eax, ebx"); }
now compiles with clang with -masm=intel.
This matches gcc.
The flag is not accepted in clang-cl mode. It has no effect on
MSVC-style `__asm {}` blocks, which are unconditionally in intel
mode both before and after this change.
One difference to gcc is that in clang, inline asm strings are
"local" while they're "global" in gcc. Building the following with
-masm=intel works with clang, but not with gcc where the ".att_syntax"
from the 2nd __asm__() is in effect until file end (or until a
".intel_syntax" somewhere later in the file):
__asm__("mov eax, ebx");
__asm__(".att_syntax\nmovl %ebx, %eax");
__asm__("mov eax, ebx");
This also updates clang's intrinsic headers to work both in
-masm=att (the default) and -masm=intel modes.
The official solution for this according to "Multiple assembler dialects in asm
templates" in gcc docs->Extensions->Inline Assembly->Extended Asm
is to write every inline asm snippet twice:
bt{l %[Offset],%[Base] | %[Base],%[Offset]}
This works in LLVM after D113932 and D113894, so use that.
(Just putting `.att_syntax` at the start of the snippet works in some but not
all cases: When LLVM interpolates in parameters like `%0`, it uses at&t or
intel syntax according to the inline asm snippet's flavor, so the `.att_syntax`
within the snippet happens to late: The interpolated-in parameter is already
in intel style, and then won't parse in the switched `.att_syntax`.)
It might be nice to invent a `#pragma clang asm_dialect push "att"` /
`#pragma clang asm_dialect pop` to be able to force asm style per snippet,
so that the inline asm string doesn't contain the same code in two variants,
but let's leave that for a follow-up.
Fixes PR21401 and PR20241.
Differential Revision: https://reviews.llvm.org/D113707
2021-11-12 03:20:02 +08:00
|
|
|
__asm__ __volatile__("xchg {%%esi, %1|%1, esi}\n"
|
|
|
|
|
"rep movsb\n"
|
|
|
|
|
"xchg {%%esi, %1|%1, esi}"
|
2021-07-23 15:53:48 +08:00
|
|
|
: "+D"(__dst), "+r"(__src), "+c"(__n)
|
|
|
|
|
:
|
|
|
|
|
: "memory");
|
|
|
|
|
#endif
|
2014-03-13 06:00:32 +08:00
|
|
|
}
|
2020-09-05 00:10:09 +08:00
|
|
|
static __inline__ void __DEFAULT_FN_ATTRS __movsd(unsigned long *__dst,
|
|
|
|
|
unsigned long const *__src,
|
|
|
|
|
size_t __n) {
|
2021-07-23 15:53:48 +08:00
|
|
|
#if defined(__x86_64__)
|
[clang] Make -masm=intel affect inline asm style
With this,
void f() { __asm__("mov eax, ebx"); }
now compiles with clang with -masm=intel.
This matches gcc.
The flag is not accepted in clang-cl mode. It has no effect on
MSVC-style `__asm {}` blocks, which are unconditionally in intel
mode both before and after this change.
One difference to gcc is that in clang, inline asm strings are
"local" while they're "global" in gcc. Building the following with
-masm=intel works with clang, but not with gcc where the ".att_syntax"
from the 2nd __asm__() is in effect until file end (or until a
".intel_syntax" somewhere later in the file):
__asm__("mov eax, ebx");
__asm__(".att_syntax\nmovl %ebx, %eax");
__asm__("mov eax, ebx");
This also updates clang's intrinsic headers to work both in
-masm=att (the default) and -masm=intel modes.
The official solution for this according to "Multiple assembler dialects in asm
templates" in gcc docs->Extensions->Inline Assembly->Extended Asm
is to write every inline asm snippet twice:
bt{l %[Offset],%[Base] | %[Base],%[Offset]}
This works in LLVM after D113932 and D113894, so use that.
(Just putting `.att_syntax` at the start of the snippet works in some but not
all cases: When LLVM interpolates in parameters like `%0`, it uses at&t or
intel syntax according to the inline asm snippet's flavor, so the `.att_syntax`
within the snippet happens to late: The interpolated-in parameter is already
in intel style, and then won't parse in the switched `.att_syntax`.)
It might be nice to invent a `#pragma clang asm_dialect push "att"` /
`#pragma clang asm_dialect pop` to be able to force asm style per snippet,
so that the inline asm string doesn't contain the same code in two variants,
but let's leave that for a follow-up.
Fixes PR21401 and PR20241.
Differential Revision: https://reviews.llvm.org/D113707
2021-11-12 03:20:02 +08:00
|
|
|
__asm__ __volatile__("rep movs{l|d}"
|
2020-09-05 00:10:09 +08:00
|
|
|
: "+D"(__dst), "+S"(__src), "+c"(__n)
|
|
|
|
|
:
|
|
|
|
|
: "memory");
|
2021-07-23 15:53:48 +08:00
|
|
|
#else
|
[clang] Make -masm=intel affect inline asm style
With this,
void f() { __asm__("mov eax, ebx"); }
now compiles with clang with -masm=intel.
This matches gcc.
The flag is not accepted in clang-cl mode. It has no effect on
MSVC-style `__asm {}` blocks, which are unconditionally in intel
mode both before and after this change.
One difference to gcc is that in clang, inline asm strings are
"local" while they're "global" in gcc. Building the following with
-masm=intel works with clang, but not with gcc where the ".att_syntax"
from the 2nd __asm__() is in effect until file end (or until a
".intel_syntax" somewhere later in the file):
__asm__("mov eax, ebx");
__asm__(".att_syntax\nmovl %ebx, %eax");
__asm__("mov eax, ebx");
This also updates clang's intrinsic headers to work both in
-masm=att (the default) and -masm=intel modes.
The official solution for this according to "Multiple assembler dialects in asm
templates" in gcc docs->Extensions->Inline Assembly->Extended Asm
is to write every inline asm snippet twice:
bt{l %[Offset],%[Base] | %[Base],%[Offset]}
This works in LLVM after D113932 and D113894, so use that.
(Just putting `.att_syntax` at the start of the snippet works in some but not
all cases: When LLVM interpolates in parameters like `%0`, it uses at&t or
intel syntax according to the inline asm snippet's flavor, so the `.att_syntax`
within the snippet happens to late: The interpolated-in parameter is already
in intel style, and then won't parse in the switched `.att_syntax`.)
It might be nice to invent a `#pragma clang asm_dialect push "att"` /
`#pragma clang asm_dialect pop` to be able to force asm style per snippet,
so that the inline asm string doesn't contain the same code in two variants,
but let's leave that for a follow-up.
Fixes PR21401 and PR20241.
Differential Revision: https://reviews.llvm.org/D113707
2021-11-12 03:20:02 +08:00
|
|
|
__asm__ __volatile__("xchg {%%esi, %1|%1, esi}\n"
|
|
|
|
|
"rep movs{l|d}\n"
|
|
|
|
|
"xchg {%%esi, %1|%1, esi}"
|
2021-07-23 15:53:48 +08:00
|
|
|
: "+D"(__dst), "+r"(__src), "+c"(__n)
|
|
|
|
|
:
|
|
|
|
|
: "memory");
|
|
|
|
|
#endif
|
2014-03-13 06:00:32 +08:00
|
|
|
}
|
2020-09-05 00:10:09 +08:00
|
|
|
static __inline__ void __DEFAULT_FN_ATTRS __movsw(unsigned short *__dst,
|
|
|
|
|
unsigned short const *__src,
|
|
|
|
|
size_t __n) {
|
2021-07-23 15:53:48 +08:00
|
|
|
#if defined(__x86_64__)
|
2020-09-05 00:10:09 +08:00
|
|
|
__asm__ __volatile__("rep movsw"
|
|
|
|
|
: "+D"(__dst), "+S"(__src), "+c"(__n)
|
|
|
|
|
:
|
|
|
|
|
: "memory");
|
2021-07-23 15:53:48 +08:00
|
|
|
#else
|
[clang] Make -masm=intel affect inline asm style
With this,
void f() { __asm__("mov eax, ebx"); }
now compiles with clang with -masm=intel.
This matches gcc.
The flag is not accepted in clang-cl mode. It has no effect on
MSVC-style `__asm {}` blocks, which are unconditionally in intel
mode both before and after this change.
One difference to gcc is that in clang, inline asm strings are
"local" while they're "global" in gcc. Building the following with
-masm=intel works with clang, but not with gcc where the ".att_syntax"
from the 2nd __asm__() is in effect until file end (or until a
".intel_syntax" somewhere later in the file):
__asm__("mov eax, ebx");
__asm__(".att_syntax\nmovl %ebx, %eax");
__asm__("mov eax, ebx");
This also updates clang's intrinsic headers to work both in
-masm=att (the default) and -masm=intel modes.
The official solution for this according to "Multiple assembler dialects in asm
templates" in gcc docs->Extensions->Inline Assembly->Extended Asm
is to write every inline asm snippet twice:
bt{l %[Offset],%[Base] | %[Base],%[Offset]}
This works in LLVM after D113932 and D113894, so use that.
(Just putting `.att_syntax` at the start of the snippet works in some but not
all cases: When LLVM interpolates in parameters like `%0`, it uses at&t or
intel syntax according to the inline asm snippet's flavor, so the `.att_syntax`
within the snippet happens to late: The interpolated-in parameter is already
in intel style, and then won't parse in the switched `.att_syntax`.)
It might be nice to invent a `#pragma clang asm_dialect push "att"` /
`#pragma clang asm_dialect pop` to be able to force asm style per snippet,
so that the inline asm string doesn't contain the same code in two variants,
but let's leave that for a follow-up.
Fixes PR21401 and PR20241.
Differential Revision: https://reviews.llvm.org/D113707
2021-11-12 03:20:02 +08:00
|
|
|
__asm__ __volatile__("xchg {%%esi, %1|%1, esi}\n"
|
|
|
|
|
"rep movsw\n"
|
|
|
|
|
"xchg {%%esi, %1|%1, esi}"
|
2021-07-23 15:53:48 +08:00
|
|
|
: "+D"(__dst), "+r"(__src), "+c"(__n)
|
|
|
|
|
:
|
|
|
|
|
: "memory");
|
|
|
|
|
#endif
|
2014-03-13 06:00:32 +08:00
|
|
|
}
|
2020-09-05 00:10:09 +08:00
|
|
|
static __inline__ void __DEFAULT_FN_ATTRS __stosd(unsigned long *__dst,
|
|
|
|
|
unsigned long __x,
|
|
|
|
|
size_t __n) {
|
[clang] Make -masm=intel affect inline asm style
With this,
void f() { __asm__("mov eax, ebx"); }
now compiles with clang with -masm=intel.
This matches gcc.
The flag is not accepted in clang-cl mode. It has no effect on
MSVC-style `__asm {}` blocks, which are unconditionally in intel
mode both before and after this change.
One difference to gcc is that in clang, inline asm strings are
"local" while they're "global" in gcc. Building the following with
-masm=intel works with clang, but not with gcc where the ".att_syntax"
from the 2nd __asm__() is in effect until file end (or until a
".intel_syntax" somewhere later in the file):
__asm__("mov eax, ebx");
__asm__(".att_syntax\nmovl %ebx, %eax");
__asm__("mov eax, ebx");
This also updates clang's intrinsic headers to work both in
-masm=att (the default) and -masm=intel modes.
The official solution for this according to "Multiple assembler dialects in asm
templates" in gcc docs->Extensions->Inline Assembly->Extended Asm
is to write every inline asm snippet twice:
bt{l %[Offset],%[Base] | %[Base],%[Offset]}
This works in LLVM after D113932 and D113894, so use that.
(Just putting `.att_syntax` at the start of the snippet works in some but not
all cases: When LLVM interpolates in parameters like `%0`, it uses at&t or
intel syntax according to the inline asm snippet's flavor, so the `.att_syntax`
within the snippet happens to late: The interpolated-in parameter is already
in intel style, and then won't parse in the switched `.att_syntax`.)
It might be nice to invent a `#pragma clang asm_dialect push "att"` /
`#pragma clang asm_dialect pop` to be able to force asm style per snippet,
so that the inline asm string doesn't contain the same code in two variants,
but let's leave that for a follow-up.
Fixes PR21401 and PR20241.
Differential Revision: https://reviews.llvm.org/D113707
2021-11-12 03:20:02 +08:00
|
|
|
__asm__ __volatile__("rep stos{l|d}"
|
2020-09-05 00:10:09 +08:00
|
|
|
: "+D"(__dst), "+c"(__n)
|
|
|
|
|
: "a"(__x)
|
2018-06-22 02:56:30 +08:00
|
|
|
: "memory");
|
2014-03-13 06:00:32 +08:00
|
|
|
}
|
2020-09-05 00:10:09 +08:00
|
|
|
static __inline__ void __DEFAULT_FN_ATTRS __stosw(unsigned short *__dst,
|
|
|
|
|
unsigned short __x,
|
|
|
|
|
size_t __n) {
|
|
|
|
|
__asm__ __volatile__("rep stosw"
|
|
|
|
|
: "+D"(__dst), "+c"(__n)
|
|
|
|
|
: "a"(__x)
|
2018-06-22 02:56:30 +08:00
|
|
|
: "memory");
|
2014-03-13 06:00:32 +08:00
|
|
|
}
|
2014-06-26 00:48:40 +08:00
|
|
|
#endif
|
2014-03-13 06:00:32 +08:00
|
|
|
#ifdef __x86_64__
|
2020-09-05 00:10:09 +08:00
|
|
|
static __inline__ void __DEFAULT_FN_ATTRS __movsq(
|
|
|
|
|
unsigned long long *__dst, unsigned long long const *__src, size_t __n) {
|
|
|
|
|
__asm__ __volatile__("rep movsq"
|
|
|
|
|
: "+D"(__dst), "+S"(__src), "+c"(__n)
|
|
|
|
|
:
|
|
|
|
|
: "memory");
|
2014-03-13 06:00:32 +08:00
|
|
|
}
|
2020-09-05 00:10:09 +08:00
|
|
|
static __inline__ void __DEFAULT_FN_ATTRS __stosq(unsigned __int64 *__dst,
|
|
|
|
|
unsigned __int64 __x,
|
|
|
|
|
size_t __n) {
|
2018-06-22 02:56:30 +08:00
|
|
|
__asm__ __volatile__("rep stosq" : "+D"(__dst), "+c"(__n) : "a"(__x)
|
|
|
|
|
: "memory");
|
2014-03-13 06:00:32 +08:00
|
|
|
}
|
|
|
|
|
#endif
|
|
|
|
|
|
2014-01-24 08:52:39 +08:00
|
|
|
/*----------------------------------------------------------------------------*\
|
2013-09-28 07:57:26 +08:00
|
|
|
|* Misc
|
|
|
|
|
\*----------------------------------------------------------------------------*/
|
2014-06-26 00:48:40 +08:00
|
|
|
#if defined(__i386__) || defined(__x86_64__)
|
2020-09-05 00:10:09 +08:00
|
|
|
static __inline__ void __DEFAULT_FN_ATTRS __halt(void) {
|
|
|
|
|
__asm__ volatile("hlt");
|
2014-01-29 06:55:01 +08:00
|
|
|
}
|
2019-01-15 07:26:01 +08:00
|
|
|
#endif
|
|
|
|
|
|
|
|
|
|
#if defined(__i386__) || defined(__x86_64__) || defined(__aarch64__)
|
2020-09-05 00:10:09 +08:00
|
|
|
static __inline__ void __DEFAULT_FN_ATTRS __nop(void) {
|
|
|
|
|
__asm__ volatile("nop");
|
2016-09-08 00:55:12 +08:00
|
|
|
}
|
2014-06-26 00:48:40 +08:00
|
|
|
#endif
|
2013-09-28 07:57:26 +08:00
|
|
|
|
[COFF, ARM64] Add __getReg intrinsic
Reviewers: rnk, mstorsjo, compnerd, TomTan, haripul, javed.absar, efriedma
Reviewed By: efriedma
Subscribers: peter.smith, efriedma, kristof.beyls, chrib, cfe-commits
Differential Revision: https://reviews.llvm.org/D52838
llvm-svn: 343824
2018-10-05 06:32:42 +08:00
|
|
|
/*----------------------------------------------------------------------------*\
|
|
|
|
|
|* MS AArch64 specific
|
|
|
|
|
\*----------------------------------------------------------------------------*/
|
|
|
|
|
#if defined(__aarch64__)
|
|
|
|
|
unsigned __int64 __getReg(int);
|
[COFF, ARM64] Add _InterlockedAdd intrinsic
Reviewers: rnk, mstorsjo, compnerd, TomTan, haripul, javed.absar, efriedma
Reviewed By: efriedma
Subscribers: efriedma, kristof.beyls, chrib, jfb, cfe-commits
Differential Revision: https://reviews.llvm.org/D52811
llvm-svn: 343894
2018-10-06 05:57:41 +08:00
|
|
|
long _InterlockedAdd(long volatile *Addend, long Value);
|
2019-02-08 09:17:49 +08:00
|
|
|
__int64 _ReadStatusReg(int);
|
|
|
|
|
void _WriteStatusReg(int, __int64);
|
2019-01-15 09:26:26 +08:00
|
|
|
|
2019-02-12 04:04:02 +08:00
|
|
|
unsigned short __cdecl _byteswap_ushort(unsigned short val);
|
|
|
|
|
unsigned long __cdecl _byteswap_ulong (unsigned long val);
|
|
|
|
|
unsigned __int64 __cdecl _byteswap_uint64(unsigned __int64 val);
|
2021-07-24 05:04:10 +08:00
|
|
|
|
|
|
|
|
__int64 __mulh(__int64 __a, __int64 __b);
|
|
|
|
|
unsigned __int64 __umulh(unsigned __int64 __a, unsigned __int64 __b);
|
2022-04-16 05:57:40 +08:00
|
|
|
|
|
|
|
|
void __break(int);
|
[COFF, ARM64] Add __getReg intrinsic
Reviewers: rnk, mstorsjo, compnerd, TomTan, haripul, javed.absar, efriedma
Reviewed By: efriedma
Subscribers: peter.smith, efriedma, kristof.beyls, chrib, cfe-commits
Differential Revision: https://reviews.llvm.org/D52838
llvm-svn: 343824
2018-10-05 06:32:42 +08:00
|
|
|
#endif
|
|
|
|
|
|
2014-04-08 08:28:22 +08:00
|
|
|
/*----------------------------------------------------------------------------*\
|
|
|
|
|
|* Privileged intrinsics
|
|
|
|
|
\*----------------------------------------------------------------------------*/
|
2014-06-26 00:48:40 +08:00
|
|
|
#if defined(__i386__) || defined(__x86_64__)
|
2015-06-30 21:36:19 +08:00
|
|
|
static __inline__ unsigned __int64 __DEFAULT_FN_ATTRS
|
2014-04-08 08:28:22 +08:00
|
|
|
__readmsr(unsigned long __register) {
|
|
|
|
|
// Loads the contents of a 64-bit model specific register (MSR) specified in
|
|
|
|
|
// the ECX register into registers EDX:EAX. The EDX register is loaded with
|
|
|
|
|
// the high-order 32 bits of the MSR and the EAX register is loaded with the
|
|
|
|
|
// low-order 32 bits. If less than 64 bits are implemented in the MSR being
|
|
|
|
|
// read, the values returned to EDX:EAX in unimplemented bit locations are
|
|
|
|
|
// undefined.
|
|
|
|
|
unsigned long __edx;
|
|
|
|
|
unsigned long __eax;
|
2014-04-09 01:49:16 +08:00
|
|
|
__asm__ ("rdmsr" : "=d"(__edx), "=a"(__eax) : "c"(__register));
|
2014-04-08 08:28:22 +08:00
|
|
|
return (((unsigned __int64)__edx) << 32) | (unsigned __int64)__eax;
|
|
|
|
|
}
|
2019-11-15 05:21:35 +08:00
|
|
|
#endif
|
2014-04-08 08:28:22 +08:00
|
|
|
|
2020-09-05 00:10:09 +08:00
|
|
|
static __inline__ unsigned __LPTRINT_TYPE__ __DEFAULT_FN_ATTRS __readcr3(void) {
|
2019-11-15 05:21:35 +08:00
|
|
|
unsigned __LPTRINT_TYPE__ __cr3_val;
|
[clang] Make -masm=intel affect inline asm style
With this,
void f() { __asm__("mov eax, ebx"); }
now compiles with clang with -masm=intel.
This matches gcc.
The flag is not accepted in clang-cl mode. It has no effect on
MSVC-style `__asm {}` blocks, which are unconditionally in intel
mode both before and after this change.
One difference to gcc is that in clang, inline asm strings are
"local" while they're "global" in gcc. Building the following with
-masm=intel works with clang, but not with gcc where the ".att_syntax"
from the 2nd __asm__() is in effect until file end (or until a
".intel_syntax" somewhere later in the file):
__asm__("mov eax, ebx");
__asm__(".att_syntax\nmovl %ebx, %eax");
__asm__("mov eax, ebx");
This also updates clang's intrinsic headers to work both in
-masm=att (the default) and -masm=intel modes.
The official solution for this according to "Multiple assembler dialects in asm
templates" in gcc docs->Extensions->Inline Assembly->Extended Asm
is to write every inline asm snippet twice:
bt{l %[Offset],%[Base] | %[Base],%[Offset]}
This works in LLVM after D113932 and D113894, so use that.
(Just putting `.att_syntax` at the start of the snippet works in some but not
all cases: When LLVM interpolates in parameters like `%0`, it uses at&t or
intel syntax according to the inline asm snippet's flavor, so the `.att_syntax`
within the snippet happens to late: The interpolated-in parameter is already
in intel style, and then won't parse in the switched `.att_syntax`.)
It might be nice to invent a `#pragma clang asm_dialect push "att"` /
`#pragma clang asm_dialect pop` to be able to force asm style per snippet,
so that the inline asm string doesn't contain the same code in two variants,
but let's leave that for a follow-up.
Fixes PR21401 and PR20241.
Differential Revision: https://reviews.llvm.org/D113707
2021-11-12 03:20:02 +08:00
|
|
|
__asm__ __volatile__(
|
|
|
|
|
"mov {%%cr3, %0|%0, cr3}"
|
|
|
|
|
: "=r"(__cr3_val)
|
|
|
|
|
:
|
|
|
|
|
: "memory");
|
2014-04-09 01:49:16 +08:00
|
|
|
return __cr3_val;
|
2014-04-08 08:28:22 +08:00
|
|
|
}
|
|
|
|
|
|
2015-06-30 21:36:19 +08:00
|
|
|
static __inline__ void __DEFAULT_FN_ATTRS
|
2019-11-15 05:21:35 +08:00
|
|
|
__writecr3(unsigned __INTPTR_TYPE__ __cr3_val) {
|
[clang] Make -masm=intel affect inline asm style
With this,
void f() { __asm__("mov eax, ebx"); }
now compiles with clang with -masm=intel.
This matches gcc.
The flag is not accepted in clang-cl mode. It has no effect on
MSVC-style `__asm {}` blocks, which are unconditionally in intel
mode both before and after this change.
One difference to gcc is that in clang, inline asm strings are
"local" while they're "global" in gcc. Building the following with
-masm=intel works with clang, but not with gcc where the ".att_syntax"
from the 2nd __asm__() is in effect until file end (or until a
".intel_syntax" somewhere later in the file):
__asm__("mov eax, ebx");
__asm__(".att_syntax\nmovl %ebx, %eax");
__asm__("mov eax, ebx");
This also updates clang's intrinsic headers to work both in
-masm=att (the default) and -masm=intel modes.
The official solution for this according to "Multiple assembler dialects in asm
templates" in gcc docs->Extensions->Inline Assembly->Extended Asm
is to write every inline asm snippet twice:
bt{l %[Offset],%[Base] | %[Base],%[Offset]}
This works in LLVM after D113932 and D113894, so use that.
(Just putting `.att_syntax` at the start of the snippet works in some but not
all cases: When LLVM interpolates in parameters like `%0`, it uses at&t or
intel syntax according to the inline asm snippet's flavor, so the `.att_syntax`
within the snippet happens to late: The interpolated-in parameter is already
in intel style, and then won't parse in the switched `.att_syntax`.)
It might be nice to invent a `#pragma clang asm_dialect push "att"` /
`#pragma clang asm_dialect pop` to be able to force asm style per snippet,
so that the inline asm string doesn't contain the same code in two variants,
but let's leave that for a follow-up.
Fixes PR21401 and PR20241.
Differential Revision: https://reviews.llvm.org/D113707
2021-11-12 03:20:02 +08:00
|
|
|
__asm__ ("mov {%0, %%cr3|cr3, %0}" : : "r"(__cr3_val) : "memory");
|
2014-04-08 08:28:22 +08:00
|
|
|
}
|
|
|
|
|
|
2013-09-19 06:40:18 +08:00
|
|
|
#ifdef __cplusplus
|
2013-09-19 06:24:01 +08:00
|
|
|
}
|
2013-08-31 08:22:48 +08:00
|
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#endif
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2013-09-19 08:19:53 +08:00
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2019-11-15 05:21:35 +08:00
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|
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#undef __LPTRINT_TYPE__
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2015-06-30 21:36:19 +08:00
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#undef __DEFAULT_FN_ATTRS
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2015-06-16 07:20:35 +08:00
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|
2013-09-19 08:19:53 +08:00
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#endif /* __INTRIN_H */
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#endif /* _MSC_VER */
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