llvm-project/llvm/test/CodeGen/MSP430/2009-05-19-DoubleSplit.ll

; RUN: llvm-as < %s | llc -march=msp430

define i16 @test(double %d) nounwind {
entry:
        %add = fadd double %d, 1.000000e+00
        %call = tail call i16 @funct(double %add) nounwind
        ret i16 %call
}

declare i16 @funct(double)
Fix for PR4235: to build a floating-point value from integer parts, build an integer and cast that to a float. This fixes a crash caused by trying to split an f32 into two f16's. This changes the behavior in test/CodeGen/XCore/fneg.ll because that testcase now triggers a DAGCombine which converts the fneg into an integer operation. If someone is interested, it's probably possible to tweak the test to generate an actual fneg. llvm-svn: 72162 2009-05-20 14:02:09 +08:00			`; RUN: llvm-as < %s \| llc -march=msp430`

			`define i16 @test(double %d) nounwind {`
			`entry:`
Split the Add, Sub, and Mul instruction opcodes into separate integer and floating-point opcodes, introducing FAdd, FSub, and FMul. For now, the AsmParser, BitcodeReader, and IRBuilder all preserve backwards compatability, and the Core LLVM APIs preserve backwards compatibility for IR producers. Most front-ends won't need to change immediately. This implements the first step of the plan outlined here: http://nondot.org/sabre/LLVMNotes/IntegerOverflow.txt llvm-svn: 72897 2009-06-05 06:49:04 +08:00			`%add = fadd double %d, 1.000000e+00`
Fix for PR4235: to build a floating-point value from integer parts, build an integer and cast that to a float. This fixes a crash caused by trying to split an f32 into two f16's. This changes the behavior in test/CodeGen/XCore/fneg.ll because that testcase now triggers a DAGCombine which converts the fneg into an integer operation. If someone is interested, it's probably possible to tweak the test to generate an actual fneg. llvm-svn: 72162 2009-05-20 14:02:09 +08:00			`%call = tail call i16 @funct(double %add) nounwind`
			`ret i16 %call`
			`}`

			`declare i16 @funct(double)`