2010-04-17 07:04:22 +08:00
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//===-- X86SelectionDAGInfo.cpp - X86 SelectionDAG Info -------------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file implements the X86SelectionDAGInfo class.
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//
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//===----------------------------------------------------------------------===//
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2010-05-12 01:31:57 +08:00
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#include "X86TargetMachine.h"
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#include "llvm/CodeGen/SelectionDAG.h"
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2013-01-02 19:36:10 +08:00
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#include "llvm/IR/DerivedTypes.h"
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2010-04-17 07:04:22 +08:00
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using namespace llvm;
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2014-04-22 10:41:26 +08:00
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#define DEBUG_TYPE "x86-selectiondag-info"
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2010-05-12 01:31:57 +08:00
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X86SelectionDAGInfo::X86SelectionDAGInfo(const X86TargetMachine &TM) :
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TargetSelectionDAGInfo(TM),
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Subtarget(&TM.getSubtarget<X86Subtarget>()),
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TLI(*TM.getTargetLowering()) {
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2010-04-17 07:04:22 +08:00
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}
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X86SelectionDAGInfo::~X86SelectionDAGInfo() {
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}
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2010-05-12 01:31:57 +08:00
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SDValue
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2013-05-25 10:42:55 +08:00
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X86SelectionDAGInfo::EmitTargetCodeForMemset(SelectionDAG &DAG, SDLoc dl,
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2010-05-12 01:31:57 +08:00
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SDValue Chain,
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SDValue Dst, SDValue Src,
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SDValue Size, unsigned Align,
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bool isVolatile,
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2010-09-21 13:40:29 +08:00
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MachinePointerInfo DstPtrInfo) const {
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2010-05-12 01:31:57 +08:00
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ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
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2010-09-21 13:43:34 +08:00
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// If to a segment-relative address space, use the default lowering.
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if (DstPtrInfo.getAddrSpace() >= 256)
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return SDValue();
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2012-08-02 02:39:17 +08:00
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2010-05-12 01:31:57 +08:00
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// If not DWORD aligned or size is more than the threshold, call the library.
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// The libc version is likely to be faster for these cases. It can use the
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// address value and run time information about the CPU.
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if ((Align & 3) != 0 ||
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!ConstantSize ||
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ConstantSize->getZExtValue() >
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Subtarget->getMaxInlineSizeThreshold()) {
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// Check to see if there is a specialized entry-point for memory zeroing.
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ConstantSDNode *V = dyn_cast<ConstantSDNode>(Src);
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if (const char *bzeroEntry = V &&
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2014-04-25 13:30:21 +08:00
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V->isNullValue() ? Subtarget->getBZeroEntry() : nullptr) {
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2010-05-12 01:31:57 +08:00
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EVT IntPtr = TLI.getPointerTy();
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2012-11-01 16:07:29 +08:00
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Type *IntPtrTy = getDataLayout()->getIntPtrType(*DAG.getContext());
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2010-05-12 01:31:57 +08:00
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TargetLowering::ArgListTy Args;
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TargetLowering::ArgListEntry Entry;
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Entry.Node = Dst;
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Entry.Ty = IntPtrTy;
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Args.push_back(Entry);
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Entry.Node = Size;
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Args.push_back(Entry);
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2012-05-26 00:35:28 +08:00
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TargetLowering::
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CallLoweringInfo CLI(Chain, Type::getVoidTy(*DAG.getContext()),
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2010-05-12 01:31:57 +08:00
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false, false, false, false,
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2012-02-29 02:51:51 +08:00
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0, CallingConv::C, /*isTailCall=*/false,
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/*doesNotRet=*/false, /*isReturnValueUsed=*/false,
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2010-05-12 01:31:57 +08:00
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DAG.getExternalSymbol(bzeroEntry, IntPtr), Args,
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DAG, dl);
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2012-05-26 00:35:28 +08:00
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std::pair<SDValue,SDValue> CallResult =
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TLI.LowerCallTo(CLI);
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2010-05-12 01:31:57 +08:00
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return CallResult.second;
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}
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// Otherwise have the target-independent code call memset.
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return SDValue();
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}
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uint64_t SizeVal = ConstantSize->getZExtValue();
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2014-04-25 13:30:21 +08:00
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SDValue InFlag;
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2010-05-12 01:31:57 +08:00
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EVT AVT;
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SDValue Count;
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ConstantSDNode *ValC = dyn_cast<ConstantSDNode>(Src);
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unsigned BytesLeft = 0;
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bool TwoRepStos = false;
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if (ValC) {
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unsigned ValReg;
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uint64_t Val = ValC->getZExtValue() & 255;
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// If the value is a constant, then we can potentially use larger sets.
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switch (Align & 3) {
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case 2: // WORD aligned
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AVT = MVT::i16;
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ValReg = X86::AX;
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Val = (Val << 8) | Val;
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break;
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case 0: // DWORD aligned
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AVT = MVT::i32;
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ValReg = X86::EAX;
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Val = (Val << 8) | Val;
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Val = (Val << 16) | Val;
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if (Subtarget->is64Bit() && ((Align & 0x7) == 0)) { // QWORD aligned
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AVT = MVT::i64;
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ValReg = X86::RAX;
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Val = (Val << 32) | Val;
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}
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break;
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default: // Byte aligned
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AVT = MVT::i8;
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ValReg = X86::AL;
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Count = DAG.getIntPtrConstant(SizeVal);
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break;
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}
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if (AVT.bitsGT(MVT::i8)) {
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unsigned UBytes = AVT.getSizeInBits() / 8;
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Count = DAG.getIntPtrConstant(SizeVal / UBytes);
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BytesLeft = SizeVal % UBytes;
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}
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Chain = DAG.getCopyToReg(Chain, dl, ValReg, DAG.getConstant(Val, AVT),
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InFlag);
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InFlag = Chain.getValue(1);
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} else {
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AVT = MVT::i8;
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Count = DAG.getIntPtrConstant(SizeVal);
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Chain = DAG.getCopyToReg(Chain, dl, X86::AL, Src, InFlag);
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InFlag = Chain.getValue(1);
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}
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Chain = DAG.getCopyToReg(Chain, dl, Subtarget->is64Bit() ? X86::RCX :
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X86::ECX,
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Count, InFlag);
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InFlag = Chain.getValue(1);
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Chain = DAG.getCopyToReg(Chain, dl, Subtarget->is64Bit() ? X86::RDI :
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X86::EDI,
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Dst, InFlag);
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InFlag = Chain.getValue(1);
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2010-12-21 10:38:05 +08:00
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SDVTList Tys = DAG.getVTList(MVT::Other, MVT::Glue);
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2010-05-12 01:31:57 +08:00
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SDValue Ops[] = { Chain, DAG.getValueType(AVT), InFlag };
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2014-04-27 02:35:24 +08:00
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Chain = DAG.getNode(X86ISD::REP_STOS, dl, Tys, Ops);
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2010-05-12 01:31:57 +08:00
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if (TwoRepStos) {
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InFlag = Chain.getValue(1);
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Count = Size;
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EVT CVT = Count.getValueType();
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SDValue Left = DAG.getNode(ISD::AND, dl, CVT, Count,
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DAG.getConstant((AVT == MVT::i64) ? 7 : 3, CVT));
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Chain = DAG.getCopyToReg(Chain, dl, (CVT == MVT::i64) ? X86::RCX :
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X86::ECX,
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Left, InFlag);
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InFlag = Chain.getValue(1);
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2010-12-21 10:38:05 +08:00
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Tys = DAG.getVTList(MVT::Other, MVT::Glue);
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2010-05-12 01:31:57 +08:00
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SDValue Ops[] = { Chain, DAG.getValueType(MVT::i8), InFlag };
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2014-04-27 02:35:24 +08:00
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Chain = DAG.getNode(X86ISD::REP_STOS, dl, Tys, Ops);
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2010-05-12 01:31:57 +08:00
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} else if (BytesLeft) {
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// Handle the last 1 - 7 bytes.
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unsigned Offset = SizeVal - BytesLeft;
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EVT AddrVT = Dst.getValueType();
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EVT SizeVT = Size.getValueType();
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Chain = DAG.getMemset(Chain, dl,
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DAG.getNode(ISD::ADD, dl, AddrVT, Dst,
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DAG.getConstant(Offset, AddrVT)),
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Src,
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DAG.getConstant(BytesLeft, SizeVT),
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2010-09-21 13:40:29 +08:00
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Align, isVolatile, DstPtrInfo.getWithOffset(Offset));
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2010-05-12 01:31:57 +08:00
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}
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// TODO: Use a Tokenfactor, as in memcpy, instead of a single chain.
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return Chain;
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}
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SDValue
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2013-05-25 10:42:55 +08:00
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X86SelectionDAGInfo::EmitTargetCodeForMemcpy(SelectionDAG &DAG, SDLoc dl,
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2010-05-12 01:31:57 +08:00
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SDValue Chain, SDValue Dst, SDValue Src,
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SDValue Size, unsigned Align,
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bool isVolatile, bool AlwaysInline,
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2010-09-21 13:40:29 +08:00
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MachinePointerInfo DstPtrInfo,
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MachinePointerInfo SrcPtrInfo) const {
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2011-04-15 13:18:47 +08:00
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// This requires the copy size to be a constant, preferably
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2010-05-12 01:31:57 +08:00
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// within a subtarget-specific limit.
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ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
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if (!ConstantSize)
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return SDValue();
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uint64_t SizeVal = ConstantSize->getZExtValue();
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if (!AlwaysInline && SizeVal > Subtarget->getMaxInlineSizeThreshold())
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return SDValue();
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2010-11-05 05:16:46 +08:00
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/// If not DWORD aligned, it is more efficient to call the library. However
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/// if calling the library is not allowed (AlwaysInline), then soldier on as
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/// the code generated here is better than the long load-store sequence we
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/// would otherwise get.
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if (!AlwaysInline && (Align & 3) != 0)
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2010-05-12 01:31:57 +08:00
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return SDValue();
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2010-09-21 13:43:34 +08:00
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// If to a segment-relative address space, use the default lowering.
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if (DstPtrInfo.getAddrSpace() >= 256 ||
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SrcPtrInfo.getAddrSpace() >= 256)
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return SDValue();
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2010-11-05 05:16:46 +08:00
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Revert "X86 memcpy lowering: use "rep movs" even when esi is used as base pointer" (r204174)
> For functions where esi is used as base pointer, we would previously fall ba
> from lowering memcpy with "rep movs" because that clobbers esi.
>
> With this patch, we just store esi in another physical register, and restore
> it afterwards. This adds a little bit of register preassure, but the more
> efficient memcpy should be worth it.
>
> Differential Revision: http://llvm-reviews.chandlerc.com/D2968
This didn't work. I was ending up with code like this:
lea edi,[esi+38h]
mov ecx,0Fh
mov edx,esi
mov esi,ebx
rep movs dword ptr es:[edi],dword ptr [esi]
lea ecx,[esi+74h] <-- Ooops, we're now using esi before restoring it from edx.
add ebx,3Ch
mov esi,edx
I guess if we want to do this we need stronger glue or something, or doing the expansion
much later.
llvm-svn: 204829
2014-03-27 00:30:54 +08:00
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// ESI might be used as a base pointer, in that case we can't simply overwrite
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// the register. Fall back to generic code.
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2013-02-13 21:40:35 +08:00
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const X86RegisterInfo *TRI =
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static_cast<const X86RegisterInfo *>(DAG.getTarget().getRegisterInfo());
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Revert "X86 memcpy lowering: use "rep movs" even when esi is used as base pointer" (r204174)
> For functions where esi is used as base pointer, we would previously fall ba
> from lowering memcpy with "rep movs" because that clobbers esi.
>
> With this patch, we just store esi in another physical register, and restore
> it afterwards. This adds a little bit of register preassure, but the more
> efficient memcpy should be worth it.
>
> Differential Revision: http://llvm-reviews.chandlerc.com/D2968
This didn't work. I was ending up with code like this:
lea edi,[esi+38h]
mov ecx,0Fh
mov edx,esi
mov esi,ebx
rep movs dword ptr es:[edi],dword ptr [esi]
lea ecx,[esi+74h] <-- Ooops, we're now using esi before restoring it from edx.
add ebx,3Ch
mov esi,edx
I guess if we want to do this we need stronger glue or something, or doing the expansion
much later.
llvm-svn: 204829
2014-03-27 00:30:54 +08:00
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if (TRI->hasBasePointer(DAG.getMachineFunction()) &&
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TRI->getBaseRegister() == X86::ESI)
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return SDValue();
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2013-02-13 21:40:35 +08:00
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2010-11-05 05:16:46 +08:00
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MVT AVT;
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if (Align & 1)
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AVT = MVT::i8;
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else if (Align & 2)
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AVT = MVT::i16;
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else if (Align & 4)
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// DWORD aligned
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AVT = MVT::i32;
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else
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// QWORD aligned
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AVT = Subtarget->is64Bit() ? MVT::i64 : MVT::i32;
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2010-05-12 01:31:57 +08:00
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unsigned UBytes = AVT.getSizeInBits() / 8;
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unsigned CountVal = SizeVal / UBytes;
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SDValue Count = DAG.getIntPtrConstant(CountVal);
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unsigned BytesLeft = SizeVal % UBytes;
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2014-04-25 13:30:21 +08:00
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SDValue InFlag;
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2010-05-12 01:31:57 +08:00
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Chain = DAG.getCopyToReg(Chain, dl, Subtarget->is64Bit() ? X86::RCX :
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X86::ECX,
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Revert "X86 memcpy lowering: use "rep movs" even when esi is used as base pointer" (r204174)
> For functions where esi is used as base pointer, we would previously fall ba
> from lowering memcpy with "rep movs" because that clobbers esi.
>
> With this patch, we just store esi in another physical register, and restore
> it afterwards. This adds a little bit of register preassure, but the more
> efficient memcpy should be worth it.
>
> Differential Revision: http://llvm-reviews.chandlerc.com/D2968
This didn't work. I was ending up with code like this:
lea edi,[esi+38h]
mov ecx,0Fh
mov edx,esi
mov esi,ebx
rep movs dword ptr es:[edi],dword ptr [esi]
lea ecx,[esi+74h] <-- Ooops, we're now using esi before restoring it from edx.
add ebx,3Ch
mov esi,edx
I guess if we want to do this we need stronger glue or something, or doing the expansion
much later.
llvm-svn: 204829
2014-03-27 00:30:54 +08:00
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Count, InFlag);
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InFlag = Chain.getValue(1);
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2010-05-12 01:31:57 +08:00
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Chain = DAG.getCopyToReg(Chain, dl, Subtarget->is64Bit() ? X86::RDI :
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X86::EDI,
|
Revert "X86 memcpy lowering: use "rep movs" even when esi is used as base pointer" (r204174)
> For functions where esi is used as base pointer, we would previously fall ba
> from lowering memcpy with "rep movs" because that clobbers esi.
>
> With this patch, we just store esi in another physical register, and restore
> it afterwards. This adds a little bit of register preassure, but the more
> efficient memcpy should be worth it.
>
> Differential Revision: http://llvm-reviews.chandlerc.com/D2968
This didn't work. I was ending up with code like this:
lea edi,[esi+38h]
mov ecx,0Fh
mov edx,esi
mov esi,ebx
rep movs dword ptr es:[edi],dword ptr [esi]
lea ecx,[esi+74h] <-- Ooops, we're now using esi before restoring it from edx.
add ebx,3Ch
mov esi,edx
I guess if we want to do this we need stronger glue or something, or doing the expansion
much later.
llvm-svn: 204829
2014-03-27 00:30:54 +08:00
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Dst, InFlag);
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InFlag = Chain.getValue(1);
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2010-05-12 01:31:57 +08:00
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Chain = DAG.getCopyToReg(Chain, dl, Subtarget->is64Bit() ? X86::RSI :
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X86::ESI,
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Revert "X86 memcpy lowering: use "rep movs" even when esi is used as base pointer" (r204174)
> For functions where esi is used as base pointer, we would previously fall ba
> from lowering memcpy with "rep movs" because that clobbers esi.
>
> With this patch, we just store esi in another physical register, and restore
> it afterwards. This adds a little bit of register preassure, but the more
> efficient memcpy should be worth it.
>
> Differential Revision: http://llvm-reviews.chandlerc.com/D2968
This didn't work. I was ending up with code like this:
lea edi,[esi+38h]
mov ecx,0Fh
mov edx,esi
mov esi,ebx
rep movs dword ptr es:[edi],dword ptr [esi]
lea ecx,[esi+74h] <-- Ooops, we're now using esi before restoring it from edx.
add ebx,3Ch
mov esi,edx
I guess if we want to do this we need stronger glue or something, or doing the expansion
much later.
llvm-svn: 204829
2014-03-27 00:30:54 +08:00
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Src, InFlag);
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InFlag = Chain.getValue(1);
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2010-05-12 01:31:57 +08:00
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2010-12-21 10:38:05 +08:00
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SDVTList Tys = DAG.getVTList(MVT::Other, MVT::Glue);
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Revert "X86 memcpy lowering: use "rep movs" even when esi is used as base pointer" (r204174)
> For functions where esi is used as base pointer, we would previously fall ba
> from lowering memcpy with "rep movs" because that clobbers esi.
>
> With this patch, we just store esi in another physical register, and restore
> it afterwards. This adds a little bit of register preassure, but the more
> efficient memcpy should be worth it.
>
> Differential Revision: http://llvm-reviews.chandlerc.com/D2968
This didn't work. I was ending up with code like this:
lea edi,[esi+38h]
mov ecx,0Fh
mov edx,esi
mov esi,ebx
rep movs dword ptr es:[edi],dword ptr [esi]
lea ecx,[esi+74h] <-- Ooops, we're now using esi before restoring it from edx.
add ebx,3Ch
mov esi,edx
I guess if we want to do this we need stronger glue or something, or doing the expansion
much later.
llvm-svn: 204829
2014-03-27 00:30:54 +08:00
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SDValue Ops[] = { Chain, DAG.getValueType(AVT), InFlag };
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2014-04-27 02:35:24 +08:00
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SDValue RepMovs = DAG.getNode(X86ISD::REP_MOVS, dl, Tys, Ops);
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2010-05-12 01:31:57 +08:00
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SmallVector<SDValue, 4> Results;
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Results.push_back(RepMovs);
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if (BytesLeft) {
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// Handle the last 1 - 7 bytes.
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unsigned Offset = SizeVal - BytesLeft;
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EVT DstVT = Dst.getValueType();
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EVT SrcVT = Src.getValueType();
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EVT SizeVT = Size.getValueType();
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Results.push_back(DAG.getMemcpy(Chain, dl,
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DAG.getNode(ISD::ADD, dl, DstVT, Dst,
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DAG.getConstant(Offset, DstVT)),
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DAG.getNode(ISD::ADD, dl, SrcVT, Src,
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DAG.getConstant(Offset, SrcVT)),
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DAG.getConstant(BytesLeft, SizeVT),
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Align, isVolatile, AlwaysInline,
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2010-09-21 13:40:29 +08:00
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DstPtrInfo.getWithOffset(Offset),
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SrcPtrInfo.getWithOffset(Offset)));
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2010-05-12 01:31:57 +08:00
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}
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2014-04-27 02:35:24 +08:00
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return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, Results);
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2010-05-12 01:31:57 +08:00
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}
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